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1. 发明申请

US20130159664A1 Infrastructure Support for Accelerated Processing Device Memory Paging Without Operating System Integration 有权
标题翻译：基础设施支持加速处理设备内存寻呼，无需操作系统集成
公开(公告)号：US20130159664A1
公开(公告)日：2013-06-20
申请号：US13325282
申请日：2011-12-14
申请人： Paul BLINZER , Leendert Peter Van Doorn , Gongxian Jeffrey Cheng , Elene Terry , Thomas Roy Woller , Arshad Rahman
发明人： Paul BLINZER , Leendert Peter Van Doorn , Gongxian Jeffrey Cheng , Elene Terry , Thomas Roy Woller , Arshad Rahman
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F9/3004 , G06F9/3881 , G06F12/1081 , G06F2009/3883 , G06F2212/683
摘要： In a CPU of the combined CPU/APD architecture system, the CPU having multiple CPU cores, each core having a first machine specific register for receiving a physical page table/page directory base address, a second machine specific register for receiving a physical address pointing to a location controlled by an IOMMUv2 that is communicatively coupled to an APD, and microcode which when executed causes a write notification to be issued to the physical address contained in the second machine specific register; receiving in the first machine specific register of a CPU core, a physical page table/page directory base address, receiving in the second machine specific register of the CPU core, a physical address pointing to a location controlled by the IOMMUv2, determining that a control register of the CPU core has been updated, and responsive to the determination that the control register has been updated, executing microcode in the CPU core that causes a write notification to be issued to the physical address contained in the second machine specific register, wherein the physical address is able to receive writes that affect IOMMUv2 page table invalidations.
摘要翻译：在组合的CPU / APD架构系统的CPU中，CPU具有多个CPU内核，每个核具有用于接收物理页表/页目录基地址的第一机器特定寄存器，用于接收物理地址指向到由通信地耦合到APD的IOMMUv2控制的位置，以及当被执行时导致向包含在第二机器特定寄存器中的物理地址发出写入通知的微代码; 在CPU核心的第一机器特定寄存器中接收物理页表/页目录基地址，在CPU核心的第二机器特定寄存器中接收指向由IOMMUv2控制的位置的物理地址，确定控制已经更新了CPU核心的寄存器，并且响应于控制寄存器被更新的确定，执行CPU核心中的微代码，使得向第二机器特定寄存器中包含的物理地址发出写入通知，其中，物理地址能够接收影响IOMMUv2页表无效的写入。

2. 发明授权

US08578129B2 Infrastructure support for accelerated processing device memory paging without operating system integration 有权
标题翻译：基础架构支持加速处理设备内存分页，无需操作系统集成
公开(公告)号：US08578129B2
公开(公告)日：2013-11-05
申请号：US13325282
申请日：2011-12-14
申请人： Paul Blinzer , Leendert Peter Van Doorn , Gongxian Jeffrey Cheng , Elene Terry , Thomas Roy Woller , Arshad Rahman
发明人： Paul Blinzer , Leendert Peter Van Doorn , Gongxian Jeffrey Cheng , Elene Terry , Thomas Roy Woller , Arshad Rahman
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F9/3004 , G06F9/3881 , G06F12/1081 , G06F2009/3883 , G06F2212/683
摘要： In a CPU, the CPU having multiple CPU cores, each core having a first machine specific register, a second machine specific register, and microcode which when executed causes a write notification to be issued to the physical address contained in the second machine specific register; receiving in the first machine specific register of a CPU core, a physical page table/page directory base address, receiving in the second machine specific register of the CPU core, a physical address pointing to a location controlled by the IOMMUv2, determining that a control register of the CPU core has been updated, and responsive to the determination that the control register has been updated, executing microcode in the CPU core that causes a write notification to be issued to the physical address contained in the second machine specific register, wherein the physical address is able to receive writes that affect IOMMUv2 page table invalidations.
摘要翻译：在CPU中，具有多个CPU核心的CPU，每个核心具有第一机器特定寄存器，第二机器特定寄存器和微代码，当被执行时，将对包含在第二机器特定寄存器中的物理地址发出写入通知; 在CPU核心的第一机器特定寄存器中接收物理页表/页目录基地址，在CPU核心的第二机器特定寄存器中接收指向由IOMMUv2控制的位置的物理地址，确定控制已经更新了CPU核心的寄存器，并且响应于控制寄存器被更新的确定，执行CPU核心中的微代码，使得向第二机器特定寄存器中包含的物理地址发出写入通知，其中，物理地址能够接收影响IOMMUv2页表无效的写入。

3. 发明授权

US09122522B2 Software mechanisms for managing task scheduling on an accelerated processing device (APD) 有权
标题翻译：用于管理加速处理设备（APD）上的任务调度的软件机制
公开(公告)号：US09122522B2
公开(公告)日：2015-09-01
申请号：US13325755
申请日：2011-12-14
申请人： Robert Scott Hartog , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Sebastien Nussbaum , Nuwan S. Jayasena , Rex McCrary , Philip J. Rogers , Mark Leather
发明人： Robert Scott Hartog , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Sebastien Nussbaum , Nuwan S. Jayasena , Rex McCrary , Philip J. Rogers , Mark Leather
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4881 , G06F9/5027 , G06F2209/5013 , G06F2209/508 , G06F2209/509
摘要： Embodiments describe herein provide a method of for managing task scheduling on a accelerated processing device. The method includes executing a first task within the accelerated processing device (APD), monitoring for an interruption of the execution of the first task, and switching to a second task when an interruption is detected.
摘要翻译：本文描述的实施例提供了一种用于在加速处理设备上管理任务调度的方法。该方法包括在加速处理设备（APD）内执行第一任务，监视第一任务的执行中断，以及当检测到中断时切换到第二任务。

4. 发明申请

US20130160017A1 Software Mechanisms for Managing Task Scheduling on an Accelerated Processing Device (APD) 有权
标题翻译：用于管理加速处理设备（APD）上任务调度的软件机制
公开(公告)号：US20130160017A1
公开(公告)日：2013-06-20
申请号：US13325755
申请日：2011-12-14
申请人： Robert Scott HARTOG , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Sebastien Nussbaum , Nuwan S. Jayasena , Rex McCrary , Philip J. Rogers , Mark Leather
发明人： Robert Scott HARTOG , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Sebastien Nussbaum , Nuwan S. Jayasena , Rex McCrary , Philip J. Rogers , Mark Leather
IPC分类号： G06F9/48
CPC分类号： G06F9/4881 , G06F9/5027 , G06F2209/5013 , G06F2209/508 , G06F2209/509
摘要： Embodiments describe herein provide a method of for managing task scheduling on a accelerated processing device. The method includes executing a first task within the accelerated processing device (APD), monitoring for an interruption of the execution of the first task, and switching to a second task when an interruption is detected.
摘要翻译：本文描述的实施例提供了一种用于在加速处理设备上管理任务调度的方法。该方法包括在加速处理设备（APD）内执行第一任务，监视第一任务的执行中断，以及当检测到中断时切换到第二任务。

5. 发明授权

US08933942B2 Partitioning resources of a processor 有权
标题翻译：分配处理器的资源
公开(公告)号：US08933942B2
公开(公告)日：2015-01-13
申请号：US13315121
申请日：2011-12-08
申请人： Robert Scott Hartog , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Rex McCrary , Philip J. Rogers , Mark Leather
发明人： Robert Scott Hartog , Ralph Clay Taylor , Michael Mantor , Thomas Roy Woller , Kevin McGrath , Rex McCrary , Philip J. Rogers , Mark Leather
IPC分类号： G06F15/16 , G06T1/00 , G06F9/46 , G06F9/50
CPC分类号： G06F9/505 , G06F2209/509
摘要： Embodiments describe herein provide an apparatus, a computer readable medium and a method for simultaneously processing tasks within an APD. The method includes processing a first task within an APD. The method also includes reducing utilization of the APD by the first task to facilitate simultaneous processing of the second task, such that the utilization remains below a threshold.
摘要翻译：本文描述的实施例提供了一种用于同时处理APD内的任务的装置，计算机可读介质和方法。该方法包括处理APD内的第一任务。该方法还包括通过第一任务降低APD的利用率，以促进第二任务的同时处理，使得利用率保持低于阈值。

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