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1. 发明申请

US20140095742A1 SERIAL STORAGE PROTOCOL COMPATIBLE FRAME CONVERSION, AT LEAST IN PART 有权
标题翻译：串行存储协议兼容的帧转换，至少部分
公开(公告)号：US20140095742A1
公开(公告)日：2014-04-03
申请号：US13633690
申请日：2012-10-02
申请人： Ngek Leong Guok , Chai Huat Gan , Eng Hun Ooi
发明人： Ngek Leong Guok , Chai Huat Gan , Eng Hun Ooi
IPC分类号： G06F3/00
CPC分类号： G06F3/0661 , G06F3/0607 , G06F3/0613 , G06F3/0673 , G06F3/0676
摘要： An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.
摘要翻译：一个实施例可以包括以下电路：（a）至少部分地将至少一个串行存储协议兼容帧转换成至少一个分组，至少部分地与多通道输入/输出（I / O ）协议，和/或（b）至少部分地将所述至少一个分组转换成所述至少一个帧。至少一个分组可以经由至少部分地与多通道I / O协议兼容的物理层来传输。所述至少一个分组可以包括所述至少一个帧的帧信息结构（FIS）信息。

2. 发明授权

US08745296B2 Serial storage protocol compatible frame conversion, at least in part being compatible with SATA and one packet being compatible with PCIe protocol 有权
标题翻译：串行存储协议兼容的帧转换，至少部分兼容SATA和一个与PCIe协议兼容的数据包
公开(公告)号：US08745296B2
公开(公告)日：2014-06-03
申请号：US13633690
申请日：2012-10-02
申请人： Ngek Leong Guok , Chai Huat Gan , Eng Hun Ooi
发明人： Ngek Leong Guok , Chai Huat Gan , Eng Hun Ooi
IPC分类号： G06F13/12
CPC分类号： G06F3/0661 , G06F3/0607 , G06F3/0613 , G06F3/0673 , G06F3/0676
摘要： An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.
摘要翻译：一个实施例可以包括以下电路：（a）至少部分地将至少一个串行存储协议兼容帧转换成至少一个分组，至少部分地与多通道输入/输出（I / O ）协议，和/或（b）至少部分地将所述至少一个分组转换成所述至少一个帧。至少一个分组可以经由至少部分地与多通道I / O协议兼容的物理层来传输。所述至少一个分组可以包括所述至少一个帧的帧信息结构（FIS）信息。

3. 发明申请

US20090006670A1 Cache for a host controller 有权
标题翻译：高速缓存用于主机控制器
公开(公告)号：US20090006670A1
公开(公告)日：2009-01-01
申请号：US11821865
申请日：2007-06-26
申请人： Ngek Leong Guok , Eng Hun Ooi
发明人： Ngek Leong Guok , Eng Hun Ooi
IPC分类号： G06F3/00
CPC分类号： G06F12/0893 , G06F12/128
摘要： In one embodiment, the present invention includes a host controller having a cache memory to store entries each including, at least, a command header (CH) portion having data associated with a command from the host controller to one of multiple devices coupled to a port multiplier, and a physical region descriptor (PRD) portion to store address information associated with a next address for data transfer with regard to the command. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括具有高速缓存存储器的主机控制器，该高速缓冲存储器存储条目，每个条目至少包括命令头部（CH）部分，命令头部（CH）部分具有与从主机控制器到与端口耦合的多个设备中的一个的相关联的命令乘法器和物理区域描述符（PRD）部分，用于存储与用于关于命令的数据传输的下一个地址相关联的地址信息。描述和要求保护其他实施例。

4. 发明授权

US07844777B2 Cache for a host controller to store command header information 有权
标题翻译：高速缓存用于主机控制器存储命令头信息
公开(公告)号：US07844777B2
公开(公告)日：2010-11-30
申请号：US11821865
申请日：2007-06-26
申请人： Ngek Leong Guok , Eng Hun Ooi
发明人： Ngek Leong Guok , Eng Hun Ooi
IPC分类号： G06F12/00 , G06F13/00 , G06F3/00
CPC分类号： G06F12/0893 , G06F12/128
摘要： In one embodiment, the present invention includes a host controller having a cache memory to store entries each including, at least, a command header (CH) portion having data associated with a command from the host controller to one of multiple devices coupled to a port multiplier, and a physical region descriptor (PRD) portion to store address information associated with a next address for data transfer with regard to the command. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括具有高速缓存存储器的主机控制器，该高速缓冲存储器存储条目，每个条目至少包括命令头部（CH）部分，命令头部（CH）部分具有与从主机控制器到与端口耦合的多个设备中的一个的相关联的命令乘法器和物理区域描述符（PRD）部分，用于存储与用于关于命令的数据传输的下一个地址相关联的地址信息。描述和要求保护其他实施例。

5. 发明申请

US20130283013A1 METHOD AND APPARATUS FOR AGENT INTERFACING WITH PIPELINE BACKBONE TO LOCALLY HANDLE TRANSACTIONS WHILE OBEYING ORDERING RULE 有权
标题翻译：在管理订单规则下，与管道底板接口进行本地手柄交易的方法和装置
公开(公告)号：US20130283013A1
公开(公告)日：2013-10-24
申请号：US13997628
申请日：2011-11-09
申请人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Su Wei Lim
发明人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Su Wei Lim
IPC分类号： G06F9/30
CPC分类号： G06F9/30043 , G06F13/14 , G06F15/163 , H04L69/12
摘要： In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for enabling an agent interfacing with a pipelined backbone to locally handle transactions while obeying an ordering rule including, for example, receiving a transaction which requests access to a backbone; decoding routing destination information from the transaction received, in which the decoded routing destination information designates the transaction to be processed either locally or processed via the backbone; storing the decoded routing destination information and the transaction into a First-In-First-Out (FIFO) buffer; retrieving the decoded routing destination information and the transaction from the FIFO buffer; and processing the transaction locally or via the backbone based on the decoded routing destination information retrieved from the FIFO buffer with the transaction.
摘要翻译：根据本文公开的实施例，提供了用于使得代理与流水线骨干网接口的本地处理事务的方法，系统和装置，同时服从排序规则，包括例如接收请求访问主干的事务; 从所接收的事务解码路由目的地信息，其中解码的路由目的地信息指定要在本地处理或经由骨干处理的交易; 将解码的路由目的地信息和交易存储到先进先出（FIFO）缓冲器中; 从FIFO缓冲器检索解码的路由目的地信息和事务; 以及基于从所述事务处理从所述FIFO缓冲器检索的解码的路由目的地信息，在本地或经由所述主干处理所述事务。

6. 发明授权

US09367500B2 Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone 有权
标题翻译：用于多总线主机引擎的共享相同请求信道到流水线骨干网的装置
公开(公告)号：US09367500B2
公开(公告)日：2016-06-14
申请号：US13997623
申请日：2011-11-09
申请人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Jennifer Chin , Su Wei Lim
发明人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Jennifer Chin , Su Wei Lim
IPC分类号： G06F13/364 , H04L12/28
CPC分类号： G06F13/364 , H04L12/28
摘要： In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request.
摘要翻译：根据本文公开的实施例，是使得多个总线主机引擎能够将共同的请求信道共享到流水线主干的机制，包括：在代理总线接口处从多个主机接收多个未定义的授权请求，每个请求访问主干通过公共请求通道连接; 确定哪些无效的授权请求首先作为最终授权请求发出; 将用于最终授权请求的主标识符代码存储到FIFO缓冲器中，所述主标识符代码将所述最终许可请求与所述多个主器件中的发布主机相关联; 等待骨干资助; 以及向代理总线接口呈现用于最终授权请求的主标识符代码，其中，所述代理总线接口响应于所述骨干授权，经由骨干进行处理的命令和数据，以完成最终授权请求。

7. 发明授权

US09268568B2 Method and apparatus for agent interfacing with pipeline backbone to locally handle transactions while obeying ordering rule 有权
标题翻译：用于代理与流水线骨干接口的方法和装置，以便在遵守排序规则的同时处理事务
公开(公告)号：US09268568B2
公开(公告)日：2016-02-23
申请号：US13997628
申请日：2011-11-09
申请人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Su Wei Lim
发明人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Su Wei Lim
IPC分类号： G06F3/00 , G06F13/00 , G06F9/30 , G06F13/14 , G06F15/163 , H04L29/06
CPC分类号： G06F9/30043 , G06F13/14 , G06F15/163 , H04L69/12
摘要： In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for enabling an agent interfacing with a pipelined backbone to locally handle transactions while obeying an ordering rule including, for example, receiving a transaction which requests access to a backbone; decoding routing destination information from the transaction received, in which the decoded routing destination information designates the transaction to be processed either locally or processed via the backbone; storing the decoded routing destination information and the transaction into a First-In-First-Out (FIFO) buffer; retrieving the decoded routing destination information and the transaction from the FIFO buffer; and processing the transaction locally or via the backbone based on the decoded routing destination information retrieved from the FIFO buffer with the transaction.
摘要翻译：根据本文公开的实施例，提供了用于使得代理与流水线骨干网接口的本地处理事务的方法，系统和装置，同时服从排序规则，包括例如接收请求访问主干的事务; 从所接收的事务解码路由目的地信息，其中解码的路由目的地信息指定要在本地处理或经由骨干处理的交易; 将解码的路由目的地信息和交易存储到先进先出（FIFO）缓冲器中; 从FIFO缓冲器检索解码的路由目的地信息和事务; 并且基于从具有交易的FIFO缓冲器检索的解码的路由目的地信息，在本地处理或经由骨干处理事务。

8. 发明申请

US20140207986A1 APPARATUS FOR MULTIPLE BUS MASTER ENGINES TO SHARE THE SAME REQUEST CHANNEL TO A PIPELINED BACKBONE 有权
标题翻译：多台总线主机的设备将相同的请求信道分配给一个管道的后座
公开(公告)号：US20140207986A1
公开(公告)日：2014-07-24
申请号：US13997623
申请日：2011-11-09
申请人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Jennifer Chin , Su Wei Lim
发明人： Ngek Leong Guok , Kah Meng Yeem , Poh Thiam Teoh , Jennifer Chin , Su Wei Lim
IPC分类号： G06F13/364 , G06F13/16
CPC分类号： G06F13/364 , H04L12/28
摘要： In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request.
摘要翻译：根据本文公开的实施例，是使得多个总线主机引擎能够将共同的请求信道共享到流水线主干的机制，包括：在代理总线接口处从多个主机接收多个非占用授权请求，每个请求访问主干通过公共请求通道连接; 确定哪些无效的授权请求首先作为最终授权请求发出; 将用于最终授权请求的主标识符代码存储到FIFO缓冲器中，所述主标识符代码将所述最终许可请求与所述多个主器件中的发布主机相关联; 等待骨干资助; 以及向代理总线接口呈现用于最终授权请求的主标识符代码，其中，所述代理总线接口响应于所述骨干授权，经由骨干进行处理的命令和数据，以完成最终授权请求。

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