专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6104049A Ferroelectric memory with ferroelectric thin film having thickness of 90 nanometers or less, and method of making same 有权
标题翻译：具有厚度为90纳米或更小的铁电薄膜的铁电存储器及其制造方法
公开(公告)号：US6104049A
公开(公告)日：2000-08-15
申请号：US228578
申请日：1999-01-11
申请人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo , Larry D. McMillan , Shinichiro Hayashi , Tatsuo Otsuki
发明人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo , Larry D. McMillan , Shinichiro Hayashi , Tatsuo Otsuki
IPC分类号： G11C11/22 , H01L21/02 , H01L21/316 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/11502 , H01L28/55 , H01L28/60 , H01L21/768
摘要： A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300.degree. C. for five minutes, then RTP annealed at 675.degree. C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700.degree. C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 90 nm. A second electrode is applied to form a capacitor, and a post-anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700.degree. C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8.ltoreq.u.ltoreq.1.0, 2.0.ltoreq.v.ltoreq.2.3, and 1.9.ltoreq.w.ltoreq.2.1.
摘要翻译：将包含金属的液体前体涂层施加到第一电极，在氧气环境中在不高于300℃的温度下在热板上烘烤五分钟，然后在675℃下进行RTP退火30秒。然后将涂层在氧气或氮气环境中在700℃下退火1小时，以形成厚度不超过90nm的层状超晶格材料薄膜。施加第二电极以形成电容器，并且在氧气或氮气环境中在不超过700℃的温度下进行后退火。如果该材料是钽酸铋锶，则该前体含有痣的锶，v 铋的摩尔当量和钽的摩尔当量，其中0.8为2.0，2.0

2. 发明授权

US06924997B2 Ferroelectric memory and method of operating same 有权
标题翻译：铁电存储器和操作方法相同
公开(公告)号：US06924997B2
公开(公告)日：2005-08-02
申请号：US10381235
申请日：2001-09-25
申请人： Zheng Chen , Vikram Joshi , Myoungho Lim , Carlos A. Paz de Araujo , Larry D. McMillan , Yoshihisa Kato , Tatsuo Otsuki , Yasuhiro Shimada
发明人： Zheng Chen , Vikram Joshi , Myoungho Lim , Carlos A. Paz de Araujo , Larry D. McMillan , Yoshihisa Kato , Tatsuo Otsuki , Yasuhiro Shimada
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A ferroelectric memory 636 includes a group of memory cells (645, 12, 201, 301, 401, 501), each cell having a ferroelectric memory element (44, 218, etc.), a drive line (122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line (25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier (20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch (14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch (16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.
摘要翻译：铁电存储器636包括一组存储单元（645,12,21,301,401,501），每个单元具有铁电存储元件（44,218等），驱动线（122,322,422， 522等），在其上放置用于将信息写入到存储器单元组的电压，位线（25,49,125,325,425,525等），其中要从该组存储器单元读出的信息放置存储器单元，在存储器单元和位线之间的前置放大器（20,42,120,320,420等），连接在存储器单元之间的设定开关（14,114,314,414,514等）驱动线和存储器单元，以及与前置放大器并联连接到存储器单元的复位开关（16,116,316,416,516等）。通过将小于铁电存储元件的矫顽电压的电压放置在存储元件上来读取存储器。在读取之前，通过使铁电存储元件的两个电极接地来放电来自该组电池的噪声。

3. 发明授权

US5759923A Method and apparatus for fabricating silicon dioxide and silicon glass layers in integrated circuits 失效
标题翻译：用于在集成电路中制造二氧化硅和硅玻璃层的方法和装置
公开(公告)号：US5759923A
公开(公告)日：1998-06-02
申请号：US615806
申请日：1996-03-14
申请人： Larry D. McMillan , Michael C. Scott , Carlos A. Paz de Araujo , Tatsuo Otsuki , Shinichiro Hayashi
发明人： Larry D. McMillan , Michael C. Scott , Carlos A. Paz de Araujo , Tatsuo Otsuki , Shinichiro Hayashi
IPC分类号： B05D1/00 , B05D3/04 , B05D7/24 , C23C16/44 , C23C16/448 , C23C16/455 , C23C16/46 , C23C16/48 , C23C16/52 , C23C18/12 , C23C18/14 , C23C26/02 , C30B7/00 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/115 , H01L41/24 , H05K3/10 , H01L21/00
CPC分类号： H01L21/316 , B05D1/00 , B05D1/60 , B05D3/0493 , C23C16/4412 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/1212 , C23C18/1287 , C23C18/14 , C23C26/02 , C30B29/68 , C30B7/00 , H01L21/314 , H01L21/31691 , H01L27/11502 , H01L28/56 , H01L28/60 , H01L41/316 , H01L28/55 , H05K3/105
摘要： A precursor liquid comprising silicon in a xylenes solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of silicon dioxide or silicon glass on the substrate. Then an integrated circuit is completed to include at least a portion of the silicon dioxide or silicon glass layer as an insulator for an electronic device in the integrated circuit.
摘要翻译：制备在二甲苯溶剂中包含硅的前体液体，将基底放置在真空沉积室内，使前体液体雾化，并将雾流入沉积室，同时将室保持在环境温度以沉积一层前体液体在基底上。将液体干燥，烘烤和退火以在基底上形成二氧化硅或硅玻璃的薄膜。然后，完成集成电路以将至少一部分二氧化硅或硅玻璃层作为集成电路中的电子器件的绝缘体。

4. 发明授权

US06541806B2 Ferroelectric device with capping layer and method of making same 有权
公开(公告)号：US06541806B2
公开(公告)日：2003-04-01
申请号：US09229883
申请日：1999-01-14
申请人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
发明人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
IPC分类号： H01L27108
CPC分类号： H01L28/56 , H01L21/31691
摘要： A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.

5. 发明授权

US06469334B2 Ferroelectric field effect transistor 失效
标题翻译：铁电场效应晶体管
公开(公告)号：US06469334B2
公开(公告)日：2002-10-22
申请号：US09821596
申请日：2001-03-29
申请人： Koji Arita , Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
发明人： Koji Arita , Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
IPC分类号： H01L2994
CPC分类号： H01L28/56 , H01L21/28291 , H01L29/516 , H01L29/78391
摘要： A ferroelectric FET having an interface insulator layer containing ZrO2. The ferroelectric FET includes a gate oxide layer, the interface insulator layer is located on the gate oxide layer, and ferroelectric layered superlattice material is located on the interface insulator layer, The interface insulator layer has a thickness of from 15 to 25 nanometers.
摘要翻译：具有含有ZrO 2的界面绝缘体层的铁电FET。铁电FET包括栅极氧化物层，界面绝缘体层位于栅极氧化物层上，并且铁电层状超晶格材料位于界面绝缘体层上。界面绝缘体层的厚度为15至25纳米。

6. 发明授权

US06255121B1 Method for fabricating ferroelectric field effect transistor having an interface insulator layer formed by a liquid precursor 失效
标题翻译：具有由液体前体形成的界面绝缘体的铁电场效应晶体管的制造方法
公开(公告)号：US06255121B1
公开(公告)日：2001-07-03
申请号：US09258489
申请日：1999-02-26
申请人： Koji Arita , Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
发明人： Koji Arita , Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
IPC分类号： H01L2100
CPC分类号： H01L28/56 , H01L21/28291 , H01L29/516 , H01L29/78391
摘要： A method for forming an interface insulator layer in a ferroelectric FET memory, in which a liquid precursor is applied to a semiconductor substrate. Preferably, the liquid precursor is an enhanced metalorganic decomposition (“EMOD”) precursor, applied using a liquid-source misted deposition technique. Preferably, the EMOD precursor solution applied to the substrate contains metal ethylhexanoates containing metal moieties in relative molar proportions for forming an interface insulator layer containing ZrO2, CeO2, Y2O3 or (Ce1-xZrx)O2, wherein 0≦x≦1.
摘要翻译：一种用于在铁电FET存储器中形成界面绝缘体层的方法，其中将液体前体施加到半导体衬底。优选地，液体前体是使用液体源雾化沉积技术施加的增强的金属有机分解（“EMOD”）前体。优选地，施加到基底上的EMOD前体溶液含有相对摩尔比例含有金属部分的金属乙基己酸，以形成含有ZrO 2，CeO 2，Y 2 O 3或（Ce 1-x Zr x）O 2的界面绝缘体层，其中0≤x≤1。

7. 发明授权

US06653156B2 Ferroelectric device with capping layer and method of making same 有权
公开(公告)号：US06653156B2
公开(公告)日：2003-11-25
申请号：US10262034
申请日：2002-09-30
申请人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
发明人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
IPC分类号： H01L2100
CPC分类号： H01L28/56 , H01L21/31691
摘要： A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.

8. 发明授权

US6151241A Ferroelectric memory with disturb protection 失效
标题翻译：铁电存储器具有干扰保护
公开(公告)号：US6151241A
公开(公告)日：2000-11-21
申请号：US314800
申请日：1999-05-19
申请人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
发明人： Shinichiro Hayashi , Tatsuo Otsuki , Carlos A. Paz de Araujo
IPC分类号： G11C11/22 , H01L21/336 , H01L29/51 , G11C11/00
CPC分类号： H01L29/6684 , G11C11/22 , H01L29/516
摘要： A ferroelectric field effect transistor memory cell includes a thin film varistor located between the gate electrode and the ferroelectric layer. The varistor protects the ferroelectric layer from disturb voltage pulses arising from memory read, write and sense operations. A second electrode is located between the thin film varistor and the ferroelectric layer. The thin film ferroelectric is positioned over the channel of a transistor to operate as a ferroelectric gate. For voltages at which disturb voltages are likely to occur, the thin film varistor has a resistance obeying a formula R.sub.d >10.times.1/(2.pi.fC.sub.F), where R.sub.d is resistivity of the thin film varistor, f is an operating frequency of said memory, and C.sub.F is the capacitance of the ferroelectric layer. For voltages at or near the read and write voltage of the memory, the thin film varistor has a resistance obeying a formula R.sub.d
摘要翻译：铁电场效应晶体管存储单元包括位于栅电极和铁电层之间的薄膜变阻器。压敏电阻保护铁电层不受存储器读，写和读操作引起的干扰电压脉冲的影响。第二电极位于薄膜压敏电阻和铁电层之间。薄膜铁电体位于晶体管的沟道上方，用作铁电栅极。对于可能发生干扰电压的电压，薄膜压敏电阻具有遵循公式Rd> 10×1 /（2πfCF）的电阻，其中Rd是薄膜变阻器的电阻率，f是所述存储器的工作频率， CF是铁电层的电容。对于等于或接近存储器的读和写电压的电压，薄膜压敏电阻具有遵循公式Rd <0.1x1 /（2πfCF）的电阻。

9. 发明授权

US06447838B1 Integrated circuit capacitors with barrier layer and process for making the same 失效
标题翻译：具有阻挡层的集成电路电容器及其制造方法
公开(公告)号：US06447838B1
公开(公告)日：2002-09-10
申请号：US08543827
申请日：1995-10-16
申请人： Masamichi Azuma , Eiji Fujii , Yasuhiro Uemoto , Shinichiro Hayashi , Toru Nasu , Yoshihiro Shimada , Akihiro Matsuda , Tatsuo Otsuki , Michael C. Scott , Joseph D. Cuchiaro , Carlos A. Paz de Araujo
发明人： Masamichi Azuma , Eiji Fujii , Yasuhiro Uemoto , Shinichiro Hayashi , Toru Nasu , Yoshihiro Shimada , Akihiro Matsuda , Tatsuo Otsuki , Michael C. Scott , Joseph D. Cuchiaro , Carlos A. Paz de Araujo
IPC分类号： B05D512
CPC分类号： H01L28/75 , H01L21/28568 , H01L28/55 , H01L28/65 , Y10T29/42
摘要： A Ti/TiN adhesion/barrier layer is formed on a substrate and annealed. The anneal step is performed at a temperature within a good morphology range of 100° C. above a base barrier anneal temperature that depends on the thickness of said barrier layer. The base barrier anneal temperature is about 700° C. for a barrier thickness of about 1000 Å and about 800° C. for a barrier thickness of about 3000 Å. The barrier layer is 800 Å thick or thicker. A first electrode is formed, followed by a BST dielectric layer and a second electrode. A bottom electrode structure in which a barrier layer of TiN is sandwiched between two layers of platinum is also disclosed. The process and structures also produce good results with other capacitor dielectrics, including ferroelectrics such as strontium bismuth tantalate.
摘要翻译：在基板上形成Ti / TiN粘合/阻挡层并退火。退火步骤在取决于所述阻挡层的厚度的基本阻挡退火温度之上的100℃的良好形态范围内进行。对于约3000的屏障厚度，对于约1000和约800℃的阻挡层厚度，基底阻挡退火温度为约700℃。阻挡层厚度为800或更厚。形成第一电极，随后是BST介电层和第二电极。还公开了其中TiN阻挡层夹在两层铂之间的底部电极结构。该工艺和结构也与其他电容器电介质（包括铁电锶钽酸锶）等产生良好的结果。

10. 发明授权

US06265738B1 Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures 失效
公开(公告)号：US06265738B1
公开(公告)日：2001-07-24
申请号：US08810538
申请日：1997-03-03
申请人： Shinichiro Hayashi , Tatsuo Otsuki
发明人： Shinichiro Hayashi , Tatsuo Otsuki
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L21/768 , H01L28/55 , H01L28/60
摘要： A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by carefully controlled drying, soft baking, and annealing conditions.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式