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    • 4. 发明授权
    • Method and apparatus for manufacturing metal plate chip resistors
    • 制造金属板片式电阻器的方法和装置
    • US08973253B2
    • 2015-03-10
    • US14074858
    • 2013-11-08
    • Tatsuki HiranoKazuo Tanaka
    • Tatsuki HiranoKazuo Tanaka
    • H01C17/00H01C17/245
    • H01C17/006H01C17/245
    • The object of the invention is to provide a method and an apparatus that allow production of metal plate chip resistors having a relatively low resistance with high accuracy and yield through simple process. The object is achieved by apparatus for manufacturing metal plate chip resistors including cutting mold for cutting intermediate product strip transversely to obtain worked product chip, ohm meter for measuring the resistance of the worked product chip, control device having a calculating part for performing a calculation using the resistance measured by the ohm meter to work out a width in which the strip is to be cut transversely so as to obtain a worked product chip of a desired resistance, and cutting width adjustor for making an adjustment so that the strip is to be cut transversely in the width obtained from the calculating part.
    • 本发明的目的是提供一种通过简单的工艺制造具有相对较低电阻的金属板片式电阻器的方法和装置,其具有高精度和高产率。 该目的是通过用于制造金属板片电阻器的装置实现的,包括用于横向切割中间产品带的切割模具,以获得加工产品芯片,用于测量加工产品芯片的电阻的欧姆表,具有用于执行计算的计算部分的控制装置 由欧姆计测量的电阻以横向切割条的宽度,以获得期望电阻的加工产品芯片,以及用于进行调整的切割宽度调节器,使得条被切割 横向于从计算部分获得的宽度。
    • 5. 发明授权
    • Method and apparatus for manufacturing metal plate chip resistors
    • 制造金属板片式电阻器的方法和装置
    • US08590141B2
    • 2013-11-26
    • US13196078
    • 2011-08-02
    • Tatsuki HiranoKazuo Tanaka
    • Tatsuki HiranoKazuo Tanaka
    • H01C17/00
    • H01C17/006H01C17/245
    • The object of the invention is to provide a method and an apparatus that allow production of metal plate chip resistors having a relatively low resistance with high accuracy and yield through simple process. The object is achieved by apparatus 10 for manufacturing metal plate chip resistors including cutting mold 21 for cutting intermediate product strip 14 transversely to obtain worked product chip 16a, ohm meter 22 for measuring the resistance of the worked product chip 16a, control device 23 having a calculating part for performing a calculation using the resistance measured by the ohm meter 22 to work out a width in which the strip 14 is to be cut transversely so as to obtain a worked product chip of a desired resistance, and cutting width adjusting means 26, 27 for making an adjustment so that the strip 14 is to be cut transversely in the width obtained from the calculating part.
    • 本发明的目的是提供一种通过简单的工艺制造具有相对较低电阻的金属板片式电阻器的方法和装置,其具有高精度和高产率。 该目的是通过用于制造金属板片式电阻器的装置10实现的,包括用于横向切割中间产品条带14的切割模具21,以获得加工产品芯片16a,用于测量加工产品芯片16a的电阻的欧姆计22,具有 使用由欧姆计22测量的电阻进行计算的计算部分,以计算要横向切割条带14的宽度,以获得期望电阻的加工产品芯片;以及切割宽度调节装置26, 27,用于进行调整,使得条带14在从计算部分获得的宽度上横向切割。
    • 6. 发明授权
    • Motorcycle with supercharger
    • 带增压器的摩托车
    • US08584783B2
    • 2013-11-19
    • US13531361
    • 2012-06-22
    • Daisuke SaekiKazuo Tanaka
    • Daisuke SaekiKazuo Tanaka
    • B62M27/02
    • B62M7/02B62K19/30F02B33/32F02M35/162
    • A motorcycle includes a combustion engine (E) of a type, in which a cylinder block (34) protrudes upwardly from a crankcase (32), an air cleaner unit (42) for substantially purifying an air, and a supercharger (44) for taking a substantially purified air from the air cleaner unit (42) thereinto and supplying the air towards the combustion engine (E). The supercharger (44) is disposed rearwardly of the cylinder block (34) and the air cleaner unit (42) is disposed rearwardly thereof. Also, a surge tank (48) is disposed rearwardly upwardly of the cylinder block (34) of the combustion engine (E) and above the supercharger (44).
    • 摩托车包括一种内燃机(E),其中气缸体(34)从曲轴箱(32)向上突出,用于基本上净化空气的空气滤清器单元(42),以及增压器(44),用于 从空气滤清器单元(42)中取出基本上净化的空气并将空气供给到内燃机(E)。 增压器(44)设置在气缸体(34)的后方,空气滤清器单元(42)设置在气缸体的后方。 此外,缓冲罐(48)设置在内燃机(E)的气缸体(34)的上方的上方并且位于增压器(44)的上方。
    • 7. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • 半导体集成电路设备
    • US20130049864A1
    • 2013-02-28
    • US13589369
    • 2012-08-20
    • Natsuki IKEHATAKazuo TanakaTakeo TobaMasashi Arakawa
    • Natsuki IKEHATAKazuo TanakaTakeo TobaMasashi Arakawa
    • H03F3/45
    • G11C11/4091G11C7/10G11C7/1057G11C7/1072G11C7/1084G11C11/4076G11C11/4093G11C11/4096
    • An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.
    • 差分放大电路的输出信号特性得到改善。 当输入数据信号为低电平时,流过第一晶体管的电流将减小,并且第一电阻器和第二电阻器之间的连接(节点)的电位将增加。 该电位被输入(负反馈)到第二晶体管的栅极,并且由于该栅极电位增加,所以在增加的方向上调节尾部电流量。 当输入数据信号为高电平时,第一晶体管的电流增加,因此节点处的电位降低。 因此,第二晶体管的栅极电位(负反馈)减小,并且沿着减小的方向调整尾电流量。 因此,在输入波形的上升和下降中,延迟时间相对于输出波形的差别分别减小。
    • 10. 发明申请
    • STORAGE SYSTEM AND DATA MANAGEMENT METHOD
    • 存储系统和数据管理方法
    • US20110271066A1
    • 2011-11-03
    • US13179403
    • 2011-07-08
    • Tatsuya NINOMIYAKazuo Tanaka
    • Tatsuya NINOMIYAKazuo Tanaka
    • G06F12/00
    • G06F12/0868G06F12/0811G06F2212/284
    • The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
    • 本发明包括向外部设备发送/接收数据的CHA 110,从HDD单元200发送/接收数据的DKA140,具有主高速缓存存储器124的主高速缓存单元120,辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间,并且具有二级高速缓存存储器134,存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储 在二次高速缓存存储器134中的写入目标数据,并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。