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1. 发明申请

US20090008430A1 Solder-bonding process 审中-公开
标题翻译：焊接工艺
公开(公告)号：US20090008430A1
公开(公告)日：2009-01-08
申请号：US11825490
申请日：2007-07-06
申请人： Nagesh R. Basavanhally , Raymond A. Cirelli , Avinoam Kornblit
发明人： Nagesh R. Basavanhally , Raymond A. Cirelli , Avinoam Kornblit
IPC分类号： B23K1/20
CPC分类号： B23K1/0008 , B23K35/3006 , B23K35/3013 , B23K35/322 , B23K2101/36
摘要： Methods include providing substrate having substrate surface, forming metal-containing pad on substrate surface, and forming metal-containing protective shell enclosing metal-containing body on metal-containing pad. Methods may include forming sacrificial layer on metal-containing pad and including top surface and cavity, cavity having side wall extending between metal-containing pad and top surface; and forming metal-containing protective shell in cavity. Methods may also include providing first, second, third and fourth metal-containing pads on first, second, third and fourth substrate surfaces; forming first metal-containing protective shell on first or second metal-containing pad; forming second metal-containing protective shell on third or fourth metal-containing pad; heating first metal-containing protective shell to form solder-bond between first and second substrate surfaces; and heating second metal-containing protective shell to form solder-bond between third and fourth substrate surfaces.
摘要翻译：方法包括提供具有基板表面的基板，在基板表面上形成含金属垫，以及在含金属垫上形成包围含金属的主体的含金属保护壳。方法可以包括在含金属垫上形成牺牲层，并且包括顶表面和空腔，具有在含金属垫和顶表面之间延伸的侧壁的空腔; 并在空腔中形成含金属的保护壳。方法还可以包括在第一，第二，第三和第四衬底表面上提供第一，第二，第三和第四含金属焊盘; 在第一或第二含金属垫上形成第一含金属保护壳; 在第三或第四含金属垫上形成第二含金属保护壳; 加热第一含金属的保护壳，以在第一和第二基底表面之间形成焊料接合; 并加热第二含金属的保护壳，以在第三和第四衬底表面之间形成焊料接合。

2. 发明授权

US08343807B2 Process for making microelectronic element chips 失效
公开(公告)号：US08343807B2
公开(公告)日：2013-01-01
申请号：US12291974
申请日：2008-11-17
申请人： Vladimir Anatolyevich Aksyuk , Nagesh R Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
发明人： Vladimir Anatolyevich Aksyuk , Nagesh R Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
IPC分类号： H01L31/0224 , H01L23/535
CPC分类号： H01L21/6835 , B81B7/0006 , B81B7/04 , H01L21/486 , H01L21/6836 , H01L23/147 , H01L23/5384 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L2221/68318 , H01L2221/68327 , H01L2221/68372 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/1147 , H01L2224/11472 , H01L2224/13025 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/16 , H01L2224/81001 , H01L2224/81801 , H01L2924/0002 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/014 , H01L2924/14 , H01L2924/1461 , H01L2924/00 , H01L2224/05552
摘要： Apparatus including a chip substrate having a first chip surface facing away from a second chip surface; an array of microelectronic elements on the first chip surface; and an array of conductors each in communication with one of the microelectronic elements, the conductors passing through the chip substrate and fully spanning a distance between the first and second chip surfaces. Process including: providing an apparatus including a chip substrate having a first chip surface facing away from a second chip surface, an array of microelectronic elements being on the first chip surface, an array of conductors each being in communication with one of the microelectronic elements and partially spanning an average distance between the first and second chip surfaces; bonding a temporary support carrier onto the array of microelectronic elements; removing a portion of the chip substrate, thereby reducing the average distance between the first and second chip surfaces; and forming an under bump metallization pad at the second chip surface in electrical communication with a conductor.

3. 发明授权

US07474005B2 Microelectronic element chips 失效
标题翻译：微电子元件芯片
公开(公告)号：US07474005B2
公开(公告)日：2009-01-06
申请号：US11445072
申请日：2006-05-31
申请人： Vladimir Anatolyevich Aksyuk , Nagesh R Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
发明人： Vladimir Anatolyevich Aksyuk , Nagesh R Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L21/6835 , B81B7/0006 , B81B7/04 , H01L21/486 , H01L21/6836 , H01L23/147 , H01L23/5384 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L2221/68318 , H01L2221/68327 , H01L2221/68372 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/1147 , H01L2224/11472 , H01L2224/13025 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/16 , H01L2224/81001 , H01L2224/81801 , H01L2924/0002 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/014 , H01L2924/14 , H01L2924/1461 , H01L2924/00 , H01L2224/05552
摘要： Apparatus including a chip substrate having a first chip surface facing away from a second chip surface; an array of microelectronic elements on the first chip surface; and an array of conductors each in communication with one of the microelectronic elements, the conductors passing through the chip substrate and fully spanning a distance between the first and second chip surfaces. Process including: providing an apparatus including a chip substrate having a first chip surface facing away from a second chip surface, an array of microelectronic elements being on the first chip surface, an array of conductors each being in communication with one of the microelectronic elements and partially spanning an average distance between the first and second chip surfaces; bonding a temporary support carrier onto the array of microelectronic elements; removing a portion of the chip substrate, thereby reducing the average distance between the first and second chip surfaces; and forming an under bump metallization pad at the second chip surface in electrical communication with a conductor.
摘要翻译：一种装置，包括具有背离第二芯片表面的第一芯片表面的芯片衬底; 第一芯片表面上的微电子元件阵列; 以及每个与所述微电子元件中的一个连通的导体阵列，所述导体穿过所述芯片基板并且完全跨越所述第一和第二芯片表面之间的距离。该方法包括：提供包括芯片衬底的装置，该芯片衬底具有背离第二芯片表面的第一芯片表面，位于第一芯片表面上的微电子元件阵列，每个导体阵列与微电子元件中的一个连接，部分跨越第一和第二芯片表面之间的平均距离; 将临时支撑载体接合到微电子元件阵列上; 去除所述芯片基板的一部分，从而减小所述第一和第二芯片表面之间的平均距离; 以及在所述第二芯片表面处形成与导体电连通的凸块下金属化焊盘。

4. 发明申请

US20070278699A1 Microelectronic element chips 失效
标题翻译：微电子元件芯片
公开(公告)号：US20070278699A1
公开(公告)日：2007-12-06
申请号：US11445072
申请日：2006-05-31
申请人： Vladimir A. Aksyuk , Nagesh R. Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
发明人： Vladimir A. Aksyuk , Nagesh R. Basavanhally , Avinoam Kornblit , Warren Yiu-Cho Lai , Joseph Ashley Taylor , Robert Francis Fullowan
IPC分类号： H01L23/48
CPC分类号： H01L21/6835 , B81B7/0006 , B81B7/04 , H01L21/486 , H01L21/6836 , H01L23/147 , H01L23/5384 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L2221/68318 , H01L2221/68327 , H01L2221/68372 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/1147 , H01L2224/11472 , H01L2224/13025 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/16 , H01L2224/81001 , H01L2224/81801 , H01L2924/0002 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/014 , H01L2924/14 , H01L2924/1461 , H01L2924/00 , H01L2224/05552
摘要： Apparatus including a chip substrate having a first chip surface facing away from a second chip surface; an array of microelectronic elements on the first chip surface; and an array of conductors each in communication with one of the microelectronic elements, the conductors passing through the chip substrate and fully spanning a distance between the first and second chip surfaces. Process including: providing an apparatus including a chip substrate having a first chip surface facing away from a second chip surface, an array of microelectronic elements being on the first chip surface, an array of conductors each being in communication with one of the microelectronic elements and partially spanning an average distance between the first and second chip surfaces; bonding a temporary support carrier onto the array of microelectronic elements; removing a portion of the chip substrate, thereby reducing the average distance between the first and second chip surfaces; and forming an under bump metallization pad at the second chip surface in electrical communication with a conductor.
摘要翻译：一种装置，包括具有背离第二芯片表面的第一芯片表面的芯片衬底; 第一芯片表面上的微电子元件阵列; 以及每个与所述微电子元件中的一个连通的导体阵列，所述导体穿过所述芯片基板并且完全跨越所述第一和第二芯片表面之间的距离。该方法包括：提供包括芯片衬底的装置，该芯片衬底具有背离第二芯片表面的第一芯片表面，位于第一芯片表面上的微电子元件阵列，每个导体阵列与微电子元件中的一个连接，部分跨越第一和第二芯片表面之间的平均距离; 将临时支撑载体接合到微电子元件阵列上; 去除所述芯片基板的一部分，从而减小所述第一和第二芯片表面之间的平均距离; 以及在所述第二芯片表面处形成与导体电连通的凸块下金属化焊盘。

5. 发明授权

US07832462B2 Thermal energy transfer device 有权
标题翻译：热能传递装置
公开(公告)号：US07832462B2
公开(公告)日：2010-11-16
申请号：US12080408
申请日：2008-03-31
申请人： Nagesh R. Basavanhally , Marc Scott Hodes , Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Wonsuck Lee , Alan Michael Lyons , Todd Richard Salamon , Brijesh Vyas
发明人： Nagesh R. Basavanhally , Marc Scott Hodes , Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Wonsuck Lee , Alan Michael Lyons , Todd Richard Salamon , Brijesh Vyas
IPC分类号： F28D15/00
CPC分类号： F28D15/046
摘要： Device having first wick evaporator including first membrane and plurality of first thermally-conductive supports. First membrane has upper and lower surfaces. First membrane also has plurality of pores with upper pore ends at upper surface of first membrane and with lower pore ends at lower surface of first membrane. Each of first thermally-conductive supports has upper and lower support ends. Upper support ends of first thermally-conductive supports are in contact with first membrane. Each of first thermally-conductive supports has longitudinal axis extending between the upper and lower support ends, average cross-sectional area along axis, and membrane support cross-sectional area at upper support end, the membrane support cross-sectional area effectively being smaller than average cross-sectional area. First thermally-conductive supports are configured to conduct thermal energy from lower support ends of first thermally-conductive supports to first membrane. Process includes providing wick evaporator, providing liquid working fluid in contact with lower or upper surface of membrane, and causing liquid working fluid to be evaporated from liquid-vapor interface in membrane.
摘要翻译：具有第一灯芯蒸发器的设备包括第一膜和多个第一导热支撑件。第一膜具有上表面和下表面。第一膜还具有多个孔，第一膜的上表面具有上孔端，在第一膜的下表面具有较低的孔端。每个第一导热支撑件具有上和下支撑端。第一导热支撑件的上支撑端与第一膜接触。每个第一导热支撑件具有在上支撑端和下支撑端之间延伸的纵向轴线，沿着轴线的平均横截面积以及在上支撑端处的膜支撑横截面积，膜支撑横截面面积有效地小于平均横截面积。第一导热支撑件构造成将热能从第一导热支撑件的下支撑端传导到第一膜。工艺过程包括提供油芯蒸发器，提供与膜的下表面或上表面接触的液体工作流体，并使液体工作流体从膜中的液 - 气界面蒸发。

6. 发明申请

US20090242175A1 Thermal energy transfer device 有权
标题翻译：热能传递装置
公开(公告)号：US20090242175A1
公开(公告)日：2009-10-01
申请号：US12080408
申请日：2008-03-31
申请人： Nagesh R. Basavanhally , Marc Scott Hodes , Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Lee Wonsuck , Alan Michael Lyons , Todd Richard Salamon , Brijesh Vyas
发明人： Nagesh R. Basavanhally , Marc Scott Hodes , Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Lee Wonsuck , Alan Michael Lyons , Todd Richard Salamon , Brijesh Vyas
IPC分类号： F28D15/00
CPC分类号： F28D15/046
摘要： Device having first wick evaporator including first membrane and plurality of first thermally-conductive supports. First membrane has upper and lower surfaces. First membrane also has plurality of pores with upper pore ends at upper surface of first membrane and with lower pore ends at lower surface of first membrane. Each of first thermally-conductive supports has upper and lower support ends. Upper support ends of first thermally-conductive supports are in contact with first membrane. Each of first thermally-conductive supports has longitudinal axis extending between the upper and lower support ends, average cross-sectional area along axis, and membrane support cross-sectional area at upper support end, the membrane support cross-sectional area effectively being smaller than average cross-sectional area. First thermally-conductive supports are configured to conduct thermal energy from lower support ends of first thermally-conductive supports to first membrane. Process includes providing wick evaporator, providing liquid working fluid in contact with lower or upper surface of membrane, and causing liquid working fluid to be evaporated from liquid-vapor interface in membrane.
摘要翻译：具有第一灯芯蒸发器的设备包括第一膜和多个第一导热支撑件。第一膜具有上表面和下表面。第一膜还具有多个孔，第一膜的上表面具有上孔端，在第一膜的下表面具有较低的孔端。每个第一导热支撑件具有上和下支撑端。第一导热支撑件的上支撑端与第一膜接触。每个第一导热支撑件具有在上支撑端和下支撑端之间延伸的纵向轴线，沿着轴线的平均横截面积以及在上支撑端处的膜支撑横截面积，膜支撑横截面面积有效地小于平均横截面积。第一导热支撑件构造成将热能从第一导热支撑件的下支撑端传导到第一膜。工艺过程包括提供油芯蒸发器，提供与膜的下表面或上表面接触的液体工作流体，并使液体工作流体从膜中的液 - 气界面蒸发。

7. 发明授权

US08030199B2 Transistor fabrication method 有权
标题翻译：晶体管制造方法
公开(公告)号：US08030199B2
公开(公告)日：2011-10-04
申请号：US12689749
申请日：2010-01-19
申请人： Sailesh Chittipeddi , Taeho Kook , Avinoam Kornblit
发明人： Sailesh Chittipeddi , Taeho Kook , Avinoam Kornblit
IPC分类号： H01L21/00
CPC分类号： H01L29/7833 , H01L21/28518 , H01L29/665 , H01L29/66545 , H01L29/6659 , Y10S438/945
摘要： A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.
摘要翻译：公开了一种形成集成电路中没有通道的可控线宽的低堆叠高度晶体管的方法。使用掺杂玻璃的一次性硬掩模来限定栅极并且随后在形成源极和漏极的离子注入期间保护栅极（和下面的衬底）。可以形成各种硅化和非硅化的结构。

8. 发明授权

US08025271B2 Directed-flow conduit 有权
标题翻译：定向导管
公开(公告)号：US08025271B2
公开(公告)日：2011-09-27
申请号：US12080409
申请日：2008-03-31
申请人： Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Alan Michael Lyons , Todd Richard Salamon
发明人： Paul Robert Kolodner , Avinoam Kornblit , Thomas Nikita Krupenkin , Alan Michael Lyons , Todd Richard Salamon
IPC分类号： B01F3/04
CPC分类号： F15D1/065 , B33Y80/00 , Y10T137/0391 , Y10T137/87249
摘要： Device including channel having channel input and output. Channel has interior channel surface extending along channel path from channel input to output. In one implementation, channel includes plurality of channel sections in serial communication along channel path. Each of channel sections includes first internal circumference spaced apart along channel path from second internal circumference, in each of channel sections the first and second internal circumferences being substantially different. Each of channel sections includes sub-surface of interior channel surface. At least region of sub-surface of each channel section includes distribution of raised micro-scale features. As another implementation, at least first region of interior channel surface includes distribution of raised micro-scale features interrupted by plurality of raised barriers spaced apart along channel path on interior channel surface. Each raised barrier extends on interior channel surface in directions partially transverse to and partially parallel to longitudinal axis. Method also provided.
摘要翻译：设备包括具有通道输入和输出的通道。通道具有从通道输入到输出的通道路径延伸的内部通道表面。在一个实现中，信道包括沿着信道路径串行通信的多个信道段。每个通道部分包括沿着与第二内圆周的通道路径间隔开的第一内圆周，在每个通道部分中，第一和第二内圆周基本不同。每个通道部分包括内部通道表面的子表面。每个通道部分的子表面的至少区域包括凸起的微尺度特征的分布。作为另一实施方案，内部通道表面的至少第一区域包括由在内部通道表面上沿着通道路径间隔开的多个凸起的屏障中断的凸起的微尺度特征的分布。每个凸起的屏障在内部通道表面上沿与纵向轴线部分横向并部分平行的方向延伸。方法也提供。

9. 发明申请

US20090274580A1 METHOD AND APPARATUS FOR CONTROLLING THE MOVEMENT OF A LIQUID ON A NANOSTRUCTURED OR MICROSTRUCTURE SURFACE 有权
标题翻译：用于控制液体在纳米结构或微结构表面上的运动的方法和装置
公开(公告)号：US20090274580A1
公开(公告)日：2009-11-05
申请号：US12370219
申请日：2009-02-12
申请人： Avinoam Kornblit , Thomas Nikita Krupenkin , Mary Louise Mandick , Tobias Manuel Schneider , Joseph Ashley Taylor , Shu Yang
发明人： Avinoam Kornblit , Thomas Nikita Krupenkin , Mary Louise Mandick , Tobias Manuel Schneider , Joseph Ashley Taylor , Shu Yang
IPC分类号： B01L3/00
CPC分类号： B01F5/0619 , B01F13/0076 , B01F2005/0621 , B01F2005/0636 , B01J19/0093 , B01J2219/00783 , B01J2219/00833 , B01J2219/00853 , B01L3/50273 , B01L3/502746 , B01L3/5088 , B01L2300/089 , B01L2300/0896 , B01L2300/166 , B01L2300/168 , B01L2400/0406 , B01L2400/0415 , B01L2400/0688 , B01L2400/082 , B01L2400/088 , B41J2002/14395 , B81B1/00 , B81B2203/0361 , B82Y30/00 , G01N21/4788 , G01N21/552
摘要： A method and apparatus is disclosed wherein the movement of a droplet disposed on a nanostructured or microstructured surface is determined by at least one characteristic of the nanostructure feature pattern or at least one characteristic of the droplet. In one embodiment, the movement of the droplet is laterally determined by at least one characteristic of the nanostructure feature pattern such that the droplet moves in a desired direction along a nanostructured feature pattern. In another embodiment, the movement of the droplet is determined by either at least one characteristic of the nanostructure feature pattern or at least one characteristic of the droplet in a way such that the droplet penetrates the feature pattern at a desired area and becomes substantially immobile.
摘要翻译：公开了一种方法和装置，其中设置在纳米结构或微结构化表面上的液滴的移动通过纳米结构特征图案的至少一个特征或液滴的至少一个特征来确定。在一个实施例中，液滴的移动由纳米结构特征图案的至少一个特征横向确定，使得液滴沿着纳米结构特征图案在所需方向上移动。在另一个实施例中，液滴的运动由纳米结构特征图案的至少一个特性或液滴的至少一个特征确定，使得液滴以期望的区域穿透特征图案并且变得基本上不可移动。

10. 发明申请

US20080280403A1 TRANSISTOR FABRICATION METHOD 审中-公开
标题翻译：晶体管制造方法
公开(公告)号：US20080280403A1
公开(公告)日：2008-11-13
申请号：US12114589
申请日：2008-05-02
申请人： Sailesh Chittipeddi , Taeho Kook , Avinoam Kornblit
发明人： Sailesh Chittipeddi , Taeho Kook , Avinoam Kornblit
IPC分类号： H01L21/336
CPC分类号： H01L29/7833 , H01L21/28518 , H01L29/665 , H01L29/66545 , H01L29/6659 , Y10S438/945
摘要： A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.
摘要翻译：公开了一种形成集成电路中没有通道的可控线宽的低堆叠高度晶体管的方法。使用掺杂玻璃的一次性硬掩模来限定栅极并且随后在形成源极和漏极的离子注入期间保护栅极（和下面的衬底）。可以形成各种硅化和非硅化的结构。

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