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1. 发明申请

US20070290761A1 Signal amplifier circuit 有权
标题翻译：信号放大电路
公开(公告)号：US20070290761A1
公开(公告)日：2007-12-20
申请号：US11783327
申请日：2007-04-09
申请人： Mutsuo Nishikawa , Katsumichi Ueyanagi , Katsuyuki Uematsu , Yuko Fujimoto
发明人： Mutsuo Nishikawa , Katsumichi Ueyanagi , Katsuyuki Uematsu , Yuko Fujimoto
IPC分类号： H03F1/34
CPC分类号： H03F3/45 , G01D3/021 , G01D3/028 , G01L27/007
摘要： A signal amplifier circuit includes a negative feedback amplifier circuit having an output terminal, a first voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a second voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a first reference voltage supply applying a first reference voltage to the first voltage limiting device, a second reference voltage supply applying a second reference voltage to the second voltage limiting device. The first voltage limiting device is configured to fix a lower limit saturation voltage at the first reference voltage. The second voltage limiting device is configured to fix an upper limit saturation voltage at the second reference voltage.
摘要翻译：信号放大器电路包括具有输出端子的负反馈放大器电路，用于限制来自负反馈放大器电路的输出电压的第一电压限制装置，用于限制来自负反馈放大器电路的输出电压的第二电压限制装置，将第一参考电压施加到所述第一电压限制装置的第一参考电压源，向所述第二电压限制装置施加第二参考电压的第二参考电压电源。第一限压装置被配置为固定第一参考电压的下限饱和电压。第二电压限制装置被配置为将第二参考电压的上限饱和电压固定。

2. 发明授权

US07525389B2 Signal amplifier circuit with a limiting voltage device 有权
标题翻译：信号放大电路具有极限电压装置
公开(公告)号：US07525389B2
公开(公告)日：2009-04-28
申请号：US11783327
申请日：2007-04-09
申请人： Mutsuo Nishikawa , Katsumichi Ueyanagi , Katsuyuki Uematsu , Yuko Fujimoto
发明人： Mutsuo Nishikawa , Katsumichi Ueyanagi , Katsuyuki Uematsu , Yuko Fujimoto
IPC分类号： H03F1/52
CPC分类号： H03F3/45 , G01D3/021 , G01D3/028 , G01L27/007
摘要： A signal amplifier circuit includes a negative feedback amplifier circuit having an output terminal, a first voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a second voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a first reference voltage supply applying a first reference voltage to the first voltage limiting device, a second reference voltage supply applying a second reference voltage to the second voltage limiting device. The first voltage limiting device is configured to fix a lower limit saturation voltage at the first reference voltage. The second voltage limiting device is configured to fix an upper limit saturation voltage at the second reference voltage.
摘要翻译：信号放大器电路包括具有输出端子的负反馈放大器电路，用于限制来自负反馈放大器电路的输出电压的第一电压限制装置，用于限制来自负反馈放大器电路的输出电压的第二电压限制装置，将第一参考电压施加到所述第一电压限制装置的第一参考电压源，向所述第二电压限制装置施加第二参考电压的第二参考电压电源。第一限压装置被配置为固定第一参考电压的下限饱和电压。第二电压限制装置被配置为将第二参考电压的上限饱和电压固定。

3. 发明申请

US20050024998A1 Servo control method and servo control circuit, and optical disk device having the same servo control circuit 审中-公开
标题翻译：伺服控制方法和伺服控制电路，以及具有相同伺服控制电路的光盘装置
公开(公告)号：US20050024998A1
公开(公告)日：2005-02-03
申请号：US10900337
申请日：2004-07-28
申请人： Yukio Inoue , Kazuyuki Yamaguchi , Taizou Kusano , Kazuhisa Hayashida , Yuichi Udo , Yuko Fujimoto , Hiromi Kuriyama , Takashi Ooishi , Yasuhiro Kaneo , Ryo Ando
发明人： Yukio Inoue , Kazuyuki Yamaguchi , Taizou Kusano , Kazuhisa Hayashida , Yuichi Udo , Yuko Fujimoto , Hiromi Kuriyama , Takashi Ooishi , Yasuhiro Kaneo , Ryo Ando
IPC分类号： G11B7/00 , G11B7/09 , G11B20/18 , G11B21/03
CPC分类号： G11B7/0948 , G11B20/18 , G11B20/1816
摘要： A servo error signal and a defect detection signal are generated from an output signal of the pickup unit, and a servo control signal and a hold signal are generated from the servo error signal. When changing to either a servo control signal or a hold signal based on the defect detection signal generated in a defect detection signal generation circuit which has a peak hold circuit having different tracking ability, so as to perform servo control of the pickup unit, a servo error signal predetermined time before a timing to change from the servo control signal to the hold signal is used as the servo error signal used for generation of the hold signal.
摘要翻译：从拾取单元的输出信号产生伺服误差信号和缺陷检测信号，并且从伺服误差信号产生伺服控制信号和保持信号。基于在具有不同跟踪能力的峰值保持电路的缺陷检测信号发生电路中产生的缺陷检测信号，当改变为伺服控制信号或保持信号时，为了执行拾取单元的伺服控制，伺服将从伺服控制信号改变为保持信号的定时之前的预定时间的误差信号用作用于产生保持信号的伺服误差信号。

4. 发明授权

US08258043B2 Manufacturing method of thin film semiconductor substrate 有权
标题翻译：薄膜半导体衬底的制造方法
公开(公告)号：US08258043B2
公开(公告)日：2012-09-04
申请号：US13225039
申请日：2011-09-02
申请人： Toshiyuki Sameshima , Yutaka Inouchi , Takeshi Matsumoto , Yuko Fujimoto
发明人： Toshiyuki Sameshima , Yutaka Inouchi , Takeshi Matsumoto , Yuko Fujimoto
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/268 , H01L21/26506 , H01L21/2658 , H01L21/76254
摘要： A manufacturing method of a thin film semiconductor substrate includes implanting ions at a specified depth into a semiconductor substrate, forming a bubble layer in the semiconductor substrate by vaporizing the ions through heating, bonding an insulating substrate onto the semiconductor substrate, and cleaving the semiconductor substrate along the bubble layer to form a semiconductor thin film on a side of the insulating substrate. At the forming, the semiconductor substrate is heated at a temperature in a temperature range of approximately 1000° C. to 1200° C. for a duration in a range of approximately 10 μs to 100 ms. The heating of the semiconductor substrate is performed by using, for example, a light beam.
摘要翻译：薄膜半导体衬底的制造方法包括将特定深度的离子注入到半导体衬底中，通过加热使绝缘体气化，在半导体衬底中形成气泡层，将绝缘衬底接合到半导体衬底上，并切割半导体衬底沿着气泡层在绝缘基板的一侧形成半导体薄膜。在成形时，将半导体衬底在大约1000℃至1200℃的温度范围内加热约10μs至100ms的范围。通过使用例如光束来进行半导体衬底的加热。

5. 发明申请

US20110207306A1 SEMICONDUCTOR STRUCTURE MADE USING IMPROVED ION IMPLANTATION PROCESS 审中-公开
标题翻译：使用改进的离子植入工艺制备半导体结构
公开(公告)号：US20110207306A1
公开(公告)日：2011-08-25
申请号：US12709833
申请日：2010-02-22
申请人： Sarko Cherekdjian , Yuko Fujimoto , Richard Orr Maschmeyer , Takeshi Matsumoto
发明人： Sarko Cherekdjian , Yuko Fujimoto , Richard Orr Maschmeyer , Takeshi Matsumoto
IPC分类号： H01L21/265
CPC分类号： H01L21/76254
摘要： Methods and apparatus for producing a semiconductor structure include: subjecting an implantation surface of a semiconductor wafer to an ion implantation process to create an exfoliation layer therein, wherein the ion implantation process includes simultaneously implanting two different species of ions into the implantation surface of the semiconductor wafer.
摘要翻译：用于制造半导体结构的方法和装置包括：使半导体晶片的注入表面进行离子注入工艺以在其中产生剥离层，其中离子注入工艺包括同时将两种不同种类的离子注入到半导体的注入表面中晶圆。

6. 发明申请

US20120077331A1 MANUFACTURING METHOD OF THIN FILM SEMICONDUCTOR SUBSTRATE 有权
标题翻译：薄膜半导体基板的制造方法
公开(公告)号：US20120077331A1
公开(公告)日：2012-03-29
申请号：US13225039
申请日：2011-09-02
申请人： Toshiyuki SAMESHIMA , Yutaka Inouchi , Takeshi Matsumoto , Yuko Fujimoto
发明人： Toshiyuki SAMESHIMA , Yutaka Inouchi , Takeshi Matsumoto , Yuko Fujimoto
IPC分类号： H01L21/304
CPC分类号： H01L21/268 , H01L21/26506 , H01L21/2658 , H01L21/76254
摘要： A manufacturing method of a thin film semiconductor substrate includes implanting ions at a specified depth into a semiconductor substrate, forming a bubble layer in the semiconductor substrate by vaporizing the ions through heating, bonding an insulating substrate onto the semiconductor substrate, and cleaving the semiconductor substrate along the bubble layer to form a semiconductor thin film on a side of the insulating substrate. At the forming, the semiconductor substrate is heated at a temperature in a temperature range of approximately 1000° C. to 1200° C. for a duration in a range of approximately 10 μs to 100 ms. The heating of the semiconductor substrate is performed by using, for example, a light beam.
摘要翻译：薄膜半导体衬底的制造方法包括将特定深度的离子注入到半导体衬底中，通过加热使绝缘体气化，在半导体衬底中形成气泡层，将绝缘衬底接合到半导体衬底上，并切割半导体衬底沿着气泡层在绝缘基板的一侧形成半导体薄膜。在成形时，将半导体衬底在大约1000℃至1200℃的温度范围内加热约10μs至100ms的范围。通过使用例如光束来进行半导体衬底的加热。

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