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    • 1. 发明申请
    • Power semiconductor device
    • 功率半导体器件
    • US20080164490A1
    • 2008-07-10
    • US12007890
    • 2008-01-16
    • Munaf RahimoPeter Streit
    • Munaf RahimoPeter Streit
    • H01L29/745H01L21/332
    • H01L29/102H01L29/744
    • The power semiconductor device with a four-layer npnp structure can be turned-off via a gate electrode. The first base layer comprises a cathode base region adjacent to the cathode region and a gate base region adjacent to the gate electrode, but disposed at a distance from the cathode region. The gate base region has the same nominal doping density as the cathode base region in at least one first depth, the first depth being given as a perpendicular distance from the side of the cathode region, which is opposite the cathode metallization. The gate base region has a higher doping density than the cathode base region and/or the gate base region has a greater depth than the cathode base region in order to modulate the field in blocking state and to defocus generated holes from the cathode when driven into dynamic avalanche.
    • 具有四层npnp结构的功率半导体器件可以通过栅电极截止。 第一基极层包括与阴极区域相邻的阴极基极区域和与栅极电极相邻但与阴极区域相距一定距离的栅极基极区域。 栅极基极区域在至少一个第一深度中具有与阴极基极区域相同的标称掺杂密度,第一深度被给定为与阴极金属化相对的阴极区域侧的垂直距离。 栅极基极区域具有比阴极基极区域更高的掺杂密度和/或栅极基极区域具有比阴极基极区域更大的深度,以便调制阻塞状态下的场并且当被驱动进入时将其从阴极散焦 动态雪崩
    • 2. 发明授权
    • Power semiconductor device
    • 功率半导体器件
    • US07816706B2
    • 2010-10-19
    • US12007890
    • 2008-01-16
    • Munaf RahimoPeter Streit
    • Munaf RahimoPeter Streit
    • H01L29/745H01L21/332
    • H01L29/102H01L29/744
    • The power semiconductor device with a four-layer npnp structure can be turned-off via a gate electrode. The first base layer comprises a cathode base region adjacent to the cathode region and a gate base region adjacent to the gate electrode, but disposed at a distance from the cathode region. The gate base region has the same nominal doping density as the cathode base region in at least one first depth, the first depth being given as a perpendicular distance from the side of the cathode region, which is opposite the cathode metallization. The gate base region has a higher doping density than the cathode base region and/or the gate base region has a greater depth than the cathode base region in order to modulate the field in blocking state and to defocus generated holes from the cathode when driven into dynamic avalanche.
    • 具有四层npnp结构的功率半导体器件可以通过栅电极截止。 第一基极层包括与阴极区域相邻的阴极基极区域和与栅极电极相邻但与阴极区域相距一定距离的栅极基极区域。 栅极基极区域在至少一个第一深度中具有与阴极基极区域相同的标称掺杂密度,第一深度被给定为与阴极金属化相对的阴极区域侧的垂直距离。 栅极基极区域具有比阴极基极区域更高的掺杂密度和/或栅极基极区域具有比阴极基极区域更大的深度,以便调制阻塞状态下的场并且当被驱动进入时将其从阴极散焦 动态雪崩
    • 4. 发明授权
    • Method for driving a power semiconductor
    • 驱动功率半导体的方法
    • US06812772B2
    • 2004-11-02
    • US10246407
    • 2002-09-19
    • Oscar ApeldoornEric CarrollPeter StreitAndré Weber
    • Oscar ApeldoornEric CarrollPeter StreitAndré Weber
    • H03K1772
    • H03K17/0403H03K17/08124H03K17/105
    • The integrated gate dual transistor (IGDT) has two controllable gates (G1, G2), a first gate (G1) being provided on the cathode side and being driven via a low-inductance first gate terminal with a first gate current, and a second gate (G2) being provided on the anode side and being driven via a low-inductance second gate terminal with a second gate current. In the switch-off operation of the IGDT, the rate of rise of the voltage across the IGDT is limited via the two gates. Limiting the rate of rise of the voltage across the IGDT prevents voltages from building up at different speeds in a series circuit of IGDTs, and thus unequal loads from overheating and destroying the individual IGDTs.
    • 集成栅极双晶体管(IGDT)具有两个可控制栅极(G1,G2),第一栅极(G1)设置在阴极侧并通过具有第一栅极电流的低电感第一栅极端子驱动,第二栅极 栅极(G2)设置在阳极侧,并通过具有第二栅极电流的低电感第二栅极端子驱动。 在IGDT的关断操作中,IGDT两端的电压上升速率通过两个门限制。 限制IGDT两端电压的上升速率可防止IGDT串联电路中以不同速度建立电压,从而防止各个IGDT过热和破坏的负载不相等。
    • 5. 发明授权
    • Electric contact arrangement for liquid crystal display cells
    • 液晶显示单元的电接触装置
    • US4629289A
    • 1986-12-16
    • US589316
    • 1984-03-14
    • Peter Streit
    • Peter Streit
    • G09F9/00G02F1/13G02F1/1345
    • G02F1/13452
    • An electric contact arrangement for liquid crystal display cells is disclosed which consists of a multi-point connector having an internal embedded integrated circuit. The contact arrangement contains contacts to a liquid crystal display cell, and external terminals to appropriate circuitry. The contact arrangement can be plugged into the side of the liquid crystal display cell in order to remain outside the display or illumination zone. The embedded integrated circuit is located in the immediate vicinity of the contacts from the liquid crystal cell inserted into the multi-point connector. By this means the electrical losses and outlay on the connections are considerably reduced.
    • 公开了一种用于液晶显示单元的电接触装置,其由具有内部嵌入式集成电路的多点连接器组成。 接触装置包含与液晶显示单元的触点,以及与适当电路的外部端子。 接触装置可以插入到液晶显示单元的一侧,以便保持在显示器或照明区域的外部。 嵌入式集成电路位于从插入多点连接器的液晶单元的触点附近。 通过这种方式,连接上的电损耗和费用大大降低。
    • 6. 发明授权
    • Bilaterally controllable thyristor
    • 双向可控晶闸管
    • US6078065A
    • 2000-06-20
    • US46522
    • 1998-03-24
    • Peter StreitKenneth Thomas
    • Peter StreitKenneth Thomas
    • H01L29/74H01L29/08H01L29/747
    • H01L29/0839H01L29/747
    • A specification is given of a bidirectionally controllable thyristor which is distinguished by improved decoupling between the two thyristor structures. In particular, the intention is that the switched-off structure cannot be triggered in an uncontrolled manner by undesirable migration of charge carriers. This is achieved by virtue of the fact that the degree of shorting of the cathode region increases toward the isolation region. In particular, this can be achieved by virtue of the fact that the density per unit area of the short-circuit regions tends to a maximum value toward the isolation region. The use of a linear, continuous short-circuit region running along the isolation region is particularly favorable. (FIG. 1).
    • 给出了一种双向可控晶闸管的规范,其可通过两个晶闸管结构之间的改进的去耦来区分。 特别地,其目的是通过电荷载体的不期望的迁移不能以不受控制的方式触发关断结构。 这是通过阴极区域的短路程度朝向隔离区域增加的事实来实现的。 特别地,这可以通过以下事实来实现:短路区域的每单位面积的密度趋向于朝向隔离区域的最大值。 使用沿着隔离区域延伸的线性连续短路区域是特别有利的。 (图。1)。
    • 7. 发明授权
    • Liquid crystal display device
    • 液晶显示装置
    • US4684939A
    • 1987-08-04
    • US497189
    • 1983-05-23
    • Peter Streit
    • Peter Streit
    • G09G3/36G02F1/133G02F1/1335G09F9/00
    • G02F1/133553
    • A liquid crystal display device having two linear polarisers and a nematic liquid crystal with positive dielectric anisotropy. The liquid crystal is illuminated by a light source which is arranged in a fixed spatial relationship to the display. Behind the display, a diffusely scattering, metallic reflector is provided. The angle of incidence of the light relative to the perpendicular on the surface of the front carrier plate is in the range from 50.degree. to 90.degree., preferably between 70.degree. and 80.degree.. The operating voltage of the display device according to the invention is less than 2.0 times the Freedericksz threshold voltage of the liquid crystal. In this way, optimum contrast is achieved, coupled with a very large range of viewing angle. With this display device, very high multiplex rates (up to 1:120) can be reached.
    • 具有两个线性偏振器和具有正介电各向异性的向列型液晶的液晶显示装置。 液晶由与显示器以固定的空间关系排列的光源照射。 在显示器后面,提供了漫反射的金属反射器。 光相对于前承载板表面垂直的入射角在50°至90°的范围内,优选在70°至80°之间。 根据本发明的显示装置的工作电压小于液晶的Freedericksz阈值电压的2.0倍。 以这种方式,实现了最佳的对比度,并且具有非常大的视角范围。 使用该显示设备,可以达到非常高的多路复用速率(高达1:120)。
    • 9. 发明授权
    • Anode-side short structure for asymmetric thyristors
    • 用于不对称晶闸管的阳极侧短路结构
    • US5644149A
    • 1997-07-01
    • US406060
    • 1995-03-17
    • Peter Streit
    • Peter Streit
    • H01L29/08H01L29/74H01L29/744H01L31/111
    • H01L29/7432H01L29/0834
    • A thyristor according to the invention comprises a layer sequence containing an n-type emitter layer (4), a p-type base layer (5), an n-type base layer (6) and a p-type emitter layer (7) in a semiconductor substrate (3) between an anode (1) and a cathode (2). The p-type emitter layer (7) is perforated by anode short-circuit zones (8) and is thereby subdivided into sections. In this arrangement, the anode short circuits (8) short-circuit the n-type base layer (6) to the anode (1). Disposed between the anode short circuits (8) and the p-type emitter layer (7) is a p-type barrier layer (9), also referred to as p-type soft layer. According to the invention, said p-type barrier layer (9) has gaps (12) in which the n-type base (6) is contacted by the anode (1) either directly or via an anode short circuit (8).
    • 根据本发明的晶闸管包括包含n型发射极层(4),p型基极层(5),n型基极层(6)和p型发射极层(7)的层序列, 在阳极(1)和阴极(2)之间的半导体衬底(3)中。 p型发射极层(7)被阳极短路区域(8)穿孔,从而被细分为多个部分。 在这种布置中,阳极短路(8)将n型基极层(6)短路到阳极(1)。 设置在阳极短路(8)和p型发射极层(7)之间的是p型阻挡层(9),也称为p型软质层。 根据本发明,所述p型阻挡层(9)具有间隙(12),其中n型基底(6)直接或经由阳极短路(8)与阳极(1)接触。
    • 10. 发明授权
    • Semiconductor component having gate-turn-off thyristor and reduced
thermal impairment
    • 半导体元件具有栅极截止晶闸管和减少热损伤
    • US5587594A
    • 1996-12-24
    • US375662
    • 1995-01-20
    • Andre JaecklinEzatollah RamezaniPeter RoggwillerAndreas RueggThomas StockmeierPeter StreitJurg Waldmeyer
    • Andre JaecklinEzatollah RamezaniPeter RoggwillerAndreas RueggThomas StockmeierPeter StreitJurg Waldmeyer
    • H01L29/74H01L29/744
    • H01L21/263H01L29/744H01L2924/0002
    • To provide thermal relief, particularly of the edge of disk-shaped gate-turn-off GTO thyristors (GTO) as are used in converters in power electronics, at least one cooling segment which is isolated from a GTO cathode metallization of the GTO thyristor segment (GTO) by a gate electrode metallization of a gate electrode is arranged on the edge and laterally adjacent to the GTO thyristor segment (GTO). An insulation layer is provided between a cooling segment metallization and the gate electrode metallization. Cooling segments in an lo outer annular zone can be alternately arranged with GTO thyristor segments (GTO) or offset towards the outside in the radial direction or perpendicular direction thereto. Instead of cooling segments, a p.sup.+ -type GTO emitter layer of the GTO thyristor segments (GTO) can be shortened at the edge in the outer annular zone. The edge side of these GTO thyristor segments (GTO) can exhibit a shorter charge carrier life than the remaining semiconductor body due to irradiation with electrons, protons or .alpha.-particles, which results in a lower operating current in this area. An ohmic impedance can be connected in series with a diode between a gate electrode and a cathode of the GTO thyristor (GTO) for stabilizing the trigger threshold and reducing its temperature dependence.
    • 为了提供热释放,特别是在电力电子设备中用于转换器中的盘形栅极关断GTO晶闸管(GTO)的边缘的至少一个冷却段,其与GTO晶闸管段的GTO阴极金属化隔离 (GTO)通过栅电极的栅电极排列在GTO晶闸管片段(GTO)的边缘和横向上。 在冷却段金属化和栅电极金属化之间提供绝缘层。 在外环形区域中的冷却段可以与GTO晶闸管片段(GTO)交替布置,或者在径向或与其垂直的方向上向外偏移。 代替冷却段,GTO晶闸管段(GTO)的p +型GTO发射极层可以在外环形区域的边缘处被缩短。 这些GTO晶闸管片段(GTO)的边缘侧可以表现出比由于电子,质子或α粒子照射而导致的剩余半导体本体更短的电荷载体寿命,这导致在该区域中较低的工作电流。 欧姆阻抗可以与GTO晶闸管(GTO)的栅电极和阴极之间的二极管串联连接,用于稳定触发阈值并降低其温度依赖性。