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    • 6. 发明授权
    • Network-extended storage
    • 网络扩展存储
    • US07849267B2
    • 2010-12-07
    • US11428008
    • 2006-06-30
    • Monica Sin-Ling LamKelvin YueRamesh ChandraConstantine P. SapuntzakisJohn WhaleyGuy Messalem
    • Monica Sin-Ling LamKelvin YueRamesh ChandraConstantine P. SapuntzakisJohn WhaleyGuy Messalem
    • G06F12/00
    • G06F17/30067
    • Methods and apparatus, including computer program products, for network-extended storage. A portable storage device is coupled to a host computer, and network extension code stored on the portable storage device is invoked. The network extension code is operable to detect a file system write function call generated by an application executing on the host computer, the file system write function call operable to cause data to be written to the portable storage device, and cause the data to be written to the portable storage device based upon the file system write function call. The network extension code is further operable to generate a transmit determination indicative of whether to transmit the data to a network repository, and transmit the data to the network repository based upon the transmit determination.
    • 方法和设备,包括计算机程序产品,用于网络扩展存储。 便携式存储设备耦合到主计算机,并且调用存储在便携式存储设备上的网络扩展代码。 网络扩展代码可操作以检测由在主计算机上执行的应用程序生成的文件系统写入功能调用,文件系统写入功能调用可操作以使得数据被写入便携式存储设备,并且使数据被写入 基于文件系统写入功能调用到便携式存储设备。 网络扩展码进一步可操作以产生指示是否将数据发送到网络存储库的发送确定,并且基于发送确定将数据发送到网络存储库。
    • 10. 发明授权
    • System independent and scalable packet buffer management architecture for network processors
    • 用于网络处理器的系统独立且可扩展的数据包缓冲管理架构
    • US07468985B2
    • 2008-12-23
    • US10290766
    • 2002-11-08
    • Faraydon O. KarimRamesh ChandraBernd H. Stramm
    • Faraydon O. KarimRamesh ChandraBernd H. Stramm
    • H04L12/28H04L12/56G06F9/26
    • H04L49/9031H04L49/90H04L49/901
    • A circular buffer storing packets for processing by one or more network processors employs an empty buffer address register identifying where a next received packet should be stored, a next packet address register identifying the next packet to be processed, and a packet-processing address register within each network processor identifying the packet being processed by that network processor. The n-bit addresses to the buffer are mapped or masked from/to the m-bit packet-processing address registers by software, allowing the buffer size to be fully scalable. A dedicated packet retrieval instruction supported by the network processor(s) retrieves a new packet for processing using the next packet address register and copies that into the associated packet-processing address register for use in subsequent accesses. Buffer management is thus independent of the network processor architecture.
    • 存储用于由一个或多个网络处理器处理的分组的循环缓冲器使用空缓冲器地址寄存器来标识下一个接收到的分组应该被存储在哪里,下一个分组地址寄存器标识下一个待处理分组,以及一个分组处理地址寄存器 每个网络处理器识别由该网络处理器正在处理的分组。 缓冲区的n位地址由软件映射或掩蔽到m位数据包处理地址寄存器,从而允许缓冲区大小完全可扩展。 由网络处理器支持的专用分组检索指令使用下一个分组地址寄存器检索新的分组进行处理,并将其复制到相关的分组处理地址寄存器中以用于随后的访问。 因此,缓冲区管理与网络处理器架构无关。