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1. 发明授权

US4071779A Semiconductor switch 失效
标题翻译：半导体开关
公开(公告)号：US4071779A
公开(公告)日：1978-01-31
申请号：US715156
申请日：1976-08-17
申请人： Mitsuru Kawanami , Ichiro Ohhinata , Shinzi Okuhara
发明人： Mitsuru Kawanami , Ichiro Ohhinata , Shinzi Okuhara
IPC分类号： H02M1/08 , H03K17/0812 , H03K17/16 , H03K17/73 , H03K17/02 , H03K17/60
CPC分类号： H03K17/08124 , H03K17/73
摘要： A semiconductor switch of a PNPN structure comprises a PNPN switch of an equivalently four-layered structure including a P-type anode, N-type cathode, N-type gate and P-type gate, a first NPN transistor, a second PNP transistor, a level shifting circuit, and an impedance element, wherein the impedance element is connected between the collector and emitter of the first transistor, the first transistor has its collector and emitter connected to the P-type gate and N-type cathode respectively, and the second transistor has its emitter and base connected to the P-type anode and N-type gate, respectively, and has its collector connected to the base of the first transistor through the level shifting circuit. In this arrangement, the first transistor is driven by the current flowing through a PN junction at the end on the side of the anode of the PNPN switch and the level shifting circuit, so that the semiconductor switch has a great dv/dt withstanding power, operates with high sensitivity, has a high breakdown voltage in both directions and facilitates the setting of circuit constants.
摘要翻译： PNPN结构的半导体开关包括具有P型阳极，N型阴极，N型栅极和P型栅极的等效四层结构的PNPN开关，第一NPN晶体管，第二PNP晶体管，电平移动电路和阻抗元件，其中阻抗元件连接在第一晶体管的集电极和发射极之间，第一晶体管的集电极和发射极分别连接到P型栅极和N型阴极，第二晶体管的发射极和基极分别连接到P型阳极和N型栅极，并且其集电极通过电平移位电路连接到第一晶体管的基极。在这种布置中，第一晶体管由流过PNPN开关和电平移动电路的阳极侧端部的PN结的电流驱动，使得半导体开关具有很好的dv / dt承受功率，以高灵敏度工作，在两个方向上具有高击穿电压，并有助于设置电路常数。

2. 发明授权

US4125787A Semiconductor switch circuit 失效
标题翻译：半导体开关电路
公开(公告)号：US4125787A
公开(公告)日：1978-11-14
申请号：US790938
申请日：1977-04-26
申请人： Ichiro Ohhinata , Shinzi Okuhara , Mitsuru Kawanami , Michio Tokunaga
发明人： Ichiro Ohhinata , Shinzi Okuhara , Mitsuru Kawanami , Michio Tokunaga
IPC分类号： H02M1/06 , H02M1/08 , H03K17/60 , H03K17/615 , H03K17/73 , H03K17/72
CPC分类号： H03K17/615 , H03K17/60 , H03K17/73
摘要： A semiconductor switch circuit comprises a PNPN switch with a PNPN semiconductor four-layered structure equivalently including first and second transistors and a gate terminal, a load current dividing circuit including at least one transistor, a variable impedance bypass circuit including at least one transistor, and a capacitive element. The base and the collector of the transistor included in the load current dividing circuit are connected to the cathode and the anode of the PNPN switch, respectively. The collector and the emitter of the transistor included in the variable impedance bypass circuit are connected to the P-type base of the second transistor of the PNPN switch and to the emitter of the transistor of the load-current-dividing circuit, respectively. The base of the transistor of the variable impedance bypass circuit is connected to the anode of the PNPN switch through the capacitive element and is controlled for gate turn-off operation. The PNPN switch having self-holding ability is combined with a transistor which does not have self-holding ability but current-amplifying ability to divide the load current into a current flowing through the PNPN switch and a collector current of the transistor. No large load current is imposed on the PNPN switch but most of the load current is passed through the transistors thereby to facilitate gate turn-off operation. Further, the PNPN switch is protected against the rate effect by use of the variable impedance bypass circuit. Thus both large and small load currents can be controlled with a small self-holding current.
摘要翻译：半导体开关电路包括具有PNPN半导体四层结构的PNPN开关，其等效地包括第一和第二晶体管和栅极端子，负载电流分配电路包括至少一个晶体管，包括至少一个晶体管的可变阻抗旁路电路和电容元件。包括在负载分流电路中的晶体管的基极和集电极分别连接到PNPN开关的阴极和阳极。包含在可变阻抗旁路电路中的晶体管的集电极和发射极分别连接到PNPN开关的第二晶体管的P型基极和负载分流电路的晶体管的发射极。可变阻抗旁路电路的晶体管的基极通过电容元件连接到PNPN开关的阳极，并被控制用于栅极关断操作。具有自保持能力的PNPN开关与不具有自持能力但是将负载电流分流成流过PNPN开关的电流和晶体管的集电极电流的电流放大能力的晶体管组合。对PNPN开关没有施加大的负载电流，但是大部分负载电流通过晶体管，从而便于关闭关断操作。此外，PNPN开关通过使用可变阻抗旁路电路来防止速率效应。因此，可以用小的自保持电流来控制大小负载电流。

3. 发明授权

US3990102A Semiconductor integrated circuits and method of manufacturing the same 失效
标题翻译：半导体集成电路及其制造方法
公开(公告)号：US3990102A
公开(公告)日：1976-11-02
申请号：US590560
申请日：1975-06-26
申请人： Shinzi Okuhara , Ichiro Ohhinata , Masaaki Kusano
发明人： Shinzi Okuhara , Ichiro Ohhinata , Masaaki Kusano
IPC分类号： H01L21/74 , H01L21/76 , H01L21/762 , H01L23/66 , H01L27/12 , H01L29/04
CPC分类号： H01L21/743 , H01L21/76 , H01L21/76297 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , Y10S148/025 , Y10S148/085 , Y10S148/122
摘要： Semiconductor integrated circuits comprising a dielectric isolation semiconductor chip having a plurality of monocrystalline semiconductor regions electrically separated by a polycrystalline semiconductor and dielectric insulation films, and circuit elements formed in the monocrystalline regions, wherein the polycrystalline substrate includes a high resistivity layer and a low resistivity layer, at least the high resistivity layer is adjacent to the monocrystalline region and the low resistivity region is coupled to a contact provided on a surface of the chip, whereby an electrostatic coupling between the circuit elements is shielded by the low resistivity layer to prevent cross-talks due to the electrostatic coupling. A method of manufacturing the same is also disclosed.
摘要翻译：包括具有由多晶半导体和介电绝缘膜电隔离的多个单晶半导体区域的介质隔离半导体芯片的半导体集成电路以及形成在单晶区域中的电路元件，其中所述多晶衬底包括高电阻率层和低电阻率层至少高电阻率层与单晶区域相邻，并且低电阻率区域耦合到设置在芯片表面上的触点，由此电路元件之间的静电耦合被低电阻率层屏蔽，会议由于静电耦合。还公开了一种制造该方法的方法。

4. 发明授权

US4112346A Constant current circuit 失效
标题翻译：恒流电路
公开(公告)号：US4112346A
公开(公告)日：1978-09-05
申请号：US823197
申请日：1977-08-09
申请人： Michio Tokunaga , Ichiro Ohhinata , Shinzi Okuhara
发明人： Michio Tokunaga , Ichiro Ohhinata , Shinzi Okuhara
IPC分类号： G05F1/56
CPC分类号： G05F1/56
摘要： A constant current circuit includes two characteristic-correlated PNP transistors connected to a constant voltage source and having common-connected emitters and common-connected bases and an NPN transistor. A constant current is taken out of a collector of a first PNP transistor. A collector of a second PNP transistor is connected to a base of the NPN transistor and the common-connected emitters of the first and second PNP transistors is connected to a collector of the NPN transistor to form a negative feedback circuit in the first PNP transistor, whereby when a current gain of the second PNP transistor which is characteristic corelated to the first PNP transistor is high a large amount of feedback is applied and when the current gain is low a small amount of feedback is applied so that the magnitude of the output constant current taken from the collector of the first PNP transistor is adjusted.
摘要翻译：恒流电路包括连接到恒压源并且具有共同连接的发射极和共连接基极的两个特征相关PNP晶体管和NPN晶体管。从第一PNP晶体管的集电极中取出恒定电流。第二PNP晶体管的集电极连接到NPN晶体管的基极，并且第一和第二PNP晶体管的共同连接的发射极连接到NPN晶体管的集电极，以在第一PNP晶体管中形成负反馈电路，由此当第一PNP晶体管特征化的第二PNP晶体管的电流增益高时，施加大量反馈，并且当电流增益为低时，施加少量的反馈，使得输出常数的大小调整从第一PNP晶体管的集电极获取的电流。

5. 发明授权

US4031412A Memory circuit 失效
标题翻译：存储电路
公开(公告)号：US4031412A
公开(公告)日：1977-06-21
申请号：US643757
申请日：1975-12-23
申请人： Ichiro Ohhinata , Shinzi Okuhara
发明人： Ichiro Ohhinata , Shinzi Okuhara
IPC分类号： G11C11/36 , G11C11/41 , G11C11/411 , H03K3/286 , H03K3/352 , H03K17/00 , G11C11/40
CPC分类号： H03K3/352 , G11C11/4113 , H03K3/286
摘要： A memory circuit comprises a semiconductor element circuit having equivalently a PNPN four-layer structure, at least an NPN transistor and a diode. An N-type emitter of the semiconductor element circuit is connected to the base of the NPN transistor, while a P-type base of the circuit is connected to the collector of the NPN transistor through the diode. The semiconductor element circuit has a positive feedback loop which is additionally provided with another feedback loop extending across the P-type base and the N-type emitter of the semiconductor element circuit, whereby in the ON holding state of the memory circuit the semiconductor element circuit is operated as a current stabilizing circuit and the transistor included in the additional feedback loop is stabilized in a controlled staturation state. The memory circuit can thus be operated at a high speed with a low power consumption.
摘要翻译：存储电路包括具有等效的PNPN四层结构的半导体元件电路，至少NPN晶体管和二极管。半导体元件电路的N型发射极连接到NPN晶体管的基极，而电路的P型基极通过二极管连接到NPN晶体管的集电极。半导体元件电路具有正反馈回路，其另外设置有跨越P型基极和半导体元件电路的N型发射极的另一个反馈回路，由此在存储电路的导通保持状态下，半导体元件电路作为电流稳定电路工作，并且包含在附加反馈回路中的晶体管被稳定在受控的稳态状态。因此，存储器电路可以以低功耗高速运行。

6. 发明授权

US4039863A Light activated semiconductor switch device 失效
标题翻译：光激活半导体开关器件
公开(公告)号：US4039863A
公开(公告)日：1977-08-02
申请号：US590562
申请日：1975-06-26
申请人： Ichiro Ohhinata , Shinzi Okuhara , Michio Tokunaga
发明人： Ichiro Ohhinata , Shinzi Okuhara , Michio Tokunaga
IPC分类号： H03K17/78 , H03K17/16 , H03K17/73 , H03K17/79 , H03K17/72
CPC分类号： H03K17/16 , H03K17/79 , Y10T307/773
摘要： A light activated semiconductor switch device comprising a light activated PNPN switch, an impedance element, a switching element, and a capacitance element. The impedance element and switching element are connected in parallel across the cathode gate and the cathode or across the anode and the anode gate of the light activated PNPN switch, and the switching element is turned on by the current supplied through the capacitance element, so that the device can operate with improved tolerance to dv/dt and high turn-on sensitivity.

7. 发明授权

US3959668A Semiconductor bidirectional switch circuit 失效
标题翻译：半导体双向开关电路
公开(公告)号：US3959668A
公开(公告)日：1976-05-25
申请号：US505973
申请日：1974-09-13
申请人： Ichiro Ohhinata , Shinzi Okuhara
发明人： Ichiro Ohhinata , Shinzi Okuhara
IPC分类号： H02M1/08 , G05F1/45 , H03K17/725 , H03K17/72
CPC分类号： H03K17/725
摘要： A semiconductor bidirectional switch comprising a couple of thyristor pairs connected in parallel in opposite directions, each of the pairs comprising a cathode gate drive thyristor and an anode-gate drive thyristor, is disclosed, in which the cathode-gates of the cathode-gate drive thyristors are connected to a cathode-gate drive circuit for supplying current and the anode-gates of the anode-gate drive thyristors are connected to an anode-gate drive circuit for taking out current, so that the gate current of the thyristors continues to flow without regard to the amplitude of the signal voltage, thereby permitting the AC signal current to flow therethrough without any momentary cut off even when the AC signal current is reduced below the minimum holding current level of the thyristors.
摘要翻译：公开了一种半导体双向开关，其包括以相反方向并联连接的一对晶闸管对，每对包括阴极栅极驱动晶闸管和阳极栅极驱动晶闸管，其中阴极栅驱动的阴极栅极晶闸管连接到用于提供电流的阴极栅极驱动电路，并且阳极栅极驱动晶闸管的阳极栅极连接到用于取出电流的阳极栅极驱动电路，使得晶闸管的栅极电流继续流动不考虑信号电压的幅度，从而即使当AC信号电流降低到可控硅的最小保持电流水平以下时，也允许AC信号电流流过其中而不会瞬间切断。

8. 发明授权

US4130767A Semiconductor switch 失效
标题翻译：半导体开关
公开(公告)号：US4130767A
公开(公告)日：1978-12-19
申请号：US695758
申请日：1976-06-14
申请人： Shinzi Okuhara , Ichiro Ohhinata
发明人： Shinzi Okuhara , Ichiro Ohhinata
IPC分类号： G05F1/455 , H03K17/725 , H03K17/72
CPC分类号： H03K17/725
摘要： A semiconductor switch has a pair of PNPN switches connected in an inverse-parallel mode and each includes a switching circuit for protection against the rate effect. Each switch has its gate terminal multi-connected through a capacitive element to provide a terminal, which is connected to the output terminal of a control circuit for generating a voltage pulse in a repetitive manner to bear the difference of potential between the PNPN switches and a capacitive element by means of the capacitive element and to drive the PNPN switches with the aid of a variation of voltage produced in the control circuit.
摘要翻译：半导体开关具有以逆并联模式连接的一对PNPN开关，并且每个包括用于防止速率效应的开关电路。每个开关的栅极端子通过电容元件多连接以提供端子，其连接到控制电路的输出端子，用于以重复的方式产生电压脉冲，以承受PNPN开关之间的电位差和电容元件，借助于控制电路中产生的电压变化来驱动PNPN开关。

9. 发明授权

US4084110A Semiconductor switch 失效
标题翻译：半导体开关
公开(公告)号：US4084110A
公开(公告)日：1978-04-11
申请号：US727453
申请日：1976-09-28
申请人： Shinzi Okuhara , Ichiro Ohhinata , Tatsuya Kamei , Masayoshi Suzuki
发明人： Shinzi Okuhara , Ichiro Ohhinata , Tatsuya Kamei , Masayoshi Suzuki
IPC分类号： H03K17/0812 , H03K17/73 , H03K17/72
CPC分类号： H03K17/73 , H03K17/08124
摘要： A stable semiconductor switch comprising a PNPN switch, a transistor, a driving device, and diodes. The PNPN switch is composed of four-layered PNPN structure and has three PN-junctions, an anode, an anode gate, a cathode gate, and a cathode. The collector and the emitter of the transistor are connected to the cathode gate and the cathode of the PNPN switch, respectively. The driving device has its one end connected to the anode gate of the PNPN switch and its other end connected to the base of the transistor so as to drive the transistor in transient state. The diodes are connected between the driving device and the emitter of the transistor in a manner so that, when the PNPN switch is controlled to fire and a back current tends to flow through the PNPN switch temporarily, the back current does not flow through the transistor so as to prevent the transistor from causing any abnormal actions such as oscillation.
摘要翻译：一种稳定的半导体开关，包括PNPN开关，晶体管，驱动器件和二极管。 PNPN开关由四层PNPN结构组成，具有三个PN结，一个阳极，一个阳极栅极，一个阴极栅极和一个阴极。晶体管的集电极和发射极分别连接到PNPN开关的阴极和阴极。驱动装置的一端连接到PNPN开关的阳极栅极，其另一端连接到晶体管的基极，以便在瞬态状态下驱动晶体管。二极管以这样的方式连接在驱动装置和晶体管的发射极之间，使得当PNPN开关被控制起来并且反向电流趋于临时流过PNPN开关时，反向电流不流过晶体管以防止晶体管引起诸如振荡的任何异常动作。

10. 发明授权

US4074299A Light-emitting diode element and device 失效
标题翻译：发光二极体元件和器件
公开(公告)号：US4074299A
公开(公告)日：1978-02-14
申请号：US636452
申请日：1975-12-01
申请人： Masaaki Kusano , Shinzi Okuhara , Ichiro Ohhinata
发明人： Masaaki Kusano , Shinzi Okuhara , Ichiro Ohhinata
IPC分类号： G09F9/33 , H01L23/48 , H01L25/075 , H01L33/30 , H01L33/38 , H01L33/62 , H01L33/00
CPC分类号： H01L33/62 , H01L25/0753 , H01L33/20 , H01L2224/48091 , H01L2224/73265 , H01L24/18 , H01L24/82 , H01L2924/01014 , H01L2924/10157 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , Y10S257/926
摘要： A light-emitting diode element comprises a semiconductor wafer including a pair of a p-type semiconductor region and an n-type semiconductor region forming a pn junction, an inclined first electrode provided on at least one of the peripheral edges of the surface of one of the semiconductor regions in the semiconductor wafer, and a flat second electrode provided on the surface of the other semiconductor region. A light-emitting diode device is provided in which a plurality of such light-emitting diode elements are respectively received in a plurality of openings of a substrate having a first wiring conductor group and a second wiring conductor group electrically connected to the first and second electrodes respectively of the light-emitting diode elements by a low-melting metal. Thus, these light-emitting diode elements can be mounted on the single substrate in a high package density, and the light-emitting diode device of simple construction can be easily assembled.

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