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1. 发明授权

US07881089B2 Coding techniques for improving the sense margin in content addressable memories 有权
标题翻译：用于改善内容可寻址存储器中的检测边缘的编码技术
公开(公告)号：US07881089B2
公开(公告)日：2011-02-01
申请号：US12392049
申请日：2009-02-24
申请人： Michele M. Franceschini , Chung H. Lam , Luis A. Lastras , Bipin Rajendran
发明人： Michele M. Franceschini , Chung H. Lam , Luis A. Lastras , Bipin Rajendran
IPC分类号： G11C15/00
CPC分类号： G11C15/00 , G11C7/1006 , G11C13/0004 , G11C15/02 , G11C15/046
摘要： A content addressable memory using encoded data words and search words, and techniques for operating such device. In one embodiment, the data word is transformed into a code word guaranteeing a mismatch of at least two code word bits of different binary values during the memory search operation when the data word does not match a search word. In another embodiment, the search word is transformed into a search code such that the Hamming distance between the code word and the search code is greater than a given threshold when there is a mismatch of at least one bit between the data word and the search word.
摘要翻译：使用编码数据字和搜索词的内容可寻址存储器，以及用于操作这样的设备的技术。在一个实施例中，当数据字与搜索词不匹配时，数据字被转换成保证在存储器搜索操作期间不同二进制值的至少两个码字位的失配的码字。在另一个实施例中，搜索词被变换成搜索码，使得当数据字和搜索词之间存在至少一个比特的不匹配时，码字和搜索码之间的汉明距离大于给定阈值。

2. 发明申请

US20100214811A1 CODING TECHNIQUES FOR IMPROVING THE SENSE MARGIN IN CONTENT ADDRESSABLE MEMORIES 有权
标题翻译：用于改善内容可寻址存储器中的感应信号的编码技术
公开(公告)号：US20100214811A1
公开(公告)日：2010-08-26
申请号：US12392049
申请日：2009-02-24
申请人： Michele M. Franceschini , Chung H. Lam , Luis A. Lastras , Bipin Rajendran
发明人： Michele M. Franceschini , Chung H. Lam , Luis A. Lastras , Bipin Rajendran
IPC分类号： G11C15/00
CPC分类号： G11C15/00 , G11C7/1006 , G11C13/0004 , G11C15/02 , G11C15/046
摘要： A content addressable memory using encoded data words and search words, and techniques for operating such device. In one embodiment, the data word is transformed into a code word guaranteeing a mismatch of at least two code word bits of different binary values during the memory search operation when the data word does not match a search word. In another embodiment, the search word is transformed into a search code such that the Hamming distance between the code word and the search code is greater than a given threshold when there is a mismatch of at least one bit between the data word and the search word.
摘要翻译：使用编码数据字和搜索词的内容可寻址存储器，以及用于操作这样的设备的技术。在一个实施例中，当数据字与搜索词不匹配时，数据字被转换成保证在存储器搜索操作期间不同二进制值的至少两个码字位的失配的码字。在另一个实施例中，搜索词被变换成搜索码，使得当数据字和搜索词之间存在至少一个比特的不匹配时，码字和搜索码之间的汉明距离大于给定阈值。

3. 发明申请

US20110134676A1 RESISTIVE MEMORY DEVICES HAVING A NOT-AND (NAND) STRUCTURE 有权
标题翻译：具有非和（非）结构的电阻式存储器件
公开(公告)号：US20110134676A1
公开(公告)日：2011-06-09
申请号：US12631310
申请日：2009-12-04
申请人： Matthew J. Breitwisch , Gary S. Ditlow , Michele M. Franceschini , Luis A. Lastras-Montano , Robert K. Montoye , Bipin Rajendran
发明人： Matthew J. Breitwisch , Gary S. Ditlow , Michele M. Franceschini , Luis A. Lastras-Montano , Robert K. Montoye , Bipin Rajendran
IPC分类号： G11C15/00 , G11C11/00 , G11C7/00
CPC分类号： G11C15/046 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C16/0483 , G11C2013/0088 , G11C2013/0092 , G11C2213/75
摘要： Resistive memories having a not-and (NAND) structure including a resistive memory cell. The resistive memory cell includes a resistive memory element for storing a resistance value and a memory element access device for controlling access to the resistive memory element. The memory element access device is connected in parallel to the resistive memory element.
摘要翻译：具有包括电阻存储单元的非 - 和（NAND）结构的电阻存储器。电阻性存储单元包括用于存储电阻值的电阻性存储器元件和用于控制对电阻式存储器元件的访问的存储元件访问器件。存储元件存取装置与电阻式存储元件并联连接。

4. 发明授权

US08107276B2 Resistive memory devices having a not-and (NAND) structure 有权
标题翻译：具有非 - 和（NAND）结构的电阻式存储器件
公开(公告)号：US08107276B2
公开(公告)日：2012-01-31
申请号：US12631310
申请日：2009-12-04
申请人： Matthew J. Breitwisch , Gary S. Ditlow , Michele M. Franceschini , Luis A. Lastras-Montano , Robert K. Montoye , Bipin Rajendran
发明人： Matthew J. Breitwisch , Gary S. Ditlow , Michele M. Franceschini , Luis A. Lastras-Montano , Robert K. Montoye , Bipin Rajendran
IPC分类号： G11C11/00
CPC分类号： G11C15/046 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C16/0483 , G11C2013/0088 , G11C2013/0092 , G11C2213/75
摘要： Resistive memories having a not-and (NAND) structure including a resistive memory cell. The resistive memory cell includes a resistive memory element for storing a resistance value and a memory element access device for controlling access to the resistive memory element. The memory element access device is connected in parallel to the resistive memory element.
摘要翻译：具有包括电阻存储单元的非 - 和（NAND）结构的电阻存储器。电阻性存储单元包括用于存储电阻值的电阻性存储器元件和用于控制对电阻式存储器元件的访问的存储元件访问器件。存储元件存取装置与电阻式存储元件并联连接。

5. 发明申请

US20120120701A1 TERNARY CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES 审中-公开
标题翻译：使用相位变更设备的内容可寻址存储器
公开(公告)号：US20120120701A1
公开(公告)日：2012-05-17
申请号：US13350823
申请日：2012-01-16
申请人： Brian L. Ji , Chung H. Lam , Robert K. Montoye , Bipin Rajendran
发明人： Brian L. Ji , Chung H. Lam , Robert K. Montoye , Bipin Rajendran
IPC分类号： G11C15/00
CPC分类号： G11C15/046 , G11C13/0004
摘要： A content addressable memory device with a plurality of memory cells storing ternary data values of high, low, and don't care. An aspect of the content addressable memory device is the use of first memory elements and second memory elements in the memory cells. The first and second memory elements are electrically coupled in parallel circuit to a match-line. The first memory elements are coupled to first word-lines and the second memory elements are coupled to second word-lines. The first memory elements are configured to store low resistance states if the ternary data value is low and high resistance states if the ternary data value is either high or don't care. The second memory elements are configured to store the low resistance states if the ternary data value is high and the high resistance states if the ternary data value is either low or don't care.
摘要翻译：一种具有多个存储单元的内容可寻址存储器件，其存储高，低和不关心的三进制数据值。内容可寻址存储器件的一个方面是在存储器单元中使用第一存储器元件和第二存储器元件。第一和第二存储器元件以并联电路电耦合到匹配线。第一存储器元件耦合到第一字线，并且第二存储器元件耦合到第二字线。如果三进制数据值低，则第一存储器元件被配置为存储低电阻状态，并且如果三进制数据值高或不在乎，则高电阻状态。如果三进制数据值高，则第二存储器元件被配置为存储低电阻状态，并且如果三进制数据值为低或不关心，则存在高电阻状态。

6. 发明授权

US07965537B2 Phase change memory with finite annular conductive path 有权
标题翻译：具有有限环形导电路径的相变存储器
公开(公告)号：US07965537B2
公开(公告)日：2011-06-21
申请号：US12491816
申请日：2009-06-25
申请人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran
发明人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0069 , G11C2013/0083 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/16 , Y10T29/49002
摘要： A phase change memory device and a method for programming the same. The method includes determining a maximum possible resistance for the memory cells in the phase change memory device. The method includes determining a high resistance state for the memory cells in the phase change memory device. The method includes receiving a request to program a target memory cell in the phase change memory device to the high resistance state. The method also includes resetting the target memory cell in the phase change memory device to the high resistance state such that the high resistance state of the target memory cell is of less resistance than the maximum possible resistance. In one embodiment of the invention, the high resistance state for the memory cells in the phase change memory device is at least 10% less than the maximum possible resistance.
摘要翻译：相变存储器件及其编程方法。该方法包括确定相变存储器件中的存储器单元的最大可能电阻。该方法包括确定相变存储器件中存储单元的高电阻状态。该方法包括接收将相变存储器件中的目标存储单元编程为高电阻状态的请求。该方法还包括将相变存储器件中的目标存储单元重置为高电阻状态，使得目标存储单元的高电阻状态的阻抗比最大可能的电阻小。在本发明的一个实施例中，相变存储器件中的存储单元的高电阻状态比最大可能电阻小至少10％。

7. 发明申请

US20110116307A1 PHASE CHANGE MEMORY DEVICE SUITABLE FOR HIGH TEMPERATURE OPERATION 有权
标题翻译：相变式存储器件，适用于高温操作
公开(公告)号：US20110116307A1
公开(公告)日：2011-05-19
申请号：US12619362
申请日：2009-11-16
申请人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran , Simone Raoux , Alejandro G. Schrott , Daniel Krebs
发明人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran , Simone Raoux , Alejandro G. Schrott , Daniel Krebs
IPC分类号： H01L45/00 , G11C11/00
CPC分类号： G11C13/0004 , G11C7/04 , G11C13/0069 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： A phase change memory cell that includes a bottom electrode, a top electrode separated from the bottom electrode, and growth-dominated phase change material deposited between the bottom electrode and the top electrode and contacting the bottom electrode and the top electrode and surrounded by insulation material at sidewalls thereof. The phase change memory cell in a reset state only includes an amorphous phase of the growth-dominated phase change material within an active volume of the phase change memory cell.
摘要翻译：一种相变存储单元，包括底部电极，从底部电极分离的顶部电极和沉积在底部电极和顶部电极之间的生长主导的相变材料，并且与底部电极和顶部电极接触并被绝缘材料包围在其侧壁。处于复位状态的相变存储单元仅包括在相变存储单元的有效体积内的以生长为主的相变材料的非晶相。

8. 发明授权

US07872889B2 High density ternary content addressable memory 有权
标题翻译：高密度三元内容可寻址内存
公开(公告)号：US07872889B2
公开(公告)日：2011-01-18
申请号：US12427484
申请日：2009-04-21
申请人： Chung H. Lam , Bipin Rajendran
发明人： Chung H. Lam , Bipin Rajendran
IPC分类号： G11C15/00
CPC分类号： G11C15/046 , G11C11/5678 , G11C13/0004
摘要： A content addressable memory device with a plurality of memory cells storing data words. Each data bit in the data words is set to one of three values of a first binary value, a second binary value, and a don't care value. An aspect of the content addressable memory device is the use of a single memory element and an access device in the memory cells. The memory cells are arranged such that each memory cell is electrically coupled to a single bit line, a single match line, and a single word line. The memory elements in the memory cells store low resistance states if the data bit value is the first binary value, high resistance states if the data bit value is the second binary value, and very high resistance states if the data bit value is the don't care value.
摘要翻译：一种具有存储数据字的多个存储器单元的内容可寻址存储器件。数据字中的每个数据位被设置为第一二进制值，第二二进制值和不关心值的三个值之一。内容可寻址存储器件的一个方面是在存储器单元中使用单个存储器元件和存取器件。存储器单元被布置成使得每个存储器单元电耦合到单个位线，单个匹配线和单个字线。如果数据位值是第一个二进制值，则存储器单元中的存储元件存储低电阻状态，如果数据位值是第二个二进制值则为高电阻状态，如果数据位值为“ 关心价值。

9. 发明授权

US07764533B2 Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition 有权
标题翻译：利用测量时间延迟作为电平定义的特征参数的多电平存储单元
公开(公告)号：US07764533B2
公开(公告)日：2010-07-27
申请号：US11857321
申请日：2007-09-18
申请人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran
发明人： Matthew J. Breitwisch , Chung H. Lam , Bipin Rajendran
IPC分类号： G11C11/00
CPC分类号： G11C13/0061 , G11C11/5628 , G11C11/565 , G11C11/5678 , G11C13/00 , G11C13/0004 , G11C13/004 , G11C13/0069 , G11C16/32 , G11C2013/0054
摘要： A memory array and computer program product for operating a memory cell and memory array. An embodiment of the invention entails receiving a request to read a binary value stored in the memory cell. A pre-charging operation pre-charges a bit-line capacitor in an electronic circuit formed by the memory cell to a pre-charge voltage. A word-line in the electronic circuit is then activated. A discharging operation discharges the bit-line capacitor through the said memory cell in the electronic circuit to the word-line. Additionally, an electron discharge time measurement is started when the word-line is activated. The electron discharge time measurement is stopped when the voltage level in the bit-line falls below a pre-defined reference voltage. A determining operation determines the binary value from the measured electron discharge time.
摘要翻译：用于操作存储器单元和存储器阵列的存储器阵列和计算机程序产品。本发明的实施例需要接收读取存储在存储单元中的二进制值的请求。预充电操作将由存储器单元形成的电子电路中的位线电容器预先充电到预充电电压。然后激活电子电路中的字线。放电操作通过电子电路中的所述存储单元将位线电容器放电到字线。此外，当字线被激活时，电子放电时间测量开始。当位线中的电压电平低于预定义的参考电压时，停止电子放电时间测量。确定操作根据测量的电子放电时间确定二进制值。

10. 发明授权

US07751217B2 Content addressable memory using phase change devices 有权
标题翻译：内容可寻址内存使用相变设备
公开(公告)号：US07751217B2
公开(公告)日：2010-07-06
申请号：US12166311
申请日：2008-07-01
申请人： Chung H. Lam , Brian L. Ji , Robert K. Montoye , Bipin Rajendran
发明人： Chung H. Lam , Brian L. Ji , Robert K. Montoye , Bipin Rajendran
IPC分类号： G11C15/00
CPC分类号： G11C13/0004 , G11C15/046
摘要： Content addressable memory device utilizing phase change devices. An aspect of the content addressable memory device is the use of a comparatively lower power search-line access element and a comparatively higher power word-line access element. The word-line access element is only utilized during write operations and the search-line access element is only utilized during search operations. The word-line access element being electrically coupled to a second end of a phase change memory element and a word-line. The search-line access element also being electrically coupled to the second end of the phase change memory element and a search-line. The search-line being electrically coupled to a match-line. A bit-line is electrically coupled to a first end of the phase change memory element. Additionally, a complementary set of access elements, a complementary phase change memory element, a complementary search-line, and a complementary bit-line are also included in the content addressable memory device.
摘要翻译：使用相变装置的内容寻址存储装置。内容可寻址存储器件的一个方面是使用相对较低功率的搜索线访问元件和相对较高功率的字线访问元件。字线访问元件仅在写入操作期间使用，并且搜索线访问元件仅在搜索操作期间被使用。字线访问元件电耦合到相变存储器元件的第二端和字线。搜索线访问元件还电耦合到相变存储元件的第二端和搜索线。搜索线电耦合到匹配线。位线电耦合到相变存储元件的第一端。此外，内容可寻址存储器件中还包括互补的一组存取元件，互补相变存储器元件，互补搜索线和互补位线。

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