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    • 1. 发明授权
    • Method and apparatus for efficiently allocating objects in object oriented systems
    • 在面向对象系统中有效分配对象的方法和装置
    • US06490670B1
    • 2002-12-03
    • US09065407
    • 1998-04-24
    • Michael Thomas CollinsJames Lyle PetersonWeining Gu
    • Michael Thomas CollinsJames Lyle PetersonWeining Gu
    • G06F1200
    • G06F12/023
    • A method and apparatus for managing memory allocation. Each memory block category contains memory blocks. A request, including an object size, is received to allocate memory to an object. An available memory block is allocated to the object if the memory block category for size corresponding to the object size of the object contains an available memory block. An available memory block from a memory block category having a memory block size larger than the object size is located if an available memory block is absent in the memory block category for sizes corresponding to the object size. The located available memory block is partitioned into memory blocks, having a size corresponding to the object size. A partitioned memory block from the partitioned memory blocks is allocated to the object.
    • 一种用于管理存储器分配的方法和装置。 每个内存块类别都包含内存块。 接收包括对象大小的请求,以将内存分配给对象。 如果与对象的对象大小相对应的大小的内存块类别包含可用的内存块,则可用的内存块被分配给该对象。 如果对应于对象大小的大小,则在存储器块类别中不存在可用存储器块的情况下,定位具有大于对象大小的存储器块大小的存储器块类别的可用存储器块。 所定位的可用存储块被分割成具有对应于对象大小的大小的存储块。 分配的存储块的分区存储块被分配给对象。
    • 4. 发明授权
    • Extended register bank allocation based on status mask bits set by allocation instruction for respective code block
    • 基于由各个代码块的分配指令设置的状态屏蔽位的扩展寄存器组分配
    • US07231509B2
    • 2007-06-12
    • US11034559
    • 2005-01-13
    • Ahmed GheithJames Lyle PetersonRichard Ormond Simpson
    • Ahmed GheithJames Lyle PetersonRichard Ormond Simpson
    • G06F9/34
    • G06F9/30181G06F9/30076G06F9/30098G06F9/3012G06F9/30138G06F9/3836G06F9/384
    • An extended register processor includes a register file having a legacy register set and an extended register set. The extended register set includes a plurality of extended registers accessible only to extended register instructions. The processor maps extended register references to physical extended registers at run time. The processor includes a configurable extended register mapping unit to support this functionality. The mapping unit is accessible to an instruction decoder, which detects extended register references and forwards them to the mapping unit. The mapping unit returns a physical extended register corresponding to the extended register reference in the instruction. The mapping unit is configurable so that, for example, the mapping is specific to a code block. An extended register allocation instruction causes the processor to allocate a portion of the extended register set to the code block in which the declaration is located and to configure the mapping unit to reflect the allocation.
    • 扩展寄存器处理器包括具有遗留寄存器组和扩展寄存器组的寄存器文件。 扩展寄存器集合包括可扩展寄存器指令可访问的多个扩展寄存器。 处理器在运行时将扩展寄存器引用映射到物理扩展寄存器。 该处理器包括一个可配置的扩展寄存器映射单元来支持该功能。 指令解码器可访问映射单元,该指令解码器检测扩展寄存器引用并将其转发给映射单元。 映射单元返回与指令中的扩展寄存器引用相对应的物理扩展寄存器。 映射单元是可配置的,使得例如映射特定于代码块。 扩展寄存器分配指令使处理器将扩展寄存器集的一部分分配给声明所在的代码块,并配置映射单元以反映分配。
    • 10. 发明授权
    • Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages
    • Superpage coalescing在复制物理页面期间支持对新的虚拟超级页面映射的读/写访问
    • US08417913B2
    • 2013-04-09
    • US10713733
    • 2003-11-13
    • Elmootazbellah Nabil ElnozahyJames Lyle PetersonRamakrishnan RajamonyHazim Shafi
    • Elmootazbellah Nabil ElnozahyJames Lyle PetersonRamakrishnan RajamonyHazim Shafi
    • G06F12/00
    • G06F12/1045
    • A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual memory pages using the new page mapping while the memory controller is still copying the virtual memory pages to the set of physical memory pages. The memory controller can use a mapping table which temporarily stores entries of the old and new page addresses, and releases the entries as copying for each entry is completed. The translation lookaside buffer (TLB) entries in the processor cores are updated for the new page addresses prior to completion of copying of the memory pages by the memory controller. The invention can be extended to non-uniform memory array (NUMA) systems. For systems with cache memory, any cache entry which is affected by the page move can be updated by modifying its address tag according to the new page mapping. This tag modification may be limited to cache entries in a dirty coherency state. The cache can further relocate a cache entry based on a changed congruence class for any modified address tag.
    • 将虚拟存储器分配给数据处理系统中的物理存储器的方法为新的页面映射分配一组连续的物理存储器页面,指示存储器控制器根据新的页面映射移动虚拟存储器页面,然后允许访问 虚拟内存页面使用新页面映射,而内存控制器仍将虚拟内存页面复制到物理内存页面集合。 存储器控制器可以使用临时存储旧页面地址和新页面地址的条目的映射表,并且对于每个条目的拷贝完成,释放条目。 在由存储器控制器完成对存储器页面的复制之前,处理器核心中的翻译后备缓冲器(TLB)条目针对新的页地址进行更新。 本发明可以扩展到非均匀存储器阵列(NUMA)系统。 对于具有缓存内存的系统,可以通过根据新页面映射修改其地址标签来更新受页面移动影响的任何缓存条目。 该标签修改可能被限制在脏相关性状态下的高速缓存条目。 高速缓存可以根据修改后的地址标签的改变的一致性类别进一步重新定位缓存条目。