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1. 发明授权

US08004522B1 Using coverage information in computer graphics 有权
标题翻译：在计算机图形学中使用覆盖信息
公开(公告)号：US08004522B1
公开(公告)日：2011-08-23
申请号：US11890839
申请日：2007-08-07
申请人： Michael J. M. Toksvig , Brian K. Cabral , Edward A. Hutchins , Gary C. King , Christopher D. S. Donham
发明人： Michael J. M. Toksvig , Brian K. Cabral , Edward A. Hutchins , Gary C. King , Christopher D. S. Donham
IPC分类号： G06T15/50 , G09G5/00
CPC分类号： G06T15/503
摘要： The boundary of a surface can be represented as a series of line segments. A number of polygons are successively superimposed onto the surface. The polygons utilize a common reference point and each of the polygons has an edge that coincides with one of the line segments. Coverage bits are associated with respective sample locations within a pixel. A value of a coverage bit is changed each time a sample location associated with the coverage bit is covered by one of the polygons. Final values of the coverage bits are buffered after all of the polygons have been processed. The values of the coverage bits can be used when the surface is subsequently rendered.
摘要翻译：表面的边界可以表示为一系列线段。多个多边形依次叠加在表面上。多边形使用公共参考点，并且每个多边形具有与一个线段重合的边。覆盖位与像素内的相应样本位置相关联。每当与覆盖比特相关联的采样位置被多边形之一覆盖时，覆盖比特的值被改变。所有覆盖位的最终值在所有的多边形都被处理后被缓冲。当表面随后呈现时，可以使用覆盖位的值。

2. 发明授权

US08547395B1 Writing coverage information to a framebuffer in a computer graphics system 有权
标题翻译：将覆盖信息写入计算机图形系统中的帧缓冲区
公开(公告)号：US08547395B1
公开(公告)日：2013-10-01
申请号：US11643545
申请日：2006-12-20
申请人： Edward A. Hutchins , Christopher D. S. Donham , Gary C. King , Michael J. M. Toksvig
发明人： Edward A. Hutchins , Christopher D. S. Donham , Gary C. King , Michael J. M. Toksvig
IPC分类号： G09G5/00
CPC分类号： G06T15/005 , G06T11/40
摘要： A computer-implemented graphics system has a mode of operation in which primitive coverage information is generated by a rasterizer for real sample locations and virtual sample locations for use in anti-aliasing. An individual pixel includes a single real sample location and at least one virtual sample location. If the coverage information cannot be changed by a pixel shader, then the rasterizer can write the coverage information to a framebuffer. If, however, the coverage information can be changed by the shader, then the rasterizer sends the coverage information to the shader.
摘要翻译：计算机实现的图形系统具有操作模式，其中原始覆盖信息由光栅化器生成用于实际样本位置和用于抗锯齿的虚拟样本位置。单个像素包括单个实际采样位置和至少一个虚拟采样位置。如果覆盖信息不能被像素着色器改变，则光栅化器可以将覆盖信息写入帧缓冲区。然而，如果覆盖信息可以由着色器改变，则光栅化器将覆盖信息发送到着色器。

3. 发明授权

US07817165B1 Selecting real sample locations for ownership of virtual sample locations in a computer graphics system 有权
标题翻译：选择计算机图形系统中虚拟样本位置的所有权的实际样本位置
公开(公告)号：US07817165B1
公开(公告)日：2010-10-19
申请号：US11643185
申请日：2006-12-20
申请人： Christopher D. S. Donham , Edward A. Hutchins , Gary C. King , Michael J. M. Toksvig
发明人： Christopher D. S. Donham , Edward A. Hutchins , Gary C. King , Michael J. M. Toksvig
IPC分类号： G09G5/00
CPC分类号： G09G5/363 , G06T11/40 , G09G5/00 , G09G2340/10 , G09G2360/18
摘要： A computer-implemented graphics system has a mode of operation in which primitive coverage information is generated for real sample locations and virtual sample locations for use in anti-aliasing. An individual pixel includes a single real sample location and at least one virtual sample location. A block of real sample locations can be selected to delineate and encompass a region containing a number of virtual sample locations. Pixel attribute values (e.g., z-depth or stencil values) associated with the block of selected real sample locations can be used to associate each virtual sample location within the region with one of the selected real sample locations. The virtual sample location assumes the pixel attribute value of the real sample location with which it is associated.
摘要翻译：计算机实现的图形系统具有操作模式，其中为实际采样位置和用于抗锯齿的虚拟采样位置生成原始覆盖信息。单个像素包括单个实际采样位置和至少一个虚拟采样位置。可以选择实际样本位置的块来描绘并包含包含多个虚拟样本位置的区域。可以使用与所选择的实取样位置的块相关联的像素属性值（例如，z深度或模板值）将该区域内的每个虚拟样本位置与所选择的实际采样位置之一相关联。虚拟样本位置假定与其相关联的实际样本位置的像素属性值。

4. 发明授权

US07808512B1 Bounding region accumulation for graphics rendering 有权
标题翻译：图形渲染的边界区域积累
公开(公告)号：US07808512B1
公开(公告)日：2010-10-05
申请号：US11642276
申请日：2006-12-19
申请人： Edward A. Hutchins , Christopher D. S. Donham , Gary C. King , Michael J. M. Toksvig , Mark J. Kilgard
发明人： Edward A. Hutchins , Christopher D. S. Donham , Gary C. King , Michael J. M. Toksvig , Mark J. Kilgard
IPC分类号： G09G5/00
CPC分类号： G09G3/3611 , G09G5/225 , G09G2360/18
摘要： In a raster unit of a graphics processor, a method for bounding region accumulation for graphics rendering. The method includes receiving a plurality of graphics primitives for rasterization in a raster stage of a graphics processor and rasterizing the graphics primitives to generate a plurality pixels related to the graphics primitives and a plurality of respective bounding regions related to the graphics primitives. Upon receiving an accumulation start command, the bounding regions are accumulated in an accumulation register. The accumulation continues until an accumulation stop command is received. The operation results in an accumulated bounding region. Access to the accumulated bounding region is enabled to facilitate a subsequent graphics rendering operation.
摘要翻译：在图形处理器的光栅单元中，用于界定图形渲染的区域累积的方法。该方法包括在图形处理器的光栅级中接收用于光栅化的多个图形基元，并且对图形基元进行光栅化以生成与图形基元相关的多个像素以及与图形基元相关的多个相应的边界区域。在接收到累加开始命令时，边界区域被累积在累加寄存器中。累积继续，直到接收到累加停止命令。操作会导致累积的边界区域。能够访问累积的边界区域以促进随后的图形绘制操作。

5. 发明授权

US07876332B1 Shader that conditionally updates a framebuffer in a computer graphics system 有权
标题翻译：着色器有条件地更新计算机图形系统中的帧缓冲区
公开(公告)号：US07876332B1
公开(公告)日：2011-01-25
申请号：US11643558
申请日：2006-12-20
申请人： Christopher D. S. Donham , Edward A. Hutchins , Gary C. King , Michael J. M. Toksvig
发明人： Christopher D. S. Donham , Edward A. Hutchins , Gary C. King , Michael J. M. Toksvig
IPC分类号： G09G5/00
CPC分类号： G09G5/393 , G06T11/40 , G06T15/005 , G09G5/363
摘要： A computer-implemented graphics system that includes a rasterizer and a shader has a mode of operation in which primitive coverage information is generated for real sample locations and virtual sample locations for use in anti-aliasing. An individual pixel includes a single real sample location and at least one virtual sample location. In some instances, a primitive may cover only virtual sample locations and does not cover a real sample location. These instances can be identified in the coverage information sent from the rasterizer to the shader, so that the shader can determine whether or not it can write color information, depth information and/or stencil information for the real sample location to a framebuffer.
摘要翻译：包括光栅化器和着色器的计算机实现的图形系统具有操作模式，其中为实际采样位置和用于抗锯齿的虚拟采样位置生成原始覆盖信息。单个像素包括单个实际采样位置和至少一个虚拟采样位置。在某些情况下，原语可能仅覆盖虚拟样本位置，并且不覆盖真实的样本位置。可以在从光栅化器发送到着色器的覆盖信息中识别这些实例，使得着色器可以确定它是否可以将真实样本位置的颜色信息，深度信息和/或模板信息写入帧缓冲器。

6. 发明授权

US09183607B1 Scoreboard cache coherence in a graphics pipeline 有权
标题翻译：记分板缓存在图形管道中的一致性
公开(公告)号：US09183607B1
公开(公告)日：2015-11-10
申请号：US11893431
申请日：2007-08-15
申请人： Justin M. Mahan , Edward A. Hutchins , Kevin P. Acken , Michael J. M. Toksvig , Christopher D. S. Donham
发明人： Justin M. Mahan , Edward A. Hutchins , Kevin P. Acken , Michael J. M. Toksvig , Christopher D. S. Donham
IPC分类号： G06T1/20 , G06T1/00 , G06F15/00 , G06T15/00
CPC分类号： G06T15/005 , G06T1/60 , G06T11/40
摘要： A method in system for latency buffered scoreboarding in a graphics pipeline of a graphics processor. The method includes receiving a graphics primitive for rasterization in a raster stage of a graphics processor and rasterizing the graphics primitive to generate a plurality pixels related to the graphics primitive. An ID stored to account for an initiation of parameter evaluation for each of the plurality of pixels as the pixels are transmitted to a subsequent stage of the graphics processor. A buffer is used to store the fragment data resulting from the parameter evaluation for each of the plurality of pixels by the subsequent stage. The ID and the fragment data from the buffering are compared to determine whether they correspond to one another. The completion of parameter evaluation for each of the plurality of pixels is accounted for when the ID and the fragment data match and as the fragment data is written to a memory.
摘要翻译：一种用于在图形处理器的图形管线中等待时间缓冲记分板的系统中的方法。该方法包括在图形处理器的光栅级中接收用于光栅化的图形基元，并且对图形基元进行光栅化以生成与图形基元相关的多个像素。存储的ID用于当像素被传送到图形处理器的后续阶段时考虑对于多个像素中的每一个的参数评估的启动。缓冲器用于存储由后续阶段的多个像素中的每一个的参数评估产生的片段数据。比较来自缓冲的ID和片段数据以确定它们是否彼此对应。当ID和片段数据匹配并且片段数据被写入存储器时，对多个像素中的每一个的参数评估的完成进行了说明。

7. 发明授权

US07996622B1 Detecting unused cache lines 有权
标题翻译：检测未使用的缓存行
公开(公告)号：US07996622B1
公开(公告)日：2011-08-09
申请号：US11890821
申请日：2007-08-07
申请人： Michael J. M. Toksvig , Christopher D. S. Donham
发明人： Michael J. M. Toksvig , Christopher D. S. Donham
IPC分类号： G06F12/00
CPC分类号： G06F12/124 , G06F12/122
摘要： In the event of a cache miss, data is written from main memory to the cache. To select a cache line to write the data to, cache lines in the cache that are not referenced during a certain interval are identified. One of the identified cache lines is selected and the data can be written to that cache line.
摘要翻译：在缓存未命中的情况下，数据从主存储器写入高速缓存。要选择一条高速缓存行来写入数据，可以识别高速缓存中一段时间内未被引用的行。选择一个已识别的高速缓存行，并将数据写入该高速缓存行。

8. 发明授权

US08040357B1 Quotient remainder coverage system and method 有权
标题翻译：商品剩余覆盖系统和方法
公开(公告)号：US08040357B1
公开(公告)日：2011-10-18
申请号：US11893418
申请日：2007-08-15
申请人： Edward A. Hutchins , Christopher D. S. Donham
发明人： Edward A. Hutchins , Christopher D. S. Donham
IPC分类号： G09G5/00
CPC分类号： G06T11/40
摘要： Embodiments of the present invention pixel processing system and method provide convenient and efficient processing of pixel information. In one embodiment, quotient-remainder information associated with barycentric coordinate information indicating the location of a pixel is received. In one exemplary implementation quotient-remainder information is associated with barycentric coordinate information through the relationship c divided by dcdx, where c is the barycentric coordinate for a particular edge and dcdx is the derivative of the barycentric coordinate in the screen horizontal direction. The relationship of a pixel with respect to a primitive edge is determined based upon the quotient-remainder information. For example, a positive quotient can indicate a pixel is inside a triangle and a negative quotient can indicate a pixel is outside a triangle. Pixel processing such as shading is performed in accordance with the relationship of the pixel to the primitive.
摘要翻译：本发明的像素处理系统和方法的实施例提供了对像素信息的方便和有效的处理。在一个实施例中，接收与指示像素的位置的重心坐标信息相关联的商剩余信息。在一个示例性实施方案中，商余数信息通过除以dcdx的关系c与重心坐标信息相关联，其中c是特定边缘的重心坐标，dcdx是屏幕水平方向上的重心坐标的导数。基于商余数信息确定像素与原始边缘的关系。例如，正商可以指示像素在三角形内，而负商可以指示像素在三角形之外。根据像素与原图的关系来执行诸如阴影的像素处理。

9. 发明授权

US06980209B1 Method and system for scalable, dataflow-based, programmable processing of graphics data 有权
标题翻译：用于可扩展，基于数据流，可编程处理图形数据的方法和系统
公开(公告)号：US06980209B1
公开(公告)日：2005-12-27
申请号：US10172174
申请日：2002-06-14
申请人： Christopher D. S. Donham , Alexander Lev Minkin , Bryon Nordquist , Edward A. Hutchins , Mark Tian , George Easton Scott III
发明人： Christopher D. S. Donham , Alexander Lev Minkin , Bryon Nordquist , Edward A. Hutchins , Mark Tian , George Easton Scott III
IPC分类号： G06T15/00 , G06T15/50
CPC分类号： G06T15/005
摘要： A scalable pipelined pixel shader that processes packets of data and preserves the format of each packet at each processing stage. Each packet is an ordered array of data values, at least one of which is an instruction pointer. Each member of the ordered array can be indicative of any type of data. As a packet progresses through the pixel shader during processing, each member of the ordered array can be replaced by a sequence of data values indicative of different types of data (e.g., an address of a texel, a texel, or a partially or fully processed color value). Information required for the pixel shader to process each packet is contained in the packet, and thus the pixel shader is scalable in the sense that it can be implemented in modular fashion to include any number of identical pipelined processing stages and can execute the same program regardless of the number of stages. Preferably, each processing stage is itself scalable, can be implemented to include an arbitrary number of identical pipelined instruction execution stages known as microblenders, and can execute the same program regardless of the number of microblenders. The current value of the instruction pointer (IP) in a packet determines the next instruction to be executed on the data contained in the packet. Any processing unit can change the instruction that will be executed by a subsequent processing unit by modifying the IP (and/or condition codes) of a packet that it asserts to the subsequent processing unit. Other aspects of the invention include graphics processors (each including a pixel shader configured in accordance with the invention), methods and systems for generating packets of data for processing in accordance with the invention, and methods for pipelined processing of packets of data.
摘要翻译：可扩展的流水线像素着色器，可处理数据包，并在每个处理阶段保留每个数据包的格式。每个数据包是有序的数据值阵列，其中至少有一个是指令指针。有序数组的每个成员可以指示任何类型的数据。随着分组在处理期间通过像素着色器进行，有序阵列的每个成员可以被指示不同类型的数据的数据值序列（例如，纹素，纹素，或部分或完全处理的地址颜色值）。像素着色器处理每个数据包所需的信息包含在数据包中，因此像素着色器在可以以模块化方式实现以包括任意数量的相同流水线处理级并且可以执行相同的程序的意义上是可缩放的的阶段数。优选地，每个处理阶段本身是可扩展的，可以被实现为包括任意数量的称为微型混合器的相同的流水线指令执行阶段，并且可以执行相同的程序，而不管微型混合器的数量。分组中的指令指针（IP）的当前值确定要对包含在分组中的数据执行的下一条指令。任何处理单元可以通过修改后续处理单元确定的分组的IP（和/或条件代码）来改变将由后续处理单元执行的指令。本发明的其他方面包括图形处理器（每个包括根据本发明配置的像素着色器），用于生成根据本发明进行处理的数据分组的方法和系统，以及用于流水线处理数据分组的方法。

10. 发明授权

US08564598B2 Parallelogram unified primitive description for rasterization 有权
公开(公告)号：US08564598B2
公开(公告)日：2013-10-22
申请号：US12001251
申请日：2007-12-10
申请人： Edward A. Hutchins , William T. Warner, Jr. , Christopher D. S. Donham
发明人： Edward A. Hutchins , William T. Warner, Jr. , Christopher D. S. Donham
IPC分类号： G06T1/00
CPC分类号： G06T11/40
摘要： In a graphics pipeline of a graphics processor, a method for a unified primitive description for rasterization. The method includes receiving a group of primitives from a graphics application, wherein the group includes different types of primitives and the types of primitives include line primitives, point primitives and triangle primitives. For each of the types of primitives, the method includes generating a corresponding parallelogram, wherein the parallelogram has four sides disposed along an x-axis and a y-axis, and computing an inside y-axis mid point and an outside y-axis mid point based on the four sides. The parallelogram is controlled to represent to each of the primitive types respectively by adjusting a location of the inside y-axis mid point or the outside y-axis mid point.

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