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    • 2. 发明申请
    • DRAIN EXTENDED MOS DEVICE FOR BULK FINFET TECHNOLOGY
    • 用于大容量FINFET技术的漏极扩展MOS器件
    • US20140008733A1
    • 2014-01-09
    • US13540762
    • 2012-07-03
    • Mayank ShrivastavaHarald Gossner
    • Mayank ShrivastavaHarald Gossner
    • H01L29/78H01L21/336
    • H01L21/823821H01L21/76224H01L21/823807H01L21/823814H01L29/66545H01L29/7835H01L29/7851
    • Some aspects relate to a FinFET that includes a semiconductor fin disposed over a semiconductor substrate and extending laterally between a source region and a drain region. A shallow trench isolation (STI) region laterally surrounds a lower portion of the semiconductor fin, and an upper portion of the semiconductor fin remains above the STI region. A gate electrode traverses over the semiconductor fin to define a channel region in the semiconductor fin under the conductive gate electrode. A punch-through blocking region can extend between the source region and the channel region in the lower portion of the semiconductor fin. A drain extension region can extend between the drain region and the channel region in the lower portion of the semiconductor fin. Other devices and methods are also disclosed.
    • 一些方面涉及FinFET,其包括设置在半导体衬底上并在源极区域和漏极区域之间横向延伸的半导体鳍片。 浅沟槽隔离(STI)区域横向地围绕半导体鳍片的下部,并且半导体鳍片的上部保持在STI区域上方。 栅电极穿过半导体鳍片,以在导电栅电极下面的半导体鳍片中限定沟道区。 穿通阻挡区域可以在半导体鳍片的下部中的源极区域和沟道区域之间延伸。 漏极延伸区域可以在半导体鳍片的下部中的漏极区域和沟道区域之间延伸。 还公开了其它装置和方法。
    • 4. 发明申请
    • SILICON CONTROLLED RECTIFIER (SCR) DEVICE FOR BULK FINFET TECHNOLOGY
    • 用于大容量FINFET技术的硅控制整流器(SCR)器件
    • US20140097465A1
    • 2014-04-10
    • US13646799
    • 2012-10-08
    • Mayank ShrivastavaHarald Gossner
    • Mayank ShrivastavaHarald Gossner
    • H01L29/74H01L21/332
    • H01L27/0817H01L21/845H01L27/1211
    • Some aspects relate to a semiconductor device disposed on a semiconductor substrate. The device includes an STI region that laterally surrounds a base portion of a semiconductor fin. An anode region, which has a first conductivity type, and a cathode region, which has a second conductivity type, are arranged in an upper portion of the semiconductor fin. A first doped base region, which has the second conductivity type, is arranged in the base of the fin underneath the anode region. A second doped base region, which has the first conductivity type, is arranged in the base of the fin underneath the cathode region. A current control unit is arranged between the anode region and the cathode region. The current control unit is arranged to selectively enable and disable current flow in the upper portion of the fin based on a trigger signal. Other devices and methods are also disclosed.
    • 一些方面涉及设置在半导体衬底上的半导体器件。 该器件包括横向围绕半导体鳍片的基底部分的STI区域。 具有第一导电类型的阳极区域和具有第二导电类型的阴极区域布置在半导体鳍片的上部。 具有第二导电类型的第一掺杂基极区布置在阳极区域下方的翅片的底部。 具有第一导电类型的第二掺杂基区布置在阴极区下方的鳍的底部。 电流控制单元设置在阳极区域和阴极区域之间。 电流控制单元被布置为基于触发信号来选择性地启用和禁止鳍的上部中的电流。 还公开了其它装置和方法。
    • 6. 发明申请
    • Selective Current Pumping to Enhance Low-Voltage ESD Clamping Using High Voltage Devices
    • 选择性电流泵浦以增强使用高压器件的低电压ESD钳位
    • US20130250461A1
    • 2013-09-26
    • US13429577
    • 2012-03-26
    • Mayank ShrivastavaChristian RussHarald Gossner
    • Mayank ShrivastavaChristian RussHarald Gossner
    • H02H9/04
    • H02H9/046
    • Some embodiments relate to an electrostatic discharge (ESD) protection device to protect a circuit from an ESD event. The ESD protection device includes first and second trigger elements. Upon detecting an ESD pulse, the first trigger element provides a first trigger signal having a first pulse length. The second trigger element, upon detecting the ESD pulse, provides a second trigger signal having a second pulse length. The second pulse length is different from the first pulse length. A primary shunt shunts power of the ESD pulse away from the ESD susceptible circuit based on the first trigger signal. A current control element selectively pumps current due to the ESD pulse into a substrate of the primary shunt based on the second trigger signal.
    • 一些实施例涉及用于保护电路免受ESD事件的静电放电(ESD)保护装置。 ESD保护装置包括第一和第二触发元件。 在检测到ESD脉冲时,第一触发元件提供具有第一脉冲长度的第一触发信号。 第二触发元件在检测到ESD脉冲时提供具有第二脉冲长度的第二触发信号。 第二脉冲长度与第一脉冲长度不同。 基于第一触发信号,主分流器将ESD脉冲的功率分配离开ESD敏感电路。 电流控制元件基于第二触发信号选择性地将由于ESD脉冲引起的电流泵送到主分流器的衬底中。
    • 9. 发明授权
    • Silicon controlled rectifier (SCR) device for bulk FinFET technology
    • 用于散装FinFET技术的可控硅整流器(SCR)器件
    • US08785968B2
    • 2014-07-22
    • US13646799
    • 2012-10-08
    • Mayank ShrivastavaHarald Gossner
    • Mayank ShrivastavaHarald Gossner
    • H01L29/66
    • H01L27/0817H01L21/845H01L27/1211
    • Some aspects relate to a semiconductor device disposed on a semiconductor substrate. The device includes an STI region that laterally surrounds a base portion of a semiconductor fin. An anode region, which has a first conductivity type, and a cathode region, which has a second conductivity type, are arranged in an upper portion of the semiconductor fin. A first doped base region, which has the second conductivity type, is arranged in the base of the fin underneath the anode region. A second doped base region, which has the first conductivity type, is arranged in the base of the fin underneath the cathode region. A current control unit is arranged between the anode region and the cathode region. The current control unit is arranged to selectively enable and disable current flow in the upper portion of the fin based on a trigger signal. Other devices and methods are also disclosed.
    • 一些方面涉及设置在半导体衬底上的半导体器件。 该器件包括横向围绕半导体鳍片的基底部分的STI区域。 具有第一导电类型的阳极区域和具有第二导电类型的阴极区域布置在半导体鳍片的上部。 具有第二导电类型的第一掺杂基极区布置在阳极区域下方的翅片的底部。 具有第一导电类型的第二掺杂基区布置在阴极区下方的鳍的底部。 电流控制单元设置在阳极区域和阴极区域之间。 电流控制单元被布置为基于触发信号来选择性地启用和禁止鳍的上部中的电流。 还公开了其它装置和方法。