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1. 发明授权

US06605985B2 High-efficiency power charge pump supplying high DC output currents 有权
标题翻译：提供高直流输出电流的高效率电荷泵
公开(公告)号：US06605985B2
公开(公告)日：2003-08-12
申请号：US10162135
申请日：2002-06-03
申请人： Mauro Pagliato , Paolo Rolandi , Giorgio Oddone , Marco Fontana
发明人： Mauro Pagliato , Paolo Rolandi , Giorgio Oddone , Marco Fontana
IPC分类号： G05F110
CPC分类号： H02M3/073 , H02M2003/077
摘要： The voltage applied to the gate terminals of the charging transistors and charge-transfer transistors of two parallel pumping branches forming a charge pump is a boosted voltage generated internally and supplied in a crosswise manner. In particular, for driving the charge pump, first and second driving signals are generated respectively for the first and for the second pumping branch via a first and respectively a second driving circuit; the first and second driving signals are also supplied respectively to a first and to a second auxiliary charge pump to obtain respectively first and second voltage-boosted signals; and the first and second boosted voltages are respectively supplied to the second and to the first driving circuit.
摘要翻译：施加到形成电荷泵的两个并联泵浦支路的充电晶体管和电荷转移晶体管的栅极端子的电压是内部产生的升压电压并以交叉方式提供。特别地，为了驱动电荷泵，分别通过第一和第二驱动电路为第一和第二泵分支产生第一和第二驱动信号; 第一和第二驱动信号也分别提供给第一和第二辅助电荷泵，以分别获得第一和第二电压升高信号; 并且第一和第二升压电压分别提供给第二和第二驱动电路。

2. 发明授权

US07136305B2 Sense amplifier with equalizer 有权
标题翻译：带均衡器的感应放大器
公开(公告)号：US07136305B2
公开(公告)日：2006-11-14
申请号：US10913788
申请日：2004-08-06
申请人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
发明人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
IPC分类号： G11C16/06 , G11C7/02
CPC分类号： G11C11/5642 , G11C7/06 , G11C7/062 , G11C7/067 , G11C16/28
摘要： A sense amplifier is provided that includes a measure branch receiving an input current to be detected, a reference branch receiving a reference current, and an equalizing circuit including a comparator. The equalizing circuit selectively equalizes a measure node of the measure branch with a reference node of the reference branch, and the comparator compares a voltage at the measure node of the measure branch with a voltage at the reference node of the reference branch. The equalizing circuit is such that, when activated, equalization of the measure node with the reference node is virtual and substantially does not involve a flow of current between the measure node and the reference node of the reference branch. The sense amplifier is particularly suited for reading memory cells of a semiconductor memory. Also provided is a method for sensing an input current.
摘要翻译：提供了一种读出放大器，其包括接收待检测的输入电流的测量分支，接收参考电流的参考分支和包括比较器的均衡电路。均衡电路选择性地将测量分支的测量节点与参考分支的参考节点相等，并且比较器将测量分支的测量节点处的电压与参考分支的参考节点处的电压进行比较。均衡电路使得当被激活时，具有参考节点的测量节点的均衡是虚拟的并且基本上不涉及测量节点和参考分支的参考节点之间的电流。读出放大器特别适用于读取半导体存储器的存储单元。还提供了用于感测输入电流的方法。

3. 发明申请

US20050063236A1 Sense amplifier 有权
标题翻译：感应放大器
公开(公告)号：US20050063236A1
公开(公告)日：2005-03-24
申请号：US10913788
申请日：2004-08-06
申请人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
发明人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
IPC分类号： G11C7/06 , G11C11/56 , G11C16/28 , G11C11/34
CPC分类号： G11C11/5642 , G11C7/06 , G11C7/062 , G11C7/067 , G11C16/28
摘要： A sense amplifier is provided that includes a measure branch receiving an input current to be detected, a reference branch receiving a reference current, equalizing means, and a comparator. The equalizing means selectively equalizes a measure node of the measure branch with a reference node of the reference branch, and the comparator compares a voltage at the measure node of the measure branch with a voltage at the reference node of the reference branch. The equalizing means are such that, when activated, equalization of the measure node with the reference node is virtual and substantially does not involve a flow of current between the measure node and the reference node of the reference branch. The sense amplifier is particularly suited for reading memory cells of a semiconductor memory. Also provided is a method for sensing an input current.
摘要翻译：提供了一种读出放大器，其包括接收待检测的输入电流的测量分支，接收参考电流的参考分支，均衡装置和比较器。均衡装置选择性地将测量分支的测量节点与参考分支的参考节点进行均衡，并且比较器将测量分支的测量节点处的电压与参考分支的参考节点处的电压进行比较。均衡装置使得当激活时，具有参考节点的测量节点的均衡是虚拟的并且基本上不涉及测量节点和参考分支的参考节点之间的电流。读出放大器特别适用于读取半导体存储器的存储单元。还提供了用于感测输入电流的方法。

4. 发明授权

US06657895B2 Reading circuit and method for a multilevel non-volatile memory 有权
公开(公告)号：US06657895B2
公开(公告)日：2003-12-02
申请号：US10118660
申请日：2002-04-08
申请人： Mauro Pagliato , Paolo Rolandi , Massimo Montanaro
发明人： Mauro Pagliato , Paolo Rolandi , Massimo Montanaro
IPC分类号： G11C1600
CPC分类号： G11C11/5642 , G11C11/56 , G11C11/5621 , G11C2211/5632
摘要： Described herein is an asynchronous serial dichotomic sense amplifier comprising a first comparator stage having a first input receiving the cell current flowing in the multilevel memory cell, the content of which is to be read, a second input receiving a first reference current, and an output supplying the first of the bits stored in the multilevel memory cell; a multiplexer stage having a selection input connected to the output of the first comparator stage, a first signal input receiving a second reference current, a second signal input receiving a third reference current, and a signal output selectively connectable to the first or the second signal input depending on the logic level present on the selection input; and a second comparator stage having a first input receiving the cell current, a second input connected to the signal output of the multiplexer stage, and an output supplying the second of the bits stored in the multilevel memory cell.

5. 发明授权

US07075844B2 Parallel sense amplifier with mirroring of the current to be measured into each reference branch 失效
标题翻译：并行感测放大器将要测量的电流与每个参考分支进行镜像
公开(公告)号：US07075844B2
公开(公告)日：2006-07-11
申请号：US10762195
申请日：2004-01-20
申请人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
发明人： Mauro Pagliato , Massimo Montanaro , Paolo Rolandi
IPC分类号： G11C7/02
CPC分类号： G11C16/28
摘要： A parallel sense amplifier includes a measuring branch for receiving an input current to be measured, a plurality of reference branches each one for receiving a reference current, and a plurality of comparators each one for comparing a voltage at a measuring node along the measuring branch with a voltage at a reference node along a corresponding reference branch; the amplifier further includes a multiple current mirror for mirroring the input current into each reference branch.
摘要翻译：并行读出放大器包括用于接收待测量的输入电流的测量分支，每个用于接收参考电流的多个参考分支;以及多个比较器，每个比较器用于将沿着测量分支的测量节点处的电压与沿着相应参考分支的参考节点处的电压; 放大器还包括用于将输入电流镜像到每个参考分支中的多电流镜。

6. 发明授权

US06559709B2 Low-consumption charge pump for a nonvolatile memory 失效
标题翻译：低功耗电荷泵用于非易失性存储器
公开(公告)号：US06559709B2
公开(公告)日：2003-05-06
申请号：US09821827
申请日：2001-03-28
申请人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
发明人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
IPC分类号： H02M318
CPC分类号： G11C5/145
摘要： A charge pump having a phase-generator circuit generating phase signals and an oscillator circuit supplying a clock signal, a current-limitation circuit to limit the current flowing in the oscillator circuit, and a control circuit supplying on an output a control signal supplied to the current-limitation circuit. The control circuit has a first current mirror connected to a ground line, a second current mirror connected to a supply line, a cascode structure arranged between the first and the second current mirrors and connected to the output of the control circuit to compensate the effects on the control signal caused by sharp relative variations between the potential of the supply line and the potential of the ground line, and a compensation circuit to compensate the effects on the control signal caused by sharp relative variations between the potential of the supply line and the potential of the ground line and by slow variations in temperature.
摘要翻译：一种电荷泵，具有产生相位信号的相位发生器电路和提供时钟信号的振荡器电路，限制在振荡器电路中流动的电流的限流电路，以及向输出端提供提供给该时钟信号的控制信号的控制电路限流电路。控制电路具有连接到接地线的第一电流镜，连接到电源线的第二电流镜，布置在第一和第二电流镜之间并连接到控制电路的输出的共源共栅结构，以补偿对由电源线的电位与接地线的电位之间的急剧相对变化引起的控制信号，以及补偿电路，用于补偿由供电线路的电位与电位之间的尖锐相对变化引起的对控制信号的影响的地线和缓慢的温度变化。

7. 发明授权

US06525961B2 Method and circuit for programming a multilevel non-volatile memory 有权
公开(公告)号：US06525961B2
公开(公告)日：2003-02-25
申请号：US09952957
申请日：2001-09-12
申请人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
发明人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
IPC分类号： G11C1604
CPC分类号： G11C5/066 , G11C8/00 , G11C11/56 , G11C11/5621 , G11C11/5628 , G11C16/10 , G11C16/32
摘要： A circuit and method for programming a multilevel nonvolatile memory are disclosed. The circuit uses one or more address pins as one or more synchronization signals during a programming operation. The circuit includes a counter, controlled by the one or more address pins, for selecting a programming voltage to apply to an addressed memory cell. The circuit further includes compare circuitry for comparing the data value stored in the addressed memory cell with a desired data value. The counter is selectively incremented to apply a higher voltage for further programming of the addressed memory cell, based up the comparison.

8. 发明授权

US06507517B2 Circuital structure for programming data in a non-volatile memory device 有权
公开(公告)号：US06507517B2
公开(公告)日：2003-01-14
申请号：US09871235
申请日：2001-05-30
申请人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
发明人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
IPC分类号： G11C1604
CPC分类号： G11C7/1072 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C11/5642 , G11C16/28 , G11C2211/5634
摘要： A circuit structure for programming data in reference cells of an electrically programmable/erasable integrated non-volatile memory device includes a matrix of multi-level memory cells and a corresponding reference cell provided for comparison with a respective memory cell during the read phase. The reference cell is incorporated, along with other cells of the same type, in a reference cell sub-matrix which is structurally independent of the memory cell matrix and directly accessed from outside in the DMA mode. The bit lines of the sub-matrix branch off to a series of switches which are individually operated by respective control signals REF(i) issued from a logic circuit with the purpose of selectively connecting the bit lines to a single external I/O terminal through a single addressing line of the access DMA mode.

9. 发明授权

US06549473B2 Circuital structure for reading data in a non-volatile memory device 有权
公开(公告)号：US06549473B2
公开(公告)日：2003-04-15
申请号：US09871234
申请日：2001-05-30
申请人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
发明人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
IPC分类号： G11C1604
CPC分类号： G11C16/28 , G11C11/5621 , G11C11/5642 , G11C2211/5634
摘要： A circuit structure for reading data contained in an electrically programmable/erasable integrated non-volatile memory device includes a matrix of memory cells and at least one reference cell for comparison with a memory cell during a reading phase. The reference cell is incorporated in a reference cells sub-matrix which is structurally independent of the matrix of memory cells. Also provided is a conduction path between the matrix and the sub-matrix, which path includes bit lines of the sub-matrix of reference cells extended continuously into the matrix of memory cells.

10. 发明授权

US06476664B2 Integrated device with voltage selector 失效
标题翻译：带电压选择器的集成设备
公开(公告)号：US06476664B2
公开(公告)日：2002-11-05
申请号：US09823262
申请日：2001-03-29
申请人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
发明人： Paolo Rolandi , Massimo Montanaro , Giorgio Oddone
IPC分类号： G05F110
CPC分类号： G11C16/12
摘要： The integrated device comprises a PMOS transistor and a voltage selector having an output connected to the bulk terminal of the PMOS transistor. The voltage selector comprises an input stage supplying a supply voltage or a programming voltage according to whether the device is in a reading step or in a programming step; a comparator connected to the output of the input stage, receiving a boosted voltage, and generating a first control signal, the state whereof depends upon the comparison of the voltages at the inputs of the comparator; a logic circuit connected to the output of the comparator and generating a second control signal, the state whereof depends upon the state of the first control signal and of a third-level signal; and a switching circuit controlled by the first control signal, by the second control signal, and by the third-level signal and supplying each time the highest among the supply voltage, the boosted voltage, and the programming voltage.
摘要翻译：集成器件包括PMOS晶体管和具有连接到PMOS晶体管的体端的输出的电压选择器。电压选择器包括输入级，其根据该器件是处于读取步骤还是在编程步骤中提供电源电压或编程电压; 连接到输入级的输出的比较器，接收升高的电压，并产生第一控制信号，其状态取决于比较器输入端的电压的比较; 连接到比较器的输出并产生第二控制信号的逻辑电路，其状态取决于第一控制信号和第三电平信号的状态; 以及由第一控制信号，第二控制信号和第三电平信号控制的开关电路，并且每一时刻提供电源电压，升压电压和编程电压中的最高值。

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