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1. 发明授权

US07026870B2 Low-noise active RC signal processing circuit 失效
标题翻译：低噪声有源RC信号处理电路
公开(公告)号：US07026870B2
公开(公告)日：2006-04-11
申请号：US10482125
申请日：2002-03-27
申请人： Masataka Nakamura , Takayuki Genba , Yuichiro Aomori , Shuji Yamaoka
发明人： Masataka Nakamura , Takayuki Genba , Yuichiro Aomori , Shuji Yamaoka
IPC分类号： H03F1/34
CPC分类号： H03H11/1213 , H03H11/1291
摘要： Disclosed is a low-noise active RC signal processing circuit, which comprises a feedforward section operable responsive to an input signal to provide an output at a predetermined gain, and a feedback section operable responsive to the output of the forward circuit to negatively feed back the output to the input signal of the feedforward section while giving a predetermined transfer characteristic to the output, so as to allow the processing circuit to have a transfer impedance characteristic equal to or less than the predetermined gain over the entire frequency range. The feedforward section is composed of a current-controlled voltage output circuit which includes a common-base transistor for receiving and inverting the input signal, and an emitter-follower transistor for outputting voltage, and has a transfer impedance defining the predetermined gain. The current-controlled voltage output circuit may also be constructed using an operational amplifier. Various filters, such as a bandpass, lowpass or highpass filter, can be achieved by arranging the transfer impedance characteristic. The present invention can provide an active RC signal processing circuit having a low Q-value and an excellent low-noise performance.
摘要翻译：公开了一种低噪声有源RC信号处理电路，其包括可响应于输入信号提供预定增益的输出的前馈部分，以及响应于正向电路的输出而可操作的负反馈的反馈部分输出到前馈部分的输入信号，同时向输出端提供预定的传输特性，以便允许处理电路在整个频率范围内具有等于或小于预定增益的传输阻抗特性。前馈部分由电流控制的电压输出电路组成，其包括用于接收和反相输入信号的公共基极晶体管，以及用于输出电压的发射极跟随晶体管，并具有限定预定增益的传输阻抗。电流控制的电压输出电路也可以使用运算放大器来构造。可以通过布置传输阻抗特性来实现各种滤波器，例如带通，低通或高通滤波器。本发明可以提供具有低Q值和优异的低噪声性能的有源RC信号处理电路。

2. 发明授权

US06967498B2 Apparatus and method for inspecting electronic circuits 失效
标题翻译：电子电路检测装置及方法
公开(公告)号：US06967498B2
公开(公告)日：2005-11-22
申请号：US10636751
申请日：2003-08-08
申请人： Yuji Odan , Shuji Yamaoka
发明人： Yuji Odan , Shuji Yamaoka
IPC分类号： G01R31/02 , G01R1/073 , G01R3/00 , G01R31/28 , G01R31/302 , G01R31/26
CPC分类号： G01R1/07307 , G01R3/00 , G01R31/2887
摘要： The present invention provides an apparatus and a method for used in a board inspection capable of an inspection of defect in a circuit board with high resolution over a wide range. The method is used for manufacturing a sensor probe comprising layers which include an electrode layer, a lead wire layer and a bridge layer (41). These layers are laminated on a base (30) in the form of a flat plate composed of silicon. The electrode layer is comprised of a set of sensor electrodes (40). The lead wire layer is comprised of a set of lead wires (50) for transferring a signal externally. The bridge layer couples between the electrode layer and the lead wire layer. The lead wire layer is formed by means of depositing aluminum in accordance with a first mask pattern. The bridge layer is formed by means of growing each of bridge wires (41) in the direction perpendicular to the base. The bridge wires extend in the direction perpendicular to the base and are connected to respective lead wires of the lead layer. The respective electrodes of the electrode layer are formed by depositing aluminum in accordance with a second mask pattern. The plurality of sensor electrodes respectively extend in the horizontal direction and having a predetermined area. A shield layer (33) is provided between the electrode layer (40) and the lead wire layer (50).
摘要翻译：本发明提供一种用于板检测的装置和方法，能够在宽范围内以高分辨率检查电路板中的缺陷。该方法用于制造包括电极层，引线层和桥接层（41）的层的传感器探针。这些层层叠在由硅组成的平板形式的基底（30）上。电极层由一组传感器电极（40）组成。引线层由用于在外部传送信号的一组引线（50）组成。桥接层耦合在电极层和引线层之间。引线层通过根据第一掩模图案沉积铝而形成。通过在与基座垂直的方向上生长桥接线（41），形成桥接层。桥接线在与基座垂直的方向上延伸并连接到引线层的相应引线。通过根据第二掩模图案沉积铝来形成电极层的各个电极。多个传感器电极分别在水平方向上延伸并具有预定的面积。在电极层（40）和引线层（50）之间设有屏蔽层（33）。

3. 发明授权

US06943559B2 Circuit pattern inspection device, circuit pattern inspection method, and recording medium 失效
标题翻译：电路图案检查装置，电路图案检查方法和记录介质
公开(公告)号：US06943559B2
公开(公告)日：2005-09-13
申请号：US10480106
申请日：2002-06-06
申请人： Shuji Yamaoka , Shogo Ishioka
发明人： Shuji Yamaoka , Shogo Ishioka
IPC分类号： G01R31/02 , G01R31/304 , G01R31/312 , H05K3/00 , H01H31/02 , G01R27/26
CPC分类号： G01R31/304 , G01R31/312
摘要： Disclosed is an circuit-pattern inspection apparatus comprising a power supply element 30 adapted to be capacitively coupled with a parallel array of conductive patterns 20 to supply an inspection signal to one end of each of the conductible patterns, an open sensor 40 adapted to be capacitively coupled with all of the other ends of the conductive patterns to detect the inspection signal, and a short sensor 50 arranged at a position displaced from the power supply element 30 and adapted to be capacitively coupled with two lines of the conductive patterns to detect the inspection signal. The quality of the conductive pattern is inspected such that the presence of disconnection is determined when the detect signal from the open sensor 40 is largely reduced, and the presence of short is determined when the detect signal from the short sensor 50 largely rises and then falls. The circuit-pattern inspection apparatus can detect defects in a circuit board reliably and readily.
摘要翻译：公开了一种电路图案检查装置，其包括电源元件30，电源元件30适于与导电图案20的并行阵列电容耦合，以向每个可导电图案的一端提供检查信号，开放式传感器40适于电容化与传导图案的所有另一端耦合以检测检查信号;以及短传感器50，布置在从电源元件30偏离的位置处，并适于与两条导电图案电容耦合以检测检查信号。检查导电图案的质量，使得当来自开路传感器40的检测信号被大大减小时确定断开的存在，并且当来自短传感器50的检测信号大大上升然后下降时确定短路的存在。电路图案检查装置可以可靠且容易地检测电路板中的缺陷。

4. 发明授权

US06710607B2 Method and apparatus for inspection 失效
标题翻译：检查方法和装置
公开(公告)号：US06710607B2
公开(公告)日：2004-03-23
申请号：US09926606
申请日：2001-11-26
申请人： Tatuhisa Fujii , Shogo Ishioka , Shuji Yamaoka
发明人： Tatuhisa Fujii , Shogo Ishioka , Shuji Yamaoka
IPC分类号： G01R3102
CPC分类号： G01R31/302 , G01R31/304 , G01R31/312
摘要： The present invention provides an inspection apparatus and method capable of intuitively obtaining inspection results of circuit wirings. An inspection system 20 comprises a sensor chip 1 including plural sensor elements, a computer 21, probes 22 for supplying an inspection signal to circuit wirings 101, and a selector 23 for switching the supply of the inspection signal to the probes 22. The computer 21 receives the detected signals from the sensor chip 1, and generates an image data to display an image of the circuit wirings as an inspection subject on a display 21a. This make it possible to check the shape of the specific circuit wiring and to detect defects such as disconnection, short-circuit, and chipping in the circuit wiring 101 based on the generated image data and the design image data representing the design circuit wiring.
摘要翻译：本发明提供一种能够直观地获得电路布线的检查结果的检查装置和方法。检查系统20包括传感器芯片1，其包括多个传感器元件，计算机21，用于向电路布线101提供检查信号的探针22以及用于切换向检测器22提供检查信号的选择器23.计算机21 从传感器芯片1接收检测到的信号，并生成图像数据，以在显示器21a上显示作为检查对象的电路布线的图像。由此，能够根据生成的图像数据和表示设计电路布线的设计图像数据，检查电路布线的形状，检测电路布线101中的断线，短路，切断等缺陷。

5. 发明授权

US07495452B2 Wire harness checker and wire harness checking method 失效
标题翻译：线束检查器和线束检查方法
公开(公告)号：US07495452B2
公开(公告)日：2009-02-24
申请号：US10558683
申请日：2004-06-01
申请人： Mishio Hayashi , Shuji Yamaoka , Akira Nurioka , Yoshikazu Taniguchi , Hideo Onishi
发明人： Mishio Hayashi , Shuji Yamaoka , Akira Nurioka , Yoshikazu Taniguchi , Hideo Onishi
IPC分类号： G01R31/04
CPC分类号： G01R31/045 , H01R43/20
摘要： Disclosed is a wire harness checker and a wire harness checking method, which are capable of determining whether a terminal of a terminal-fitted wire is adequately inserted in a connector housing, without contact with the wire and the terminal, objectively and reliably. Each of three pairs of sensor plates (20a, 20b; 30a, 30b; 40a, 40b) are disposed adjacent to an outer wall surface of a connector housing 10 in opposed relation to one another. An AC inspection signal is supplied to a terminal to be inserted into the connector housing 10, and detected from the terminal by each of the pairs of sensor plates (20a, 20b), (30a, 30b), (40a, 40b), to detect an insertion position of the terminal in the connector, in accordance with a relative value of each detection signal from the sensor plates, so as to determine adequacy of the insertion position.
摘要翻译：公开了一种线束检查器和线束检查方法，其能够确定终端装配线的端子是否被充分地插入连接器壳体中，而不与线和端子接触，并且可靠地。三对传感器板（20a，20b; 30a，30b; 40a，40b）中的每一对彼此相对地设置在连接器壳体10的外壁表面附近。将AC检查信号提供给要插入连接器壳体10的端子，并且通过传感器板（20a，20b），（30a，30b），（40a，40b）中的每一对从端子检测到根据来自传感器板的每个检测信号的相对值，检测端子在连接器中的插入位置，以便确定插入位置的充分性。

6. 发明授权

US06992493B2 Device and method for substrate displacement detection 失效
标题翻译：基板位移检测装置及方法
公开(公告)号：US06992493B2
公开(公告)日：2006-01-31
申请号：US10478496
申请日：2002-05-23
申请人： Shuji Yamaoka , Shogo Ishioka
发明人： Shuji Yamaoka , Shogo Ishioka
IPC分类号： G01R27/26
CPC分类号： G01B7/003
摘要： Disclosed is an apparatus and method for detecting positional displacement of a board. A board 20 having a surface formed with a conductive pattern 25 is transferred in a direction A while supplying an AC signal from a power supply section 3 to the surface of the board. The level of positional displacement of the board is detected in accordance with the transfer speed of the board and the difference between the timings of the intermediate signal levels generated when the AC signal is sensed by a pair of position sensors 1, 2 opposed to the leading edge of the board. The present invention allows positional displacement of the board to be detected in a simple non-contact structure while maintaining a high degree of accuracy without variation over time.
摘要翻译：公开了一种用于检测板的位置偏移的装置和方法。具有形成有导电图案25的表面的板20沿着方向A传送，同时从电源部3向板的表面提供AC信号。根据电路板的传送速度来检测电路板的位置偏移水平，并且当由与一个位置传感器1,2对置的一对位置传感器1,2感测到AC信号时产生的中间信号电平的定时之间的差异边缘的板子。本发明允许在简单的非接触结构中进行待检测的板的位置位移，同时保持高精度而不随时间变化。

7. 发明授权

US06933740B2 Electronic circuit inspection sensor and inspection system using same 失效
标题翻译：电子线路检查传感器和检查系统使用相同
公开(公告)号：US06933740B2
公开(公告)日：2005-08-23
申请号：US10632821
申请日：2003-08-04
申请人： Yuji Odan , Shuji Yamaoka
发明人： Yuji Odan , Shuji Yamaoka
IPC分类号： G01R1/073 , G01R3/00 , G01R31/28 , G01R31/26
CPC分类号： G01R1/07307 , G01R3/00 , G01R31/2887
摘要： The present invention provides an apparatus and a method for used in a board inspection capable of an inspection of defect in a circuit board with high resolution over a wide range. The method is used for manufacturing a sensor probe comprising layers which include an electrode layer, a lead wire layer and a bridge layer (41). These layers are laminated on a base (30) in the form of a flat plate composed of silicon. The electrode layer is comprised of a set of sensor electrodes (40). The lead wire layer is comprised of a set of lead wires (50) for transferring a signal externally. The bridge layer couples between the electrode layer and the lead wire layer. The lead wire layer is formed by means of depositing aluminum in accordance with a first mask pattern. The bridge layer is formed by means of growing each of bridge wires (41) in the direction perpendicular to the base. The bridge wires extend in the direction perpendicular to the base and are connected to respective lead wires of the lead layer. The respective electrodes of the electrode layer are formed by depositing aluminum in accordance with a second mask pattern. The plurality of sensor electrodes respectively extend in the horizontal direction and having a predetermined area. A shield layer (33) is provided between the electrode layer (40) and the lead wire layer (50).
摘要翻译：本发明提供一种用于板检测的装置和方法，能够在宽范围内以高分辨率检查电路板中的缺陷。该方法用于制造包括电极层，引线层和桥接层（41）的层的传感器探针。这些层层叠在由硅组成的平板形式的基底（30）上。电极层由一组传感器电极（40）组成。引线层由用于在外部传送信号的一组引线（50）组成。桥接层耦合在电极层和引线层之间。引线层通过根据第一掩模图案沉积铝而形成。通过在与基座垂直的方向上生长桥接线（41），形成桥接层。桥接线在与基座垂直的方向上延伸并连接到引线层的相应引线。通过根据第二掩模图案沉积铝来形成电极层的各个电极。多个传感器电极分别在水平方向上延伸并具有预定的面积。在电极层（40）和引线层（50）之间设有屏蔽层（33）。

8. 发明授权

US07239127B2 Apparatus and method for inspecting electronic circuits 失效
标题翻译：电子电路检测装置及方法
公开(公告)号：US07239127B2
公开(公告)日：2007-07-03
申请号：US10636617
申请日：2003-08-08
申请人： Yuji Odan , Shuji Yamaoka
发明人： Yuji Odan , Shuji Yamaoka
IPC分类号： G01R31/28
CPC分类号： G01R1/07307 , G01R3/00 , G01R31/2887
摘要： The present invention provides an apparatus and a method for used in a board inspection capable of an inspection of defect in a circuit board with high resolution over a wide range. The method is used for manufacturing a sensor probe comprising layers which include an electrode layer, a lead wire layer and a bridge layer (41). These layers are laminated on a base (30) in the form of a flat plate composed of silicon. The electrode layer is comprised of a set of sensor electrodes (40). The lead wire layer is comprised of a set of lead wires (50) for transferring a signal externally. The bridge layer couples between the electrode layer and the lead wire layer. The lead wire layer is formed by means of depositing aluminum in accordance with a first mask pattern. The bridge layer is formed by means of growing each of bridge wires (41) in the direction perpendicular to the base. The bridge wires extend in the direction perpendicular to the base and are connected to respective lead wires of the lead layer. The respective electrodes of the electrode layer are formed by depositing aluminum in accordance with a second mask pattern. The plurality of sensor electrodes respectively extend in the horizontal direction and having a predetermined area. A shield layer (33) is provided between the electrode layer (40) and the lead wire layer (50).
摘要翻译：本发明提供一种用于板检测的装置和方法，能够在宽范围内以高分辨率检查电路板中的缺陷。该方法用于制造包括电极层，引线层和桥接层（41）的层的传感器探针。这些层层叠在由硅组成的平板形式的基底（30）上。电极层由一组传感器电极（40）组成。引线层由用于在外部传送信号的一组引线（50）组成。桥接层耦合在电极层和引线层之间。引线层通过根据第一掩模图案沉积铝而形成。通过在与基座垂直的方向上生长桥接线（41），形成桥接层。桥接线在与基座垂直的方向上延伸并连接到引线层的相应引线。通过根据第二掩模图案沉积铝来形成电极层的各个电极。多个传感器电极分别在水平方向上延伸并具有预定的面积。在电极层（40）和引线层（50）之间设有屏蔽层（33）。

9. 发明授权

US06921892B2 Electrostatic imager 有权
标题翻译：静电成像仪
公开(公告)号：US06921892B2
公开(公告)日：2005-07-26
申请号：US10325809
申请日：2002-12-18
申请人： Richard Colbeth , George Zentai , Shuji Yamaoka
发明人： Richard Colbeth , George Zentai , Shuji Yamaoka
IPC分类号： G02F1/13 , G02F1/1333 , G03G20060101 , G03G5/00 , G03G5/02 , H01L27/00 , H01L27/146 , H01L31/00
CPC分类号： H01L27/14679 , G03G5/00 , G03G5/0202
摘要： An apparatus and method for detecting an electrostatic charge on a flat panel imager pixel array. In one embodiment, the apparatus includes an insulator layer and a flat panel pixel array coupled to a bottom surface of the insulator layer. Each pixel of the pixel array has a storage capacitance, and an electrostatic charge corresponding to a voltage applied through an electrode coupled to a top surface of the insulating layer may be detected from each storage capacitance.
摘要翻译：一种用于检测平板成像器像素阵列上的静电电荷的装置和方法。在一个实施例中，该装置包括耦合到绝缘体层的底表面的绝缘体层和平板像素阵列。像素阵列的每个像素具有存储电容，并且可以从每个存储电容检测对应于通过耦合到绝缘层的顶表面的电极施加的电压的静电电荷。

10. 发明申请

US20050038613A1 Apparatus and method for inspecting electrical continuity of circuit board, jig for use therein, and recording medium thereon 失效
标题翻译：用于检查电路板的电气连续性，用于其中的夹具以及其上的记录介质的装置和方法
公开(公告)号：US20050038613A1
公开(公告)日：2005-02-17
申请号：US10945875
申请日：2004-09-22
申请人： Shuji Yamaoka
发明人： Shuji Yamaoka
IPC分类号： G01R31/02 , G01R31/28 , G06F19/00
CPC分类号： G01R31/2812
摘要： The present invention provides an apparatus and method for inspecting electrical continuity of a circuit board, capable of decreasing the impedance in a current path as an inspection object to achieve enhanced SN ratio. A coupling capacitance is formed at one of terminals of a pattern wire on a board as an inspection object in a non-contact manner, and an inductance (450) and a lead wire are connected to this capacitance. An AC inspection signal is applied to the other terminal through the lead wire in a contact manner. A resonance circuit is defined by the capacitance, inductance and pattern wire, and thereby an output signal can be detected with lowering the impedance.
摘要翻译：本发明提供了一种用于检查电路板的电连续性的装置和方法，其能够降低作为检查对象的电流路径中的阻抗，以实现增强的SN比。耦合电容以不接触的方式形成在作为检查对象的板上的图案线的一个端子上，并且电感（450）和引线连接到该电容。交流检查信号通过导线以接触的方式施加到另一端子。谐振电路由电容，电感和图案线限定，从而可以通过降低阻抗来检测输出信号。

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