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1. 发明授权

US07745926B2 Composite multi-layer substrate and module using the substrate 有权
标题翻译：复合多层基板和使用基板的模块
公开(公告)号：US07745926B2
公开(公告)日：2010-06-29
申请号：US11896013
申请日：2007-08-29
申请人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
发明人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
IPC分类号： H01L23/04
CPC分类号： H05K1/185 , H01L23/49822 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/2518 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01037 , H01L2924/01057 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15159 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H05K1/021 , H05K3/445 , H05K3/4641 , H05K2201/0969 , H05K2201/09745 , H01L2924/00
摘要： A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
摘要翻译：一种复合多层基板，包括由具有优异导电性，优异导热性和高刚性的材料形成的平板状芯体，至少覆盖前后树脂层和后树脂层芯构件的表面和通过芯构件的前后侧形成在芯构件中的无底孔，其中电子部件安装在无底孔中，由此，复合多层基板的强度可以通过芯构件的刚性保证，可以消除传统的现有技术的玻璃布，可以避免由离子迁移引起的电特性的劣化，并且将导致降低生产成本。

2. 发明申请

US20090307323A1 APPARATUS AND METHOD FOR SUPPORTING SETTING OF DESTINATION OF EMAIL 审中-公开
标题翻译：支持电子邮件目的地的设备和方法
公开(公告)号：US20090307323A1
公开(公告)日：2009-12-10
申请号：US12475549
申请日：2009-05-31
申请人： Shingo Kato , Masashi Miyazaki , Hiroshige Ochimizu , Masami Tada
发明人： Shingo Kato , Masashi Miyazaki , Hiroshige Ochimizu , Masami Tada
IPC分类号： G06F15/82
CPC分类号： G06Q10/107
摘要： In a client 20, an operation accepting section 22 obtains a primary address entered in an address entry field, and a transmitting section 21 sends the primary address to a mail server 10. In the mail server 10, a receiving section 19 receives the primary address; a message generating section 13 generates a message including out-of-office information corresponding to the primary address; and a transmitting section 11 sends the message to the client 20. In the client 20, a receiving section 29 receives the message, and a display section 24 displays an out-of-office message that a user corresponding to the primary address is away, and thereafter displays detailed information including buttons for setting an alternative address according to a click operation on a specific portion. An address updating section 26a displays an alternative address in the address entry field according to a button click operation.
摘要翻译：在客户端20中，操作接受部分22获得在地址输入字段中输入的主地址，并且发送部分21将主地址发送到邮件服务器10.在邮件服务器10中，接收部分19接收主地址 ; 消息生成部13生成包含与主地址对应的不在办公信息的消息; 并且发送部11将消息发送到客户端20.在客户端20中，接收部分29接收消息，并且显示部分24显示与主地址相对应的用户离开的外出消息，然后根据特定部分的点击操作显示包括用于设置替代地址的按钮的详细信息。地址更新部分26a根据按钮点击操作在地址输入字段中显示替代地址。

3. 发明授权

US07275197B2 Testing apparatus 失效
标题翻译：测试仪器
公开(公告)号：US07275197B2
公开(公告)日：2007-09-25
申请号：US11048632
申请日：2005-02-01
申请人： Kenji Inaba , Masashi Miyazaki
发明人： Kenji Inaba , Masashi Miyazaki
IPC分类号： G01R31/28 , G06F11/00 , G01R27/28
CPC分类号： G01R31/31907 , G01R31/3167 , G01R31/31905 , G01R31/31908 , G01R31/31926 , H04B17/0085 , H04B17/17 , H04B17/20
摘要： A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes an operation order holding unit for holding information indicating that a test operation by a first testing module should be performed before a test operation by a second testing module, a trigger return signal receiving unit for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and a trigger signal supplying unit for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving unit receives the trigger return signal.
摘要翻译：一种测试装置，包括多个测试模块槽，可选地安装有用于测试被测设备的不同类型的测试模块的操作顺序保存单元，用于保存指示应该在第一测试模块之前执行测试操作的信息第二测试模块的测试操作，触发返回信号接收单元，用于从第一测试模块接收触发返回信号，触发返回信号指示第一测试模块已经完成了其测试操作，当测试操作第一测试模块已经完成，并且触发信号提供单元，用于向第二测试模块提供触发信号，触发信号指示第二测试模块应当开始其测试操作，当触发返回信号接收单元接收到触发返回信号。

4. 发明申请

US20050240852A1 Testing apparatus 失效
公开(公告)号：US20050240852A1
公开(公告)日：2005-10-27
申请号：US11048632
申请日：2005-02-01
申请人： Kenji Inaba , Masashi Miyazaki
发明人： Kenji Inaba , Masashi Miyazaki
IPC分类号： G01R31/28 , G01R31/3167 , G01R31/319 , G06F11/00
CPC分类号： G01R31/31907 , G01R31/3167 , G01R31/31905 , G01R31/31908 , G01R31/31926 , H04B17/0085 , H04B17/17 , H04B17/20
摘要： A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a first testing module among the plurality of testing modules should be performed before a test operation by a second testing module among the plurality of testing modules, trigger return signal receiving means for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and trigger signal supplying means for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving means receives the trigger return signal.

5. 发明授权

US5294291A Process for the formation of a conductive circuit pattern 失效
标题翻译：用于形成导电电路图案的工艺
公开(公告)号：US5294291A
公开(公告)日：1994-03-15
申请号：US947543
申请日：1992-09-21
申请人： Haruo Akahoshi , Toshinari Takada , Fujiko Yutani , Takeyuki Itabashi , Shin Nishimura , Satoru Amo , Akio Takahashi , Rituji Toba , Masashi Miyazaki
发明人： Haruo Akahoshi , Toshinari Takada , Fujiko Yutani , Takeyuki Itabashi , Shin Nishimura , Satoru Amo , Akio Takahashi , Rituji Toba , Masashi Miyazaki
IPC分类号： G03F7/40 , H05K3/06 , H05K3/10 , H05K3/38 , B44C1/22 , C23F1/00
CPC分类号： H05K3/108 , G03F7/40 , H05K2203/0285 , H05K2203/0392 , H05K2203/072 , H05K2203/0769 , H05K2203/0783 , H05K2203/0789 , H05K2203/1476 , H05K3/062 , H05K3/383
摘要： A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.
摘要翻译：提供了一种在形成在基板上的基底金属上形成导电电路图案的工艺。在基体金属上，首先以与要形成的电路对应的图案设置电镀抗蚀剂，然后通过电镀形成电路图案。用剥离剂处理电镀抗蚀剂，然后用汽提残渣去除剂通过脱水分解反应来切断抗蚀剂中的化学键。用贱金属的蚀刻剂处理贱金属，除去在用剥离残渣去除剂处理后仍然残留的任何抗蚀剂残渣，并在被电镀抗蚀剂覆盖的区域上蚀刻贱金属。

6. 发明授权

US08791783B2 Electronic component to be embedded in substrate and component-embedded substrate 有权
标题翻译：嵌入基板和部件嵌入式基板的电子部件
公开(公告)号：US08791783B2
公开(公告)日：2014-07-29
申请号：US13642469
申请日：2011-05-11
申请人： Masashi Miyazaki , Yuichi Sugiyama , Yoshiki Hamada , Yutaka Hata , Hideki Yokota
发明人： Masashi Miyazaki , Yuichi Sugiyama , Yoshiki Hamada , Yutaka Hata , Hideki Yokota
IPC分类号： H01F27/29 , H01F5/00 , H01L27/08
CPC分类号： H01F27/327 , H01F17/0013 , H01F27/29 , H01F2017/0066 , H01L21/568 , H01L24/19 , H01L24/24 , H01L2224/04105 , H01L2224/24227 , H01L2224/73267 , H01L2224/92144 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H05K1/165 , H05K1/185 , H05K3/4602 , H05K3/4608 , H05K2201/0355 , H05K2201/086 , H05K2201/1003 , H05K2201/10636 , H05K2201/10674 , H05K2203/0156 , Y02P70/611 , H01L2924/00
摘要： An electronic component to be embedded in a substrate is configured so that planar coils protected by insulators are sandwiched be a pair of magnetic layers. Ports, or openings or absent parts are provided at predetermined positions of one or both of the magnetic layers, and the predetermined positions correspond to the positions opposite to terminal electrodes of the planar coils. Accordingly, a contribution to reduction of the size and weight of electronic equipment can be made.
摘要翻译：嵌入在基板中的电子部件被配置为使得由绝缘体保护的平面线圈被夹在一对磁性层之间。在一个或两个磁性层的预定位置处提供端口或开口或不存在的部分，并且预定位置对应于与平面线圈的端子电极相对的位置。因此，可以对电子设备的尺寸和重量的减小做出贡献。

7. 发明授权

US08774205B2 Network device and its control method and computer program product 有权
标题翻译：网络设备及其控制方法和计算机程序产品
公开(公告)号：US08774205B2
公开(公告)日：2014-07-08
申请号：US13348334
申请日：2012-01-11
申请人： Masashi Miyazaki , Hideo Kodaka , Shinji Nozaki
发明人： Masashi Miyazaki , Hideo Kodaka , Shinji Nozaki
IPC分类号： H04W52/02 , H04W84/12
CPC分类号： H04L12/12 , Y02D50/20 , Y02D50/30 , Y02D50/40
摘要： A network device 200 for relaying packets includes a network interface 220, a forwarding engine 240, a state change controller 274, a device state controller 276 and a device information table 278. The state change controller 274 and the device state controller 276 cooperatively determine whether a packet receiver port that has received a sleep notification packet among a plurality of ports included in the network interface 220 has setting of link aggregation. When link aggregation is set for the packet receiver port, the state change controller 274 and the device state controller 276 keep the packet receiver port in a power ON state, while all other ports, which belong to an identical link aggregation group are to a power OFF state.
摘要翻译：用于中继分组的网络设备200包括网络接口220，转发引擎240，状态改变控制器274，设备状态控制器276和设备信息表278.状态改变控制器274和设备状态控制器276协作地确定是否已经在网络接口220中包括的多个端口中接收到睡眠通知分组的分组接收器端口具有链路聚合的设置。当为分组接收端口设置链路聚合时，状态改变控制器274和设备状态控制器276将分组接收端口保持在电源接通状态，而属于相同链路聚合组的所有其他端口都是功率 OFF状态。

8. 发明申请

US20100323474A1 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SUBSTRATE FOR THE SEMICONDUCTOR PACKAGE 失效
标题翻译：制造半导体封装的方法和制造半导体封装的衬底的方法
公开(公告)号：US20100323474A1
公开(公告)日：2010-12-23
申请号：US12794293
申请日：2010-06-04
申请人： Masashi Miyazaki
发明人： Masashi Miyazaki
IPC分类号： H01L21/60
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/6835 , H01L23/49822 , H01L24/16 , H01L2221/68345 , H01L2224/13021 , H01L2224/16 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H05K1/113 , H05K3/205 , H05K3/4682 , H05K2201/09472 , H05K2201/10674 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package, includes the steps of: forming a substrate on which a semiconductor chip is to be mounted; and mounting the semiconductor chip on the substrate through connection bumps, the substrate forming step including a first step of forming a plurality of electrode pads to be bonded to the connection bumps on a part of a support plate, a second step of forming one or more wiring layers on the support plate including the electrode pads with an insulation layer interposed between them, thereby forming a substrate having the electrode pads formed thereon on one side thereof, and a third step of removing the substrate from the support plate, wherein a plurality of first convex portions are formed on the support plate prior to the first step, and the electrode pads are formed on the first convex portions at the first step.
摘要翻译：一种制造半导体封装的方法，包括以下步骤：形成其上要安装半导体芯片的基板; 并且通过连接凸块将所述半导体芯片安装在所述基板上，所述基板形成步骤包括：第一步骤，在支撑板的一部分上形成要与所述连接凸块接合的多个电极焊盘;第二步骤，形成一个或多个支撑板上的布线层包括电极焊盘，绝缘层插在它们之间，从而形成其一侧上形成有电极焊盘的基板，以及从支撑板移除基板的第三步骤在第一步骤之前，在支撑板上形成第一凸起部分，并且在第一步骤中在第一凸部上形成电极焊盘。

9. 发明授权

US5919603A Process for producing printed wiring board 失效
公开(公告)号：US5919603A
公开(公告)日：1999-07-06
申请号：US967196
申请日：1997-10-29
申请人： Masashi Miyazaki , Haruo Akahoshi , Shozo Nohara , Kenzi Kikuta , Toshiaki Ishimaru
发明人： Masashi Miyazaki , Haruo Akahoshi , Shozo Nohara , Kenzi Kikuta , Toshiaki Ishimaru
IPC分类号： G03F7/033 , G03F7/30 , G03F7/32 , H05K3/00 , H05K3/10 , H05K3/18 , G03C1/725 , C08J3/28
CPC分类号： G03F7/322 , G03F7/033 , G03F7/30 , H05K3/108 , H05K3/184 , H05K2203/0783 , H05K2203/0793 , H05K3/0076 , Y10T29/49126 , Y10T29/49156
摘要： In an additive process for producing printed wiring boards, by using a developer comprising a chlorine-free organic solvent and an alkaline aqueous solution and as a resist material a copolymer of methacrylic acid and methyl methacrylate or the like, the production steps are simplified even if a substrate having a large area is used, and abolishment of chlorine-containing organic solvent as a developer becomes possible.

10. 发明授权

US08314343B2 Multi-layer board incorporating electronic component and method for producing the same 有权
标题翻译：包含电子元件的多层板及其制造方法
公开(公告)号：US08314343B2
公开(公告)日：2012-11-20
申请号：US12200920
申请日：2008-08-28
申请人： Yusuke Inoue , Eiji Mugiya , Masashi Miyazaki , Tatsuro Sawatari , Yuichi Sugiyama
发明人： Yusuke Inoue , Eiji Mugiya , Masashi Miyazaki , Tatsuro Sawatari , Yuichi Sugiyama
IPC分类号： H05K1/18 , H05K3/30
CPC分类号： H05K1/185 , H01L24/24 , H01L24/82 , H01L2224/04105 , H01L2224/2518 , H01L2224/73267 , H01L2224/92244 , H01L2924/14 , H01L2924/3025 , H01L2924/351 , H05K1/056 , H05K3/445 , H05K3/4608 , H05K3/4661 , H05K2201/0195 , H05K2201/0209 , H05K2201/10636 , H05K2203/1152 , H05K2203/1469 , Y02P70/611 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , H01L2924/00
摘要： In a multi-layer substrate including a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer layer of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in the holes, both of the bottom and top insulating resin layers have a structure that is a combination of a resin which is changed to cohesiveness when heated and which undergoes smaller plastic deformation when heated to a higher temperature and an insulating resin layer which has a thickness sufficient to maintain insulation between the electronic part or a conductor of the core and the wiring layer and which inherently undergoes small plastic deformation, so that the electronic part can be securely and sealed in the holes without using a particular adhesive.
摘要翻译：在包括形成有能够容纳电子部件的多个孔的芯的多层基板中，形成在芯的底面上的底部绝缘树脂层，形成在芯的顶面上的顶部绝缘树脂层，选择性地形成在底部绝缘树脂层或顶部绝缘树脂层的外层上的布线层和包含在孔中的电子部件，两个顶部和顶部绝缘树脂层都具有以下结构：树脂的组合在加热时变为粘结性，当被加热到较高温度时会变得较小的塑性变形，并且绝缘树脂层具有足以保持电子部件或芯的导体与布线层之间的绝缘的厚度并且固有地经历小的绝缘树脂层塑性变形，使得电子部件可以牢固地密封在孔中而不使用特定的粘合剂。

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