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1. 发明授权

US08314343B2 Multi-layer board incorporating electronic component and method for producing the same 有权
标题翻译：包含电子元件的多层板及其制造方法
公开(公告)号：US08314343B2
公开(公告)日：2012-11-20
申请号：US12200920
申请日：2008-08-28
申请人： Yusuke Inoue , Eiji Mugiya , Masashi Miyazaki , Tatsuro Sawatari , Yuichi Sugiyama
发明人： Yusuke Inoue , Eiji Mugiya , Masashi Miyazaki , Tatsuro Sawatari , Yuichi Sugiyama
IPC分类号： H05K1/18 , H05K3/30
CPC分类号： H05K1/185 , H01L24/24 , H01L24/82 , H01L2224/04105 , H01L2224/2518 , H01L2224/73267 , H01L2224/92244 , H01L2924/14 , H01L2924/3025 , H01L2924/351 , H05K1/056 , H05K3/445 , H05K3/4608 , H05K3/4661 , H05K2201/0195 , H05K2201/0209 , H05K2201/10636 , H05K2203/1152 , H05K2203/1469 , Y02P70/611 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , H01L2924/00
摘要： In a multi-layer substrate including a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer layer of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in the holes, both of the bottom and top insulating resin layers have a structure that is a combination of a resin which is changed to cohesiveness when heated and which undergoes smaller plastic deformation when heated to a higher temperature and an insulating resin layer which has a thickness sufficient to maintain insulation between the electronic part or a conductor of the core and the wiring layer and which inherently undergoes small plastic deformation, so that the electronic part can be securely and sealed in the holes without using a particular adhesive.
摘要翻译：在包括形成有能够容纳电子部件的多个孔的芯的多层基板中，形成在芯的底面上的底部绝缘树脂层，形成在芯的顶面上的顶部绝缘树脂层，选择性地形成在底部绝缘树脂层或顶部绝缘树脂层的外层上的布线层和包含在孔中的电子部件，两个顶部和顶部绝缘树脂层都具有以下结构：树脂的组合在加热时变为粘结性，当被加热到较高温度时会变得较小的塑性变形，并且绝缘树脂层具有足以保持电子部件或芯的导体与布线层之间的绝缘的厚度并且固有地经历小的绝缘树脂层塑性变形，使得电子部件可以牢固地密封在孔中而不使用特定的粘合剂。

2. 发明授权

US08119451B2 Method of manufacturing semiconductor package and method of manufacturing substrate for the semiconductor package 失效
标题翻译：半导体封装的制造方法以及半导体封装用基板的制造方法
公开(公告)号：US08119451B2
公开(公告)日：2012-02-21
申请号：US12794293
申请日：2010-06-04
申请人： Masashi Miyazaki
发明人： Masashi Miyazaki
IPC分类号： H01L21/00
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/6835 , H01L23/49822 , H01L24/16 , H01L2221/68345 , H01L2224/13021 , H01L2224/16 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H05K1/113 , H05K3/205 , H05K3/4682 , H05K2201/09472 , H05K2201/10674 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package, includes the steps of: forming a substrate on which a semiconductor chip is to be mounted; and mounting the semiconductor chip on the substrate through connection bumps, the substrate forming step including a first step of forming a plurality of electrode pads to be bonded to the connection bumps on a part of a support plate, a second step of forming one or more wiring layers on the support plate including the electrode pads with an insulation layer interposed between them, thereby forming a substrate having the electrode pads formed thereon on one side thereof, and a third step of removing the substrate from the support plate, wherein a plurality of first convex portions are formed on the support plate prior to the first step, and the electrode pads are formed on the first convex portions at the first step.
摘要翻译：一种制造半导体封装的方法，包括以下步骤：形成其上要安装半导体芯片的基板; 并且通过连接凸块将所述半导体芯片安装在所述基板上，所述基板形成步骤包括：第一步骤，在支撑板的一部分上形成要与所述连接凸块接合的多个电极焊盘;第二步骤，形成一个或多个支撑板上的布线层包括电极焊盘，绝缘层插在它们之间，从而形成其一侧上形成有电极焊盘的基板，以及从支撑板移除基板的第三步骤在第一步骤之前，在支撑板上形成第一凸起部分，并且在第一步骤中在第一凸部上形成电极焊盘。

3. 发明授权

US07999577B2 Apparatus and method for detecting a changing point of measured signal 失效
标题翻译：用于检测测量信号变化点的装置和方法
公开(公告)号：US07999577B2
公开(公告)日：2011-08-16
申请号：US12357405
申请日：2009-01-22
申请人： Masashi Miyazaki
发明人： Masashi Miyazaki
IPC分类号： G01R25/00 , H03D13/00
CPC分类号： G01R31/31922
摘要： Provided is an apparatus comprising a delaying section that generates a plurality of delayed signals by delaying a single first input signal by different delay amounts; a first acquiring section that acquires each of a plurality of input second input signals at a first phase of a reference clock; a second acquiring section that acquires each of the plurality of second input signals at a second phase of the reference clock, which is different from the first phase; and a change point detecting section that detects a change point of one of the first input signal and a second input signal, based on values of the plurality of signals acquired by the first acquiring section and values of the plurality of signals acquired by the second acquiring section.
摘要翻译：提供了一种装置，包括延迟部分，其通过以不同的延迟量延迟单个第一输入信号来产生多个延迟信号; 第一获取部，其在参考时钟的第一相位处获取多个输入的第二输入信号中的每一个; 第二获取部，其以与所述第一相位不同的所述基准时钟的第二相位取得所述多个第二输入信号中的每一个; 以及变化点检测部，其基于由第一获取部获取的多个信号的值和通过第二获取获取的多个信号的值来检测第一输入信号和第二输入信号中的一个的变化点部分。

4. 发明授权

US07928560B2 Composite multi-layer substrate and module using the substrate 有权
标题翻译：复合多层基板和使用基板的模块
公开(公告)号：US07928560B2
公开(公告)日：2011-04-19
申请号：US12780501
申请日：2010-05-14
申请人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
发明人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
IPC分类号： H01L23/04
CPC分类号： H05K1/185 , H01L23/49822 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/2518 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01037 , H01L2924/01057 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15159 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H05K1/021 , H05K3/445 , H05K3/4641 , H05K2201/0969 , H05K2201/09745 , H01L2924/00
摘要： A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
摘要翻译：一种复合多层基板，包括由具有优异导电性，优异导热性和高刚性的材料形成的平板状芯体，至少覆盖前后树脂层和后树脂层芯构件的表面和通过芯构件的前后侧形成在芯构件中的无底孔，其中电子部件安装在无底孔中，由此，复合多层基板的强度可以通过芯构件的刚性保证，可以消除传统的现有技术的玻璃布，可以避免由离子迁移引起的电特性的劣化，并且将导致降低生产成本。

5. 发明申请

US20100303147A1 ENCODING APPARATUS AND ENCODING METHOD, AND DECODING APPARATUS AND DECODING METHOD 失效
标题翻译：编码装置和编码方法，以及解码装置和解码方法
公开(公告)号：US20100303147A1
公开(公告)日：2010-12-02
申请号：US12762653
申请日：2010-04-19
申请人： Masashi Miyazaki
发明人： Masashi Miyazaki
IPC分类号： H04N7/12
CPC分类号： H04N19/40 , H04N19/91
摘要： An encoding apparatus includes a receiving section receiving syntax information defined by an encoding standard, a first encoding section encoding the received syntax information to generate encoded information, a transferring section transferring transmission encoded information based on the encoded information generated by the first encoding section, a second encoding section encoding reproduced encoded information reproduced from the transferred transmission encoded information, a conversion section converting the encoded information encoded by the first encoding section into redefined encoded information, to generate the transmission encoded information in accordance with the transfer capacity of the transferring section and the processing speed of encoding in each of the first encoding section and the second encoding section so as not to cause delay in encoding in the first encoding section or the second encoding section, and an inverse conversion section inversely converting the converted redefined encoded information to generate the reproduced encoded information.
摘要翻译：一种编码装置，包括：接收部，接收由编码标准定义的语法信息;编码所接收的语法信息以生成编码信息的第一编码部;基于由所述第一编码部生成的编码信息，传送发送编码信息的传送部; 编码从传送的传送编码信息再现的再现编码信息的第二编码部分，将由第一编码部分编码的编码信息转换为重新定义的编码信息的转换部分，以根据传送部分的传送容量生成传输编码信息，以及在第一编码部分和第二编码部分中的每一个中的编码处理速度，以便不在第一编码部分或第二编码部分中引起编码延迟;以及逆变换部分，转换的重新编码信息以产生再现的编码信息。

6. 发明授权

US07379306B2 Multilayer substrate including components therein 有权
标题翻译：多层基材包括其中的组分
公开(公告)号：US07379306B2
公开(公告)日：2008-05-27
申请号：US11114781
申请日：2005-04-25
申请人： Tatsuro Sawatari , Masashi Miyazaki
发明人： Tatsuro Sawatari , Masashi Miyazaki
IPC分类号： H05K1/18 , H05K7/00
CPC分类号： H01L23/5389 , H01L23/142 , H01L23/5383 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/16225 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/82047 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K3/4641 , H05K2201/09309 , Y10T428/24917 , Y10T428/31678 , Y10T428/31681 , H01L2924/00
摘要： Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.
摘要翻译：使用通过结合多个金属层而形成的金属芯层，将具有不同高度的部件安装在多层基板中。金属芯层包括通孔和点对面部分。无源元件和有源元件分别设置在通孔和点对面部分中。这些部件连接到形成在布线层上的导电图案，其间具有连接通孔。控制具有连接通孔的每个部件的接触面，以与金属层设置在相同的高度。

7. 发明申请

US20050193298A1 Testing apparatus 失效
标题翻译：测试仪器
公开(公告)号：US20050193298A1
公开(公告)日：2005-09-01
申请号：US10773562
申请日：2004-02-06
申请人： Kenji Inaba , Masashi Miyazaki
发明人： Kenji Inaba , Masashi Miyazaki
IPC分类号： G01R31/28 , G01R31/3167 , G01R31/319 , G06F11/00
CPC分类号： G01R31/31924 , G01R31/3167
摘要： A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a first testing module among the plurality of testing modules should be performed before a test operation by a second testing module among the plurality of testing modules, trigger return signal receiving means for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and trigger signal supplying means for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving means receives the trigger return signal.
摘要翻译：一种测试装置，包括多个测试模块槽，可选地安装有用于测试被测设备的不同类型的测试模块的操作顺序保持装置，用于保持指示在多个测试中由第一测试模块进行的测试操作的信息模块应在多个测试模块之间的第二测试模块进行测试操作之前进行，触发返回信号接收装置用于从第一测试模块接收触发返回信号，触发返回信号指示第一测试模块已经完成在第一测试模块的测试操作已经完成的情况下，以及用于向第二测试模块提供触发信号的触发信号提供装置，指示第二测试模块应该开始其测试操作的触发信号，当触发返回信号接收装置接收触发返回点燃

8. 发明授权

US06306481B1 Multilayer circuit board having insulating layer with via-holes 失效
标题翻译：多层电路板，具有带通孔的绝缘层
公开(公告)号：US06306481B1
公开(公告)日：2001-10-23
申请号：US09337268
申请日：1999-06-22
申请人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
发明人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
IPC分类号： B32B310
CPC分类号： H05K3/0023 , G03F7/038 , H05K1/0373 , H05K3/4644 , H05K2201/0195 , H05K2201/0209 , Y10S428/901 , Y10T428/24322 , Y10T428/24917 , Y10T428/31511 , Y10T428/31529
摘要： A multilayer circuit board having a resolution in the range of 25-80 &mgr;m, and blind via-holes between layers, the blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer having the blind via-holes between the layers has a glass transition temperature in the range of 150-220° C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process are reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes are suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
摘要翻译：具有分辨率在25-80μm的多层电路板和层之间的盲孔，盲孔通孔具有2.0-0.6范围内的纵横比，用于实现层之间的接近，其中绝缘层之间具有盲孔的层具有150-220℃的玻璃化转变温度，并且使用环氧基感光性树脂组合物。得到具有优选的分辨率和耐热性的感光性树脂组合物。提供了一种多层电路板，其中在裸芯片安装工艺中的回流工艺，金线接合工艺和修补工艺的步骤中产生的热应力减小，并且导体布线的剥离和多层的变形在加热过程中由机械应力引起的电路板被抑制。因此，电子设备的尺寸和重量的减小是可能的。

9. 发明授权

US5914216A Multilayer circuit board and photosensitive resin composition used therefor 失效
标题翻译：多层电路板和用于此的光敏树脂组合物
公开(公告)号：US5914216A
公开(公告)日：1999-06-22
申请号：US896456
申请日：1997-07-18
申请人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
发明人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
IPC分类号： G03F7/004 , G03F7/038 , H05K1/03 , H05K3/00 , H05K3/46 , G03C1/725
CPC分类号： H05K3/0023 , G03F7/038 , H05K1/0373 , H05K2201/0195 , H05K2201/0209 , H05K3/4644 , Y10S428/901 , Y10T428/24322 , Y10T428/24917 , Y10T428/31511 , Y10T428/31529
摘要： A multilayer circuit board having a resolution in the range of 25-80 .mu.m, and blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer between said layers having the blind via-holes has a glass transition temperature in the range of 150-220.degree. C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process was reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes were suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
摘要翻译：具有25-80μm范围内分辨率的多层电路板和具有2.0-0.6范围内的纵横比的盲孔，以实现层之间的接近，其中所述层之间的绝缘层具有盲通孔的玻璃化转变温度为150〜220℃，使用环氧基感光性树脂组合物。得到具有优选的分辨率和耐热性的感光性树脂组合物。提供一种多层电路板，其中在裸芯片安装工艺中在回流处理，金线接合工艺和修补工艺的步骤中产生的热应力减少，并且导体布线的剥离和多层的变形在加热过程中由机械应力引起的电路板被抑制。因此，电子设备的尺寸和重量的减小是可能的。

10. 发明授权

US5712080A Method for manufacturing printed circuit board 失效
标题翻译：印刷电路板制造方法
公开(公告)号：US5712080A
公开(公告)日：1998-01-27
申请号：US801421
申请日：1997-02-18
申请人： Yuichi Satsu , Haruo Akahoshi , Mineo Kawamoto , Akio Takahashi , Masashi Miyazaki , Toshiaki Ishimaru
发明人： Yuichi Satsu , Haruo Akahoshi , Mineo Kawamoto , Akio Takahashi , Masashi Miyazaki , Toshiaki Ishimaru
IPC分类号： G03F7/004 , G03F7/038 , G03F7/085 , H05K3/00 , H05K3/06 , H05K3/10 , H05K3/18 , H05K3/38
CPC分类号： G03F7/085 , H05K3/108 , H05K2201/0347 , H05K2201/0355 , H05K2203/1105 , H05K2203/124 , H05K3/0076 , H05K3/062 , H05K3/384 , Y10S430/155
摘要： A method for manufacturing printed circuit board by forming wiring pattern by chemical metal plating using a negative pattern made of a photosensitive resin composition layer as the plating resist, wherein the photosensitive resin comprises at least a linear high polymer composed of repeating units expressed by the following general formula (1); ##STR1## where, R.sub.1 is H, an alkyl group having 1-9 carbon atoms, an alkoxy group having 1-9 carbon atoms, and a carboxyalkyl group having 1-9 carbon atoms, R.sub.2 is an alkylene group having 1-9 carbon atoms, and n is the polymerized number of the repeating unit, and an organic compound expressed by the following general formula (2); ##STR2## where, R.sub.3 is H or an alkyl group having 1-6 carbon atoms, X is NH or S, and Z is N or C--Y, where Y is H, NH.sub.2, or SH.
摘要翻译：一种印刷电路板的制造方法，其特征在于，使用由感光性树脂组合物层构成的负极图案，通过化学金属电镀形成配线图案作为电镀抗蚀剂，其特征在于，所述感光性树脂至少含有由以下所示的重复单元构成的直链状高分子通式（1）; 具有1-9个碳原子的烷氧基，具有1-9个碳原子的羧基烷基，R2是具有1-9个碳原子的亚烷基，n是重复单元的聚合数和由以下通式（2）表示的有机化合物。（2）其中，R3为H或具有1-6个碳原子的烷基，X为NH或S，Z为N或C-Y，其中Y为H，NH2或SH。

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