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    • 3. 发明申请
    • DIGITAL PHASE COMPARATOR
    • 数字相位比较器
    • US20110304357A1
    • 2011-12-15
    • US13203138
    • 2010-03-05
    • Takashi Tokairin
    • Takashi Tokairin
    • H03D13/00
    • H03K5/26H03D13/006H03L7/091H03L2207/50
    • A digital phase comparator is provided in which first phase difference signals and second phase difference signals are used as digital phase difference information. The first phase difference signals are generated by sampling a second clock signal with a first group of clock signals having regular intervals. The second phase difference signals are generated, using a second group of clock signals and a first group of signals which are obtained by delaying a second clock signal and a first signal generated by performing a logic operation on the first phase difference signal respectively at different regular intervals, by sampling the second group of clock signals with the first group of signals.
    • 提供数字相位比较器,其中第一相位差信号和第二相位差信号用作数字相位差信息。 通过用具有规则间隔的第一组时钟信号采样第二时钟信号来产生第一相位差信号。 使用第二组时钟信号和第一组信号来产生第二相位差信号,所述第一组信号是通过分别以不同的规则延迟第二时钟信号和通过对第一相位差信号执行逻辑运算而产生的第一信号而获得的 间隔,通过用第一组信号对第二组时钟信号进行采样。
    • 4. 发明授权
    • Oscillation circuit and semiconductor integrated circuit including the same
    • 振荡电路和半导体集成电路包括相同
    • US08988157B2
    • 2015-03-24
    • US13525099
    • 2012-06-15
    • Takashi Tokairin
    • Takashi Tokairin
    • H03K3/0231H03K4/501H03L7/02H03K4/502G06F1/04H03L7/18
    • H03K3/0231G06F1/04H03K4/501H03K4/502H03L7/02H03L7/099H03L7/18
    • An oscillation circuit includes an RS flip-flop for generating output signals based on a set signal and a reset signal, an electric-charge charge/discharge unit which has first and second capacitors and charges or discharges the first and second capacitors complementarily based on the output signals, a first comparator which compares a first voltage according to electric charge accumulated in the first capacitor and a first reference voltage and outputs the set signal, a second comparator which compares a second voltage according to electric charge accumulated in the second capacitor and the first reference voltage and outputs the reset signal, and a control unit for controlling a timing at which respective voltage levels of the first reference voltage and the first voltage match and a timing at which respective voltage levels of the first reference voltage and the second voltage match according to a frequency of the output signals.
    • 振荡电路包括用于基于设定信号和复位信号产生输出信号的RS触发器,充电充电/放电单元,其具有第一和第二电容器,并且基于所述第一和第二电容器互补地充电或放电第一和第二电容器 输出信号,第一比较器,其将根据在第一电容器中累积的电荷的第一电压和第一参考电压进行比较,并输出设定信号;第二比较器,其将根据第二电容器中积累的电荷的第二电压和 第一参考电压并输出复位信号;以及控制单元,用于控制第一参考电压和第一电压的各个电压电平匹配的定时以及第一参考电压和第二电压的各个电压电平匹配的定时 根据输出信号的频率。
    • 5. 发明申请
    • QUADRATURE MIXER
    • 平台混合器
    • US20120098585A1
    • 2012-04-26
    • US13382143
    • 2010-06-23
    • Masaki KitsunezukaTakashi Tokairin
    • Masaki KitsunezukaTakashi Tokairin
    • G06F7/44
    • H03D7/1441H03D7/1458H03D7/165
    • This invention provides an quadrature mixer which does not require a long time to adjust the amplitude value at the time of demodulation of the IQ signal. The quadrature mixer, comprising a first frequency-conversion unit that outputs a sixth signal derived by multiplying a first signal by a second and a fourth signals, a second frequency-conversion unit that outputs a seventh signal derived by multiplying the first signal by a third and a fifth signals, a first amplitude adjustment unit that outputs a eighth signal derived by multiplying the sixth signal by the third and fifth signals and a second amplitude adjustment unit that outputs a ninth signal derived by multiplying the seventh signal by the second and fifth signals.
    • 本发明提供一种正交混频器,其不需要很长时间来调整IQ信号解调时的振幅值。 正交混频器,包括:第一频率转换单元,输出通过将第一信号乘以第二和第四信号而导出的第六信号;第二频率转换单元,输出通过将第一信号乘以第三信号而导出的第七信号 和第五信号,第一幅度调整单元,输出通过将第六信号乘以第三和第五信号而导出的第八信号;以及第二幅度调整单元,其输出通过将第七信号乘以第二和第五信号而导出的第九信号 。
    • 6. 发明申请
    • OPTICAL MODULE
    • 光学模块
    • US20090098833A1
    • 2009-04-16
    • US12224780
    • 2007-02-15
    • Takashi TokairinTadashi Maeda
    • Takashi TokairinTadashi Maeda
    • H04B1/40
    • H03B19/00H03L7/23
    • A first frequency generator outputs a signal at first frequency f1 which satisfies a relationship of f1>f0 with desired frequency f0. A second frequency generator outputs a signal at second frequency f2 which satisfies a relationship of f2>f0 with desired frequency f0. A frequency discriminator frequency combines the signal generated from the first frequency generator with the signal generated from the second frequency generator to generate a signal which contains a component at desired frequency f0. The frequency discriminator further passes therethrough only a frequency region lower than a predetermined threshold frequency of the generated signal.
    • 第一频率发生器以满足f1> f0的关系的期望频率f0的第一频率f1输出信号。 第二频率发生器输出满足f2> f0的关系的期望频率f0的第二频率f2的信号。 频率鉴频器频率将从第一频率发生器产生的信号与从第二频率发生器产生的信号相组合,以产生包含期望频率f0的分量的信号。 频率鉴别器仅通过低于所产生信号的预定阈值频率的频率区域。
    • 7. 发明授权
    • Quadrature mixer
    • 正交搅拌机
    • US08521112B2
    • 2013-08-27
    • US13382143
    • 2010-06-23
    • Masaki KitsunezukaTakashi Tokairin
    • Masaki KitsunezukaTakashi Tokairin
    • H04B1/16
    • H03D7/1441H03D7/1458H03D7/165
    • This invention provides an quadrature mixer which does not require a long time to adjust the amplitude value at the time of demodulation of the IQ signal. The quadrature mixer, comprising a first frequency-conversion unit that outputs a sixth signal derived by multiplying a first signal by a second and a fourth signals, a second frequency-conversion unit that outputs a seventh signal derived by multiplying the first signal by a third and a fifth signals, a first amplitude adjustment unit that outputs a eighth signal derived by multiplying the sixth signal by the third and fifth signals and a second amplitude adjustment unit that outputs a ninth signal derived by multiplying the seventh signal by the second and fifth signals.
    • 本发明提供一种正交混频器,其不需要很长时间来调整IQ信号解调时的振幅值。 正交混频器,包括:第一频率转换单元,输出通过将第一信号乘以第二和第四信号而导出的第六信号;第二频率转换单元,输出通过将第一信号乘以第三信号而导出的第七信号 和第五信号,第一幅度调整单元,输出通过将第六信号乘以第三和第五信号而导出的第八信号;以及第二幅度调整单元,其输出通过将第七信号乘以第二和第五信号而导出的第九信号 。
    • 8. 发明授权
    • Digital phase comparator
    • 数字相位比较器
    • US08415983B2
    • 2013-04-09
    • US13203138
    • 2010-03-05
    • Takashi Tokairin
    • Takashi Tokairin
    • G01R25/00
    • H03K5/26H03D13/006H03L7/091H03L2207/50
    • A digital phase comparator is provided in which first phase difference signals and second phase difference signals are used as digital phase difference information. The first phase difference signals are generated by sampling a second clock signal with a first group of clock signals having regular intervals. The second phase difference signals are generated, using a second group of clock signals and a first group of signals which are obtained by delaying a second clock signal and a first signal generated by performing a logic operation on the first phase difference signal respectively at different regular intervals, by sampling the second group of clock signals with the first group of signals.
    • 提供了数字相位比较器,其中第一相位差信号和第二相位差信号用作数字相位差信息。 通过用具有规则间隔的第一组时钟信号采样第二时钟信号来产生第一相位差信号。 使用第二组时钟信号和第一组信号来产生第二相位差信号,所述第一组信号是通过分别以不同的规则延迟第二时钟信号和通过对第一相位差信号执行逻辑运算而产生的第一信号而获得的 间隔,通过用第一组信号对第二组时钟信号进行采样。
    • 9. 发明授权
    • Signal processing unit
    • 信号处理单元
    • US07565127B2
    • 2009-07-21
    • US11569117
    • 2005-04-14
    • Takashi TokairinNoriaki Matsuno
    • Takashi TokairinNoriaki Matsuno
    • H04B1/10H04B1/16
    • H04L25/061H03D3/008H04B1/30
    • A signal processing unit of the present invention includes: input terminal (21) to which an input signal is input; high-pass filter (23) for cutting off the DC component of the input signal; output terminal (22) for outputting a signal output from high-pass filter (23) as an output signal; determination element (26) for determining whether or not the voltage of the output signal falls out of a predetermined detection threshold range; and, switches (27,28) for connecting the output node of high-pass filter (23) to a power supply circuit when the voltage of the output signal is determined to fall out of the detection threshold range at determination element (26).
    • 本发明的信号处理单元包括:输入信号被输入的输入端子(21); 高通滤波器(23),用于切断输入信号的直流分量; 输出端子(22),用于输出从高通滤波器(23)输出的信号作为输出信号; 确定元件(26),用于确定输出信号的电压是否脱离预定的检测阈值范围; 以及用于当确定元件(26)确定输出信号的电压落在检测阈值范围内时,用于将高通滤波器(23)的输出节点连接到电源电路的开关(27,28)。
    • 10. 发明申请
    • Signal Processing Unit
    • 信号处理单元
    • US20080090545A1
    • 2008-04-17
    • US11569117
    • 2005-04-14
    • Takashi TokairinNoriaki Matsuno
    • Takashi TokairinNoriaki Matsuno
    • H04B1/16
    • H04L25/061H03D3/008H04B1/30
    • A signal processing unit of the present invention includes: input terminal (21) to which an input signal is input; high-pass filter (23) for cutting off the DC component of the input signal; output terminal (22) for outputting a signal output from high-pass filter (23) as an output signal; determination element (26) for determining whether or not the voltage of the output signal falls out of a predetermined detection threshold range; and, switches (27,28) for connecting the output node of high-pass filter (23) to a power supply circuit when the voltage of the output signal is determined to fall out of the detection threshold range at determination element (26).
    • 本发明的信号处理单元包括:输入信号被输入的输入端子(21); 高通滤波器(23),用于切断输入信号的直流分量; 输出端子(22),用于输出从高通滤波器(23)输出的信号作为输出信号; 确定元件(26),用于确定输出信号的电压是否脱离预定的检测阈值范围; 以及用于当确定元件(26)确定输出信号的电压落在检测阈值范围内时,用于将高通滤波器(23)的输出节点连接到电源电路的开关(27,28)。