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    • 3. 发明授权
    • CVD apparatus of improved in-plane uniformity
    • 具有改善的面内均匀性的CVD装置
    • US07828898B2
    • 2010-11-09
    • US11521216
    • 2006-09-13
    • Tadashi MaedaKeisuke Hichijoh
    • Tadashi MaedaKeisuke Hichijoh
    • C23C16/455
    • C23C16/45591C23C16/45512C23C16/45574
    • A CVD apparatus includes a vertical boat extending in a vertical direction and capable of holding plural substrates in a horizontal state such that the substrates are aligned in the vertical direction, an inner tube extending in the vertical direction and provided so as to surround the boat laterally, an outer tube surrounding the inner tube laterally from outside, the outer tube further covering a top part of the inner tube, a flange holding the inner tube and outer tube at respective bottom ends thereof, gas introducing nozzles provided on a flange sidewall at two locations thereof, the gas introducing nozzles introducing gases from outside to an interior of the inner tube at respective gas ejection ports, and a gas evacuation part evacuating a gas in the outer tube to outside thereof, wherein there is provided a guide part in the vicinity of the gas ejection ports of the gas introducing nozzles such that the gases ejected from the respective gas ejection ports are caused to flow generally parallel to a bottom surface of the flange along an inner surface of the flange sidewall.
    • CVD装置包括垂直船,其在垂直方向上延伸并且能够以水平状态保持多个基板,使得基板在垂直方向上对准,内管在垂直方向上延伸并且设置成围绕船侧面 ,外管,从外侧横向包围内管,外管进一步覆盖内管的顶部,在其各自的下端保持内管和外管的凸缘,设置在凸缘侧壁上的两个气体引入喷嘴 位置,气体引入喷嘴在各个气体喷射口从外部向内管内部引入气体,以及将外管中的气体抽吸到其外部的排气部,其中在附近设置有引导部 的气体导入喷嘴的气体喷出口,使得从各个气体喷出口排出的气体流过 沿凸缘侧壁的内表面平行于凸缘的底表面。
    • 4. 发明授权
    • Amplification circuit
    • 放大电路
    • US07821334B2
    • 2010-10-26
    • US12298185
    • 2007-04-24
    • Tadashi MaedaTomoyuki Yamase
    • Tadashi MaedaTomoyuki Yamase
    • H03F1/14
    • H03F1/565H03F1/42H03F3/005H03F3/195H03F3/68
    • The present invention is aimed at realizing an amplifying circuit whose chip size is prevented from being significantly increased even if the number of compatible frequencies increases, and which has a wide dynamic range when it operates under a low voltage. The amplifying circuit includes a plurality of impedance converting circuits connected to each other by a switching circuit of a first type having a signal cutting-off function, a switching circuit of a second type connected to a path branched from an input side of the switching circuit of the first type, the switching circuit of the second type having a signal cutting-off function, amplifiers connected respectively to an output side of one of the impedance converting circuits in a final stage and to an output side of the switching circuit of the second type, and a control signal generating circuit for controlling connection/disconnection between said switching circuit of the first type and said switching circuit of the second type; wherein either one of the paths is selected to input a signal to one of the amplifiers.
    • 本发明的目的在于实现一种放大电路,即使在兼容频率增加的情况下,即使在低电压下工作也具有较大的动态范围,其芯片尺寸也被防止显着增加。 放大电路包括通过具有信号截止功能的第一类型的开关电路彼此连接的多个阻抗转换电路,连接到从开关电路的输入侧分支的路径的第二类型的开关电路 第一类型的开关电路,具有信号截止功能的第二类型的开关电路,分别连接到最终级中的一个阻抗转换电路的输出侧和第二类的开关电路的输出侧的放大器 以及用于控制所述第一类型的所述开关电路和所述第二类型的所述开关电路之间的连接/断开的控制信号发生电路; 其中选择所述路径中的任一个以将信号输入到所述放大器之一。
    • 5. 发明申请
    • PHASE COMPARATOR AND PHASE-LOCKED LOOP
    • 相位比较器和相位锁定环路
    • US20100171527A1
    • 2010-07-08
    • US12676221
    • 2008-09-02
    • Tadashi Maeda
    • Tadashi Maeda
    • H03D13/00H03L7/06
    • H03K5/26H03D13/00H03L7/091H03L7/093H03L2207/50
    • A phase comparator is provided that solves the problem that a VCO cannot be controlled with high precision. A frequency divider frequency-divides a VCO signal applied as input to an input terminal (10) in steps, and supplies the VCO signals of each step as output. A latch unit latches the VCO signal that is applied to the input terminal (10) and each VCO signal that was supplied from the frequency divider based on a reference signal that is applied to an input terminal (11). An output unit supplies the latch results realized by the latch unit as phase difference signals that indicate phase differences of the reference signal and the VCO signals.
    • 提供了一种解决VCO不能以高精度被控制的问题的相位比较器。 分频器将逐步施加的输入端的VCO信号分频到输入端子(10),并将每一步的VCO信号作为输出。 锁存单元基于施加到输入端子(11)的参考信号,锁存施加到输入端子(10)的VCO信号和从分频器提供的每个VCO信号。 输出单元提供由锁存单元实现的锁存结果作为指示参考信号和VCO信号的相位差的相位差信号。
    • 10. 发明申请
    • OPTICAL MODULE
    • 光学模块
    • US20090098833A1
    • 2009-04-16
    • US12224780
    • 2007-02-15
    • Takashi TokairinTadashi Maeda
    • Takashi TokairinTadashi Maeda
    • H04B1/40
    • H03B19/00H03L7/23
    • A first frequency generator outputs a signal at first frequency f1 which satisfies a relationship of f1>f0 with desired frequency f0. A second frequency generator outputs a signal at second frequency f2 which satisfies a relationship of f2>f0 with desired frequency f0. A frequency discriminator frequency combines the signal generated from the first frequency generator with the signal generated from the second frequency generator to generate a signal which contains a component at desired frequency f0. The frequency discriminator further passes therethrough only a frequency region lower than a predetermined threshold frequency of the generated signal.
    • 第一频率发生器以满足f1> f0的关系的期望频率f0的第一频率f1输出信号。 第二频率发生器输出满足f2> f0的关系的期望频率f0的第二频率f2的信号。 频率鉴频器频率将从第一频率发生器产生的信号与从第二频率发生器产生的信号相组合,以产生包含期望频率f0的分量的信号。 频率鉴别器仅通过低于所产生信号的预定阈值频率的频率区域。