专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07268763B2 Method for driving display and drive circuit for display 有权
公开(公告)号：US07268763B2
公开(公告)日：2007-09-11
申请号：US10701856
申请日：2003-11-05
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

2. 发明授权

US07180512B2 Integrated circuit free from accumulation of duty ratio errors 有权
标题翻译：集成电路没有占空比误差累积
公开(公告)号：US07180512B2
公开(公告)日：2007-02-20
申请号：US10335925
申请日：2003-01-03
申请人： Masao Kumagai , Hideto Fukuda , Shinya Udo
发明人： Masao Kumagai , Hideto Fukuda , Shinya Udo
IPC分类号： G09G5/00 , G09G5/10 , G09G3/34 , G09G3/36
CPC分类号： G09G3/3688
摘要： An integrated circuit includes a first signal-inversion switching circuit which receives a signal supplied from an exterior thereof as a first input signal, followed by outputting the first input signal after logic inversion thereof in response to a first state of a switching signal and outputting the first input signal without logic inversion in response to a second state of the switching signal, a signal processing circuit which performs signal processing based on the output of the first signal-inversion switching circuit, and a second signal-inversion switching circuit which receives the output of the first signal-inversion switching circuit passing through the signal processing circuit as a second input signal, followed by outputting the second input signal after logic inversion thereof in response to the second state of the switching signal and outputting the second input signal without logic inversion in response to the first state of the switching signal.
摘要翻译：集成电路包括：第一信号反相切换电路，其接收从其外部提供的信号作为第一输入信号，随后响应于开关信号的第一状态而在其逻辑反相之后输出第一输入信号，并输出响应于切换信号的第二状态而没有逻辑反转的第一输入信号，基于第一信号反相切换电路的输出执行信号处理的信号处理电路和接收输出的第二信号反相切换电路通过信号处理电路作为第二输入信号的第一信号反相切换电路，随后响应于切换信号的第二状态而在其逻辑反相之后输出第二输入信号，并输出没有逻辑反转的第二输入信号响应于开关信号的第一状态。

3. 发明授权

US06847346B2 Semiconductor device equipped with transfer circuit for cascade connection 失效
标题翻译：配备有用于级联连接的传输电路的半导体器件
公开(公告)号：US06847346B2
公开(公告)日：2005-01-25
申请号：US10278883
申请日：2002-10-24
申请人： Masao Kumagai , Shinya Udo
发明人： Masao Kumagai , Shinya Udo
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3685
摘要： A transfer circuit 25 includes two sets of an input circuit 52A and an output circuit 53B, which allows bidirectional transfer. The input circuit 52A decomposes external input data signals DI11A and DI12A to signals on lines L11 to L14 in synchronism with a clock signal CLK in order to reduce the frequency thereof. The output circuit 53B composes the decomposed signals in synchronism with the clock signal CLK to regenerate the original signals and output them as external output data signals DO11B and DO12B. Signals on either the lines L11 to L14 or L21 to L24 are selected by a multiplexer 57 to provide to a main body circuit.
摘要翻译：传送电路25包括两组输入电路52A和输出电路53B，其允许双向传送。输入电路52A与时钟信号CLK同步地将外部输入数据信号DI11A和DI12A分解为线路L11至L14上的信号，以便降低其频率。输出电路53B与时钟信号CLK同步地构成分解信号，以再生原始信号并将其作为外部输出数据信号DO11B和DO12B输出。在线路L11至L14或L21至L24上的信号由多路复用器57选择以提供给主体电路。

4. 发明授权

US07580020B2 Semiconductor device and liquid crystal panel driver device 有权
标题翻译：半导体装置和液晶面板驱动装置
公开(公告)号：US07580020B2
公开(公告)日：2009-08-25
申请号：US11487339
申请日：2006-07-17
申请人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
发明人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
IPC分类号： G09G3/34
CPC分类号： G09G3/006
摘要： A semiconductor device carries out a test utilizing contact with a probe needle without being affected by narrowing of the pitch at which output pads are arranged. The device is equipped with test circuits provided between a plurality of output buffers via which signals are output and output pads corresponding thereto. The test circuit includes output switches caused to sequentially make connections by a controller in test and interpad switches involved in making connections of the output pads with a test pad by the controller in test. In test, probe needles are brought into contact with the test pad. The output pads are not used in test, and can be arranged at a narrowed pitch. Thus, the chip area can be reduced and are therefore so that the pitch for the output pads can be narrowed and the chip area can be decreased.
摘要翻译：半导体器件利用与探针接触而进行测试，而不受输出焊盘布置的间距变窄的影响。该装置配备有测试电路，该测试电路设置在输出信号的多个输出缓冲器和对应于其的输出焊盘之间。测试电路包括输出开关，其由测试中的控制器顺序进行连接，并且控制器在测试中涉及与输出焊盘的连接与测试焊盘的连接。在测试中，探针与测试垫接触。输出垫不用于测试，可以以窄的间距布置。因此，可以减小芯片面积，因此可以使输出焊盘的间距变窄，并且可以减小芯片面积。

5. 发明申请

US20070296679A1 Method for driving display and drive circuit for display 有权
公开(公告)号：US20070296679A1
公开(公告)日：2007-12-27
申请号：US11890585
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

6. 发明授权

US07978168B2 D/A converter 有权
标题翻译： D / A转换器
公开(公告)号：US07978168B2
公开(公告)日：2011-07-12
申请号：US11890437
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A D/A converter for receiving a plurality of divisional voltages and converting a digital signal to an analog voltage with the divisional voltages, the D/A converter includes a selection circuit for receiving the divisional voltages and the digital signal to select one of the divisional voltages. The selection circuit includes a plurality of first switch circuits that are selectively activated in response to the digital signal to select one of the divisional voltages, with each of the first switch circuits being provided with a logic switch function and having an ON resistance when activated, and at least an activated one of the first switch circuits further dividing the selected one of the divisional voltages with the ON resistance. The plurality of switch circuits includes at least one voltage dividing switch circuit used to further divide the selected one of the divisional voltages.
摘要翻译： AD / A转换器，用于接收多个分压，并将数字信号转换为具有分压的模拟电压，D / A转换器包括用于接收分压的选择电路和数字信号，以选择分压之一。选择电路包括多个第一开关电路，其响应于数字信号选择性地激活以选择分压之一，其中每个第一开关电路被提供逻辑开关功能并且在被激活时具有导通电阻，并且所述第一开关电路中的至少一个被激活的开关电路进一步用所述导通电阻将所选择的所述一个电压分压。多个开关电路包括至少一个分压开关电路，用于进一步分割所选择的一个分压。

7. 发明申请

US20070296678A1 Method for driving display and drive circuit for display 有权
标题翻译：驱动显示和驱动电路进行显示的方法
公开(公告)号：US20070296678A1
公开(公告)日：2007-12-27
申请号：US11890437
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.
摘要翻译：一种显示器的驱动电路，其减少选择电路中的栅极数量以减少芯片面积。驱动电路包括用于通过划分预定参考电压来产生多个分压的第一分压电路。选择电路接收选择信号并选择分压之一。选择电路包括响应于选择信号选择性地激活以选择分压之一的多个第一开关电路。每个第一开关电路具有逻辑开关功能，并且在被激活时具有导通电阻。第一开关电路中的被激活的一个通过进一步分割所选择的一个分压来产生像素电压。

8. 发明申请

US20060256052A1 Semiconductor device and liquid crystal panel driver device 有权
公开(公告)号：US20060256052A1
公开(公告)日：2006-11-16
申请号：US11487339
申请日：2006-07-17
申请人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
发明人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
IPC分类号： G09G3/36
CPC分类号： G09G3/006
摘要： A semiconductor device carries out a test utilizing contact with a probe needle without being affected by narrowing of the pitch at which output pads are arranged. The device is equipped with test circuits provided between a plurality of output buffers via which signals are output and output pads corresponding thereto. The test circuit includes output switches caused to sequentially make connections by a controller in test and interpad switches involved in making connections of the output pads with a test pad by the controller in test. In test, probe needles are brought into contact with the test pad. The output pads are not used in test, and can be arranged at a narrowed pitch. Thus, the chip area can be reduced and are therefore so that the pitch for the output pads can be narrowed and the chip area can be decreased.

9. 发明授权

US07098878B2 Semiconductor device and liquid crystal panel driver device 有权
公开(公告)号：US07098878B2
公开(公告)日：2006-08-29
申请号：US10205414
申请日：2002-07-26
申请人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
发明人： Shinya Udo , Masao Kumagai , Masatoshi Kokubun , Hidekazu Nishizawa , Takeo Shigihara
IPC分类号： G09G3/34
CPC分类号： G09G3/006
摘要： A semiconductor device carries out a test utilizing contact with a probe needle without being affected by narrowing of the pitch at which output pads are arranged. The device is equipped with test circuits provided between a plurality of output buffers via which signals are output and output pads corresponding thereto. The test circuit includes output switches caused to sequentially make connections by a controller in test and interpad switches involved in making connections of the output pads with a test pad by the controller in test. In test, probe needles are brought into contact with the test pad. The output pads are not used in test, and can be arranged at a narrowed pitch. Thus, the chip area can be reduced and are therefore so that the pitch for the output pads can be narrowed and the chip area can be decreased.

10. 发明授权

US07903071B2 Driver IC for display and display including same 有权
标题翻译：驱动IC用于显示和显示，包括相同
公开(公告)号：US07903071B2
公开(公告)日：2011-03-08
申请号：US11890585
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A driver IC for a display that includes a first D/A converter with a 1st selection circuit that receives 1st image signals and supplies a selected positive divisional voltage to a 1st operational amplifier, which supplies a positive pixel voltage by amplifying the selected positive divisional voltage; a 2nd D/A converter with a 2nd selection circuit that receives 2nd image signals and supplies a selected negative divisional voltage to a 2nd operational amplifier, which supplies a negative pixel voltage by amplifying the selected negative divisional voltage; and a polarity switching switch with 1st and 2nd switches connecting the 1st and 2nd D/A converters respectively, the polarity switching switch being switched to supply each of output terminals corresponding to the 1st and 2nd image signals alternately with the positive and negative pixel voltages every horizontal scan period by activating/inactivating the 1st and 2nd switches in a complementary manner.
摘要翻译：一种用于显示器的驱动器IC，其包括具有第一选择电路的第一D / A转换器，所述第一选择电路接收第一图像信号并将选择的正分压提供给第一运算放大器，所述第一运算放大器通过放大所选择的正分压 ; 具有第二选择电路的第二D / A转换器，其接收第二图像信号并将选择的负分压提供给第二运算放大器，所述第二运算放大器通过放大所选择的负分压来提供负像素电压; 以及极性切换开关，具有分别连接第一和第二D / A转换器的第一和第二开关，极性切换开关被切换以与正，负像素电压交替地提供与第一和第二图像信号相对应的每个输出端子水平扫描周期通过以互补的方式激活/停用第1和第2开关。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式