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1. 发明授权

US07903071B2 Driver IC for display and display including same 有权
标题翻译：驱动IC用于显示和显示，包括相同
公开(公告)号：US07903071B2
公开(公告)日：2011-03-08
申请号：US11890585
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A driver IC for a display that includes a first D/A converter with a 1st selection circuit that receives 1st image signals and supplies a selected positive divisional voltage to a 1st operational amplifier, which supplies a positive pixel voltage by amplifying the selected positive divisional voltage; a 2nd D/A converter with a 2nd selection circuit that receives 2nd image signals and supplies a selected negative divisional voltage to a 2nd operational amplifier, which supplies a negative pixel voltage by amplifying the selected negative divisional voltage; and a polarity switching switch with 1st and 2nd switches connecting the 1st and 2nd D/A converters respectively, the polarity switching switch being switched to supply each of output terminals corresponding to the 1st and 2nd image signals alternately with the positive and negative pixel voltages every horizontal scan period by activating/inactivating the 1st and 2nd switches in a complementary manner.
摘要翻译：一种用于显示器的驱动器IC，其包括具有第一选择电路的第一D / A转换器，所述第一选择电路接收第一图像信号并将选择的正分压提供给第一运算放大器，所述第一运算放大器通过放大所选择的正分压 ; 具有第二选择电路的第二D / A转换器，其接收第二图像信号并将选择的负分压提供给第二运算放大器，所述第二运算放大器通过放大所选择的负分压来提供负像素电压; 以及极性切换开关，具有分别连接第一和第二D / A转换器的第一和第二开关，极性切换开关被切换以与正，负像素电压交替地提供与第一和第二图像信号相对应的每个输出端子水平扫描周期通过以互补的方式激活/停用第1和第2开关。

2. 发明申请

US20070296679A1 Method for driving display and drive circuit for display 有权
公开(公告)号：US20070296679A1
公开(公告)日：2007-12-27
申请号：US11890585
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

3. 发明授权

US07978168B2 D/A converter 有权
标题翻译： D / A转换器
公开(公告)号：US07978168B2
公开(公告)日：2011-07-12
申请号：US11890437
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A D/A converter for receiving a plurality of divisional voltages and converting a digital signal to an analog voltage with the divisional voltages, the D/A converter includes a selection circuit for receiving the divisional voltages and the digital signal to select one of the divisional voltages. The selection circuit includes a plurality of first switch circuits that are selectively activated in response to the digital signal to select one of the divisional voltages, with each of the first switch circuits being provided with a logic switch function and having an ON resistance when activated, and at least an activated one of the first switch circuits further dividing the selected one of the divisional voltages with the ON resistance. The plurality of switch circuits includes at least one voltage dividing switch circuit used to further divide the selected one of the divisional voltages.
摘要翻译： AD / A转换器，用于接收多个分压，并将数字信号转换为具有分压的模拟电压，D / A转换器包括用于接收分压的选择电路和数字信号，以选择分压之一。选择电路包括多个第一开关电路，其响应于数字信号选择性地激活以选择分压之一，其中每个第一开关电路被提供逻辑开关功能并且在被激活时具有导通电阻，并且所述第一开关电路中的至少一个被激活的开关电路进一步用所述导通电阻将所选择的所述一个电压分压。多个开关电路包括至少一个分压开关电路，用于进一步分割所选择的一个分压。

4. 发明申请

US20070296678A1 Method for driving display and drive circuit for display 有权
标题翻译：驱动显示和驱动电路进行显示的方法
公开(公告)号：US20070296678A1
公开(公告)日：2007-12-27
申请号：US11890437
申请日：2007-08-06
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.
摘要翻译：一种显示器的驱动电路，其减少选择电路中的栅极数量以减少芯片面积。驱动电路包括用于通过划分预定参考电压来产生多个分压的第一分压电路。选择电路接收选择信号并选择分压之一。选择电路包括响应于选择信号选择性地激活以选择分压之一的多个第一开关电路。每个第一开关电路具有逻辑开关功能，并且在被激活时具有导通电阻。第一开关电路中的被激活的一个通过进一步分割所选择的一个分压来产生像素电压。

5. 发明授权

US07268763B2 Method for driving display and drive circuit for display 有权
公开(公告)号：US07268763B2
公开(公告)日：2007-09-11
申请号：US10701856
申请日：2003-11-05
申请人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
发明人： Hideto Fukuda , Shinya Udo , Masao Kumagai , Osamu Kudo
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/20 , G09G3/3614 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , H03M1/069 , H03M1/687 , H03M1/76 , H03M1/765
摘要： A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

6. 发明授权

US07180512B2 Integrated circuit free from accumulation of duty ratio errors 有权
标题翻译：集成电路没有占空比误差累积
公开(公告)号：US07180512B2
公开(公告)日：2007-02-20
申请号：US10335925
申请日：2003-01-03
申请人： Masao Kumagai , Hideto Fukuda , Shinya Udo
发明人： Masao Kumagai , Hideto Fukuda , Shinya Udo
IPC分类号： G09G5/00 , G09G5/10 , G09G3/34 , G09G3/36
CPC分类号： G09G3/3688
摘要： An integrated circuit includes a first signal-inversion switching circuit which receives a signal supplied from an exterior thereof as a first input signal, followed by outputting the first input signal after logic inversion thereof in response to a first state of a switching signal and outputting the first input signal without logic inversion in response to a second state of the switching signal, a signal processing circuit which performs signal processing based on the output of the first signal-inversion switching circuit, and a second signal-inversion switching circuit which receives the output of the first signal-inversion switching circuit passing through the signal processing circuit as a second input signal, followed by outputting the second input signal after logic inversion thereof in response to the second state of the switching signal and outputting the second input signal without logic inversion in response to the first state of the switching signal.
摘要翻译：集成电路包括：第一信号反相切换电路，其接收从其外部提供的信号作为第一输入信号，随后响应于开关信号的第一状态而在其逻辑反相之后输出第一输入信号，并输出响应于切换信号的第二状态而没有逻辑反转的第一输入信号，基于第一信号反相切换电路的输出执行信号处理的信号处理电路和接收输出的第二信号反相切换电路通过信号处理电路作为第二输入信号的第一信号反相切换电路，随后响应于切换信号的第二状态而在其逻辑反相之后输出第二输入信号，并输出没有逻辑反转的第二输入信号响应于开关信号的第一状态。

7. 发明授权

US08581623B2 Lookup table, semiconductor integrated circuit, method for making lookup table and method for making semiconductor integrated circuit 有权
标题翻译：查找表，半导体集成电路，查找表的方法和制造半导体集成电路的方法
公开(公告)号：US08581623B2
公开(公告)日：2013-11-12
申请号：US12713270
申请日：2010-02-26
申请人： Hideto Fukuda
发明人： Hideto Fukuda
IPC分类号： H03K19/173
CPC分类号： H03K19/1736 , H01L27/0207 , H03K19/17736
摘要： A lookup table includes a single via layer having 2N via insertion portions corresponding to 2N input patterns provided from N input terminals; and a via inserted into at least one of the via insertion portions, the via connecting the input terminal and an output terminal.
摘要翻译：查找表包括具有对应于从N个输入端提供的2N个输入图案的2N个插入部分的单个通孔层; 以及插入到至少一个通孔插入部分中的通孔，连接输入端子和输出端子的通孔。

8. 发明授权

US08584069B2 Apparatus and method for design support using layout positions of first and second terminals 有权
标题翻译：使用第一和第二终端的布局位置的设计支持的装置和方法
公开(公告)号：US08584069B2
公开(公告)日：2013-11-12
申请号：US12892481
申请日：2010-09-28
申请人： Kenichi Ushiyama , Shigenori Ichinose , Kenji Suzuki , Kenji Kumagai , Takafumi Miyahara , Shuji Tanahashi , Hideto Fukuda
发明人： Kenichi Ushiyama , Shigenori Ichinose , Kenji Suzuki , Kenji Kumagai , Takafumi Miyahara , Shuji Tanahashi , Hideto Fukuda
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A design support method executed by a computer includes: detecting a layout position of a first terminal in a cell as a first layout position from layout data including a cell of a macro which is arranged at a plurality of orientations, the first terminal being arranged at a first orientation; calculating a second layout position of a first terminal which is arranged at a second orientation which is different from the first orientation based on a variation from the first orientation to the second orientation and the first layout position; associating the second layout position with the first layout position and the layout data; and outputting an association result.
摘要翻译：由计算机执行的设计支持方法包括：从包括布置在多个方向上的宏单元的布局数据中检测单元中的第一终端的布局位置作为第一布局位置，所述第一终端布置在第一个方向; 基于从所述第一取向到所述第二取向和所述第一布局位置的变化，计算布置在与所述第一取向不同的第二取向的第一端子的第二布局位置; 将第二布局位置与第一布局位置和布局数据相关联; 并输出关联结果。

9. 发明授权

US08531207B2 Lookup table, semiconductor integrated circuit, method for making lookup table and method for making semiconductor integrated circuit 有权
公开(公告)号：US08531207B2
公开(公告)日：2013-09-10
申请号：US12713270
申请日：2010-02-26
申请人： Hideto Fukuda
发明人： Hideto Fukuda
IPC分类号： H03K19/173
摘要： A lookup table includes a single via layer having 2N via insertion portions corresponding to 2N input patterns provided from N input terminals; and a via inserted into at least one of the via insertion portions, the via connecting the input terminal and an output terminal.

10. 发明申请

US20110078646A1 SUPPORT APPARATUS AND DESIGN SUPPORT METHOD 有权
标题翻译：支持设备和设计支持方法
公开(公告)号：US20110078646A1
公开(公告)日：2011-03-31
申请号：US12892481
申请日：2010-09-28
申请人： Kenichi Ushiyama , Shigenori Ichinose , Kenji Suzuki , Kenji Kumagai , Takafumi Miyahara , Shuji Tanahashi , Hideto Fukuda
发明人： Kenichi Ushiyama , Shigenori Ichinose , Kenji Suzuki , Kenji Kumagai , Takafumi Miyahara , Shuji Tanahashi , Hideto Fukuda
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A design support method executed by a computer includes: detecting a layout position of a first terminal in a cell as a first layout position from layout data including a cell of a macro which is arranged at a plurality of orientations, the first terminal being arranged at a first orientation; calculating a second layout position of a first terminal which is arranged at a second orientation which is different from the first orientation based on a variation from the first orientation to the second orientation and the first layout position; associating the second layout position with the first layout position and the layout data; and outputting an association result.
摘要翻译：由计算机执行的设计支持方法包括：从包括布置在多个方向上的宏单元的布局数据中检测单元中的第一终端的布局位置作为第一布局位置，所述第一终端布置在第一个方向; 基于从所述第一取向到所述第二取向和所述第一布局位置的变化，计算布置在与所述第一取向不同的第二取向的第一端子的第二布局位置; 将第二布局位置与第一布局位置和布局数据相关联; 并输出关联结果。

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