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1. 发明授权

US06335873B1 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US06335873B1
公开(公告)日：2002-01-01
申请号：US09525226
申请日：2000-03-14
申请人： Masaki Kawaguchi , Takeo Fujii , Yoshinori Matsui , Hiroshi Furuta , Seiichi Hannai
发明人： Masaki Kawaguchi , Takeo Fujii , Yoshinori Matsui , Hiroshi Furuta , Seiichi Hannai
IPC分类号： G11C506
CPC分类号： G11C11/005 , G11C11/4125
摘要： A semiconductor integrated circuit device is configured using a DRAM and an SRAM between which data transfer is performed by way of a data transfer circuit using data transfer bus lines. Herein, the DRAM is divided into at least two DRAM arrays, each of which contains a number of columns each consisting of memory cells. In addition, the columns are arranged in mixture in connection with external I/O terminals respectively in such a way that columns respectively containing memory cells which are simultaneously subjected to read operations within a same cycle are arranged not to adjoin each other. Thus, it is possible to reduce a probability in which multiple memory cells which are simultaneously subjected to read operations within the same cycle exist within a range of an area under influence of charged particles, which are produced locally due to neutrons. Even if data of memory cells which are concentrated at a certain region are simultaneously placed under influence of the charged particles, it is possible to remarkably reduce a number of chances in that multiple bits of data being read out to the external I/O terminals go defective simultaneously.
摘要翻译：半导体集成电路器件使用DRAM和SRAM，其间通过使用数据传输总线的数据传输电路进行数据传输。这里，DRAM被划分为至少两个DRAM阵列，每个DRAM阵列包含多个列，每列由存储器单元组成。此外，这些列分别与外部I / O端子混合地排列，使得分别包含在相同周期内同时进行读取操作的存储单元的列彼此不相邻地布置。因此，可以降低在相同周期内同时进行读取操作的多个存储单元在由于中子而局部产生的带电粒子的影响范围内的可能性。即使集中在特定区域的存储单元的数据同时被放置在带电粒子的影响下，也可以显着地减少读出到外部I / O端子的多个数据位移动的次数同时发生故障。

2. 发明申请

US20130208654A1 COMMUNICATION DEVICE, COMMUNICATION METHOD AND COMMUNICATION SYSTEM 有权
标题翻译：通信设备，通信方法和通信系统
公开(公告)号：US20130208654A1
公开(公告)日：2013-08-15
申请号：US13880570
申请日：2011-10-18
申请人： Takeo Fujii , Kensuke Fujii
发明人： Takeo Fujii , Kensuke Fujii
IPC分类号： H04W16/26
CPC分类号： H04W16/26 , H04B7/026 , H04B7/0452 , H04B7/0617 , H04B7/0865 , H04B7/15528
摘要： A communication device, a communication method and a communication system that enable an increase in channel capacity at cell edges of a plurality of cells. Data transmission is implemented by transmission stations, which are base stations of adjacent cells, by MIMO transmission. A relay station receives radio waves that are transmitted by both the transmission station and the transmission station, and acquires data transmitted by the transmission station and data transmitted by the transmission station. The relay station transmits data to reception stations in adjacent cells according to multi-user MIMO transmission. The data transmitted by the transmission station is received by the reception station via the relay station, and the data transmitted by the transmission station is received by the reception station via the relay station. The present invention can be used in cellular systems.
摘要翻译：一种通信装置，通信方法和通信系统，其能够增加多个小区的小区边缘处的信道容量。数据传输由作为相邻小区的基站的传输站通过MIMO传输来实现。中继站接收由发送站和发送站发送的无线电波，并且获取由发送站发送的数据和由发送站发送的数据。中继站根据多用户MIMO传输向相邻小区中的接收站发送数据。由发送站发送的数据经由中继站由接收站接收，由发送站发送的数据经由中继站被接收站接收。本发明可以用于蜂窝系统中。

3. 发明授权

US5936283A MOSFET for input/output protective circuit having a multi-layered contact structure with multiple contact holes on a single diffusion layer 失效
标题翻译：用于输入/输出保护电路的MOSFET具有在单个扩散层上具有多个接触孔的多层接触结构
公开(公告)号：US5936283A
公开(公告)日：1999-08-10
申请号：US906336
申请日：1997-08-05
申请人： Kaoru Narita , Takeo Fujii
发明人： Kaoru Narita , Takeo Fujii
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/768 , H01L21/822 , H01L21/8234 , H01L23/62 , H01L27/02 , H01L27/04 , H01L27/088 , H01L29/417 , H01L29/45 , H01L29/78 , H01L23/48
CPC分类号： H01L29/456 , H01L21/32053 , H01L23/62 , H01L27/0266 , H01L27/0288 , H01L29/41725 , H01L2924/0002
摘要： According to the present invention, a MOSFET for an input/output protective circuit in which a source diffusion layer, a drain diffusion layer and a gate electrode are formed on a semiconductor substrate comprises a high melting point metal silicide layer disposed on the drain diffusion layer through a first insulating film, a metal wire layer disposed on the high melting point metal silicide layer through a second insulating film, at least two first contact holes for electrically connecting the high melting point metal silicide layer and the metal wire layer, and a second contact hole for electrically connecting the high melting point metal silicide layer and the drain diffusion layer, wherein the second contact hole is disposed at a substantial center between the two first contact holes.
摘要翻译：根据本发明，用于输入/输出保护电路的MOSFET，其中在半导体衬底上形成源极扩散层，漏极扩散层和栅极电极包括设置在漏极扩散层上的高熔点金属硅化物层通过第一绝缘膜，通过第二绝缘膜设置在高熔点金属硅化物层上的金属线层，用于电连接高熔点金属硅化物层和金属线层的至少两个第一接触孔，以及第二绝缘膜接触孔，用于电连接高熔点金属硅化物层和漏极扩散层，其中第二接触孔设置在两个第一接触孔之间的实质中心处。

4. 发明授权

US5138578A Semiconductor memory circuit having an improved restoring scheme 失效
标题翻译：半导体存储器电路具有改进的恢复方案
公开(公告)号：US5138578A
公开(公告)日：1992-08-11
申请号：US735780
申请日：1991-07-29
申请人： Takeo Fujii
发明人： Takeo Fujii
IPC分类号： G11C11/409 , G11C11/4094 , G11C11/4097
CPC分类号： G11C11/4094 , G11C11/4097
摘要： A dynamic memory circuit which can operate at a high speed and with a reduced amount of current noise is disclosed. The memory circuit includes dynamic type memory cells which necessitate restoring operation for rewritting read out data thereto, a read circuit for performing a read out operation in response to an active level of an externally supplied control signal and a restore circuit for performing the restoring operation in response to change of the externally supplied control signal to its inactive level.
摘要翻译：公开了一种动态存储电路，其可以高速运行并且具有减少的电流噪声。存储电路包括需要恢复读取数据的操作的动态型存储单元，用于响应外部提供的控制信号的有效电平执行读出操作的读取电路和用于执行恢复操作的恢复电路响应外部提供的控制信号变为其无效电平。

5. 发明授权

US09282468B2 Communication device, communication method and communication system 有权
标题翻译：通信设备，通信方式和通信系统
公开(公告)号：US09282468B2
公开(公告)日：2016-03-08
申请号：US13880570
申请日：2011-10-18
申请人： Takeo Fujii , Kensuke Fujii
发明人： Takeo Fujii , Kensuke Fujii
IPC分类号： H04W16/26 , H04B7/02 , H04B7/155 , H04B7/06 , H04B7/08 , H04B7/04
CPC分类号： H04W16/26 , H04B7/026 , H04B7/0452 , H04B7/0617 , H04B7/0865 , H04B7/15528
摘要： A communication device, a communication method and a communication system that enable an increase in channel capacity at cell edges of a plurality of cells. Data transmission is implemented by transmission stations, which are base stations of adjacent cells, by MIMO transmission. A relay station receives radio waves that are transmitted by both the transmission station and the transmission station, and acquires data transmitted by the transmission station and data transmitted by the transmission station. The relay station transmits data to reception stations in adjacent cells according to multi-user MIMO transmission. The data transmitted by the transmission station is received by the reception station via the relay station, and the data transmitted by the transmission station is received by the reception station via the relay station. The present invention can be used in cellular systems.
摘要翻译：一种通信装置，通信方法和通信系统，其能够增加多个小区的小区边缘处的信道容量。数据传输由作为相邻小区的基站的传输站通过MIMO传输来实现。中继站接收由发送站和发送站发送的无线电波，并且获取由发送站发送的数据和由发送站发送的数据。中继站根据多用户MIMO传输向相邻小区中的接收站发送数据。由发送站发送的数据经由中继站由接收站接收，由发送站发送的数据经由中继站被接收站接收。本发明可以用于蜂窝系统中。

6. 发明授权

US08472378B2 Communication system, radio communication method, and radio apparatus 有权
标题翻译：通信系统，无线电通信方法和无线电设备
公开(公告)号：US08472378B2
公开(公告)日：2013-06-25
申请号：US12808975
申请日：2008-12-12
申请人： Masayuki Ariyoshi , Kazushi Muraoka , Takeo Fujii
发明人： Masayuki Ariyoshi , Kazushi Muraoka , Takeo Fujii
IPC分类号： H04W4/00
CPC分类号： H04W16/14 , H04W24/10
摘要： After checking a status of frequency band usage of a primary system by preliminary sensing, a master node transmits to slave nodes a sensing request containing a target frequency band for cooperative sensing. The slave nodes perform spectrum sensing according to specified parameters and send, as responses, results thereof to the master node. The master node collectively receives these results, comprehensively determines the sensing results of the slave nodes, and makes a final determination on whether or not the target frequency band is available.
摘要翻译：在通过初步感测检查主系统的频带使用状态之后，主节点向从节点发送包含用于协作感测的目标频带的感测请求。从节点根据指定的参数执行频谱感测，并将其结果作为响应发送到主节点。主节点共同接收这些结果，全面确定从节点的感测结果，并对目标频带是否可用进行最终确定。

7. 发明授权

US06367912B1 Ink jet recording apparatus 失效
标题翻译：喷墨记录装置
公开(公告)号：US06367912B1
公开(公告)日：2002-04-09
申请号：US09177081
申请日：1998-10-23
申请人： Mitsuru Kishimoto , Hideyuki Kobayashi , Noboru Ooishi , Kiyoshi Ikeda , Takeo Fujii , Hiroyuki Ueki , Masahiko Shimosugi , Shigenori Koido
发明人： Mitsuru Kishimoto , Hideyuki Kobayashi , Noboru Ooishi , Kiyoshi Ikeda , Takeo Fujii , Hiroyuki Ueki , Masahiko Shimosugi , Shigenori Koido
IPC分类号： B41J221
CPC分类号： B41J2/145 , B41J2/2103 , B41J2/2121
摘要： An ink jet recording apparatus is provided with a black head and a plurality of color heads. The black head has a predetermined number of first orifices aligned at predetermined intervals (e.g. 0.0169 mm) in a sub scanning direction (direction in which a print medium travels). The plurality of color heads eject different colored ink drops. Each color head has the predetermined number of second orifices aligned in the sub scanning direction perpendicular to the main scanning direction. The second orifices of adjacent color heads are aligned in a main scanning direction perpendicular to the sub scanning direction.
摘要翻译：喷墨记录装置具有黑色头和多个彩色头。黑色头具有在副扫描方向（打印介质行进的方向）上以预定间隔（例如0.0169mm）排列的预定数量的第一孔。多个彩色头喷射不同颜色的墨滴。每个彩色头具有在垂直于主扫描方向的副扫描方向上排列的预定数量的第二孔。相邻彩色头的第二孔在垂直于副扫描方向的主扫描方向上排列。

8. 发明授权

US06191633B1 Semiconductor integrated circuit with protection circuit against electrostatic discharge 有权
标题翻译：具有防静电放电保护电路的半导体集成电路
公开(公告)号：US06191633B1
公开(公告)日：2001-02-20
申请号：US09149115
申请日：1998-09-09
申请人： Takeo Fujii , Kaoru Narita , Yoko Horiguchi
发明人： Takeo Fujii , Kaoru Narita , Yoko Horiguchi
IPC分类号： H03K508
CPC分类号： H03K5/08 , H01L27/0251 , H01L27/0255 , H01L27/0288 , H01L2924/0002 , H01L2924/00
摘要： A Semiconductor integrated circuit with a protection circuit against electrostatic discharge. A clamping element is connected with MIS transistor to prevent the breakdown under the charged device model. A parasitic bipolar transistor, a MOS transistor or MIS transistor whose gate is composed of an insulating film thicker than that of the transfer gate, can be used as the clamping element.
摘要翻译：一个具有防静电放电保护电路的半导体集成电路。夹紧元件与MIS晶体管连接，以防止充电器件型号下的击穿。可以使用寄生双极晶体管，MOS晶体管或MIS晶体管，其栅极由比传输栅极厚的绝缘膜构成，可用作夹紧元件。

9. 发明授权

US5049604A Process for producing piperidine derivative and stabilized resin composition containing said derivative 失效
标题翻译：制备含有所述衍生物的哌啶衍生物和稳定化树脂组合物的方法
公开(公告)号：US5049604A
公开(公告)日：1991-09-17
申请号：US600160
申请日：1990-10-19
申请人： Takeo Fujii , Tamaki Ishii , Shinichi Yachigo , Tatsuo Kaneoya , Yukoh Takahashi , Yuzo Maegawa , Haruki Okamura , Eizo Okino
发明人： Takeo Fujii , Tamaki Ishii , Shinichi Yachigo , Tatsuo Kaneoya , Yukoh Takahashi , Yuzo Maegawa , Haruki Okamura , Eizo Okino
IPC分类号： C07D211/58 , C08K5/13 , C08K5/3435 , C08K5/375
CPC分类号： C08K5/13 , C07D211/58 , C08K5/3435 , C08K5/375
摘要： A stabilized resin composition comprising a resin, a piperidine derivative represented by the formula (III) ##STR1## wherein R.sub.1 is a hydrogen atom or an alkyl group having 1 to 3 carbom atoms; R.sub.2 is a hydrogen atom or an alkyl group having from 1 to 2 carbon atoms; and R.sub.3 and R.sub.4 are each independently an alkyl group having 1 to 12 carbon atoms, a phenol-type antioxidant and a sulfur-containing antioxidant. The composition simultaneously meets heat resistance, oxidation resistance and light resistance requirements.
摘要翻译：一种稳定的树脂组合物，其包含树脂，由式（III）表示的哌啶衍生物（III），其中R 1是氢原子或具有1至3个碳原子的烷基; R2是氢原子或具有1至2个碳原子的烷基; R 3和R 4各自独立地为具有1〜12个碳原子的烷基，酚型抗氧化剂和含硫抗氧化剂。该组合物同时满足耐热性，抗氧化性和耐光性要求。

10. 发明授权

US4741636A Dot drive circuit of wire dot type printer 失效
标题翻译：点式打印机的点驱动电路
公开(公告)号：US4741636A
公开(公告)日：1988-05-03
申请号：US927711
申请日：1986-11-07
申请人： Yoshinori Takahashi , Kohtaroh Yoshimura , Takeo Fujii
发明人： Yoshinori Takahashi , Kohtaroh Yoshimura , Takeo Fujii
IPC分类号： B41J2/225 , B41J2/27 , B41J2/30 , B41J9/38
CPC分类号： B41J2/30
摘要： A dot drive circuit for a wire dot type printer including dot pins of a print head different in gaps with respect to a platen sets dot drive time intervals for each dot pin or for each dot pin group in accordance with the size of the gap.
摘要翻译：一种点阵式打印机的点驱动电路，包括相对于压板的间隙不同的打印头的点针，根据间隙的大小设定每个点针或每个点针组的点驱动时间间隔。

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