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1. 发明授权

US06780549B2 Photo-or heat-curable resin composition and multilayer printed wiring board 失效
标题翻译：光固化或热固化树脂组合物和多层印刷线路板
公开(公告)号：US06780549B2
公开(公告)日：2004-08-24
申请号：US09933946
申请日：2001-08-22
申请人： Masahiko Takeuchi , Kazuhiko Mizuuchi , Hironobu Kawasato
发明人： Masahiko Takeuchi , Kazuhiko Mizuuchi , Hironobu Kawasato
IPC分类号： G03F7075
CPC分类号： G03F7/0388 , G03F7/0047 , G03F7/038 , H05K3/0023 , H05K3/4676 , H05K2201/0209
摘要： This invention relates to a photo- or heat-curable resin composition which yields a cured product with minimal cracking and high reliability. The resin composition of this invention comprises 100 parts by weight of the resin-forming component containing a photo- or heat-polymerizable unsaturated compound and 0.01-5 parts by weight of an inorganic filler such as silica sol with its average particle diameter controlled in the range 5 nm-0.5 &mgr;m. The composition exhibits high heat resistance and good microfabrication quality and is useful as a peripheral material of electronic parts such as semiconductor devices by the build-up process, for example, as a material for forming insulation layers in multilayer printed wiring boards.
摘要翻译：本发明涉及光固化或热固化树脂组合物，其产生具有最小破裂和高可靠性的固化产物。本发明的树脂组合物包含100重量份含有光或热可聚合不饱和化合物的树脂形成组分和0.01-5重量份无机填料如二氧化硅溶胶，其平均粒径控制在范围5nm-0.5μm。该组合物表现出高的耐热性和良好的微细加工质量，并且作为用于在多层印刷线路板中形成绝缘层的材料的构建方法的半导体器件等电子部件的周边材料是有用的。

2. 发明授权

US06770421B2 Photo- or heat-curable resin composition and multilayer printed wiring board 失效
标题翻译：光固化或热固化树脂组合物和多层印刷线路板
公开(公告)号：US06770421B2
公开(公告)日：2004-08-03
申请号：US09996938
申请日：2001-11-30
申请人： Masahiko Takeuchi , Kazuhiko Mizuuchi , Hironobu Kawasato
发明人： Masahiko Takeuchi , Kazuhiko Mizuuchi , Hironobu Kawasato
IPC分类号： G03F7027
CPC分类号： C08G59/4292 , G03F7/027 , G03F7/038 , H05K1/0326 , H05K3/287 , H05K3/4644 , Y10T428/24917 , Y10T428/31515
摘要： This invention relates to a photo- or heat-curable resin composition which yields a cured product with minimal cracking and high reliability. The resin composition of this invention comprises 100 parts by weight of (A) photo- or heat-polymerizable unsaturated compound composed of a polycarboxylic acid adduct of bisphenol-epoxy (meth)acrylate, 10-100 parts by weight of (B) alkylene oxide-modified product of (meth)acrylate or oligomers thereof, 0-50 parts by weight of (C) compound containing epoxy group and 0-50 parts by weight of (D) photopolymerization initiator or sensitizer. The composition exhibits high heat resistance and good microfabrication quality and is useful as a peripheral material of electronic parts such as semiconductor devices by the build-up process, for example, as a material for forming insulation layers in multilayer printed wiring boards.
摘要翻译：本发明涉及光固化或热固化树脂组合物，其产生具有最小破裂和高可靠性的固化产物。本发明的树脂组合物包含100重量份由双酚环氧（甲基）丙烯酸酯的多元羧酸加合物，10-100重量份（B）环氧烷烃（甲基）丙烯酸酯或其低聚物的改性产物，0-50重量份的（C）含环氧基的化合物和0-50重量份的（D）光聚合引发剂或敏化剂。该组合物表现出高的耐热性和良好的微细加工质量，并且作为用于在多层印刷线路板中形成绝缘层的材料的构建方法的半导体器件等电子部件的周边材料是有用的。

3. 发明申请

US20080057299A1 Laminate for wiring board 审中-公开
标题翻译：接线板层压板
公开(公告)号：US20080057299A1
公开(公告)日：2008-03-06
申请号：US11891630
申请日：2007-08-10
申请人： Yasuhiro Adachi , Hironori Nagaoka , Hongyuan Wang , Naoko Osawa , Masahiko Takeuchi , Hironobu Kawasato
发明人： Yasuhiro Adachi , Hironori Nagaoka , Hongyuan Wang , Naoko Osawa , Masahiko Takeuchi , Hironobu Kawasato
IPC分类号： B32B15/08 , B32B27/06
CPC分类号： H05K1/0346 , C08G73/1042 , H05K1/036 , H05K2201/0154 , Y10T428/264 , Y10T428/31681
摘要： The present invention aims to provide a polyimide resin excellent in heat resistance, dimensional stability, and toughness as an insulating layer, and to obtain a laminate suitable for a flexible wiring board by using the polyimide resin, the laminate being excellent in resistance to rupture and flexibility even when the thickness of a polyimide resin layer is small. Provided is a laminate for a wiring board having a metal layer on at least one surface of a polyimide resin layer, in which a polyimide resin layer (A) obtained by imidating a polyimide precursor resin having a weight average molecular weight of 150,000 to 800,000 is a main polyimide resin layer, and a polyimide resin of which the main polyimide resin layer is constituted has structural units represented by the following general formulae (1) and (2) where R represents a lower alkyl group, a phenyl group, or a halogen atom, and Ar1 represents a residue of bis(aminophenoxy)benzene or bis(aminophenoxy)naphthalene.
摘要翻译：本发明旨在提供一种作为绝缘层的耐热性，尺寸稳定性和韧性优异的聚酰亚胺树脂，并且通过使用聚酰亚胺树脂获得适用于柔性布线板的层压体，该层压板具有优异的抗断裂性和即使当聚酰亚胺树脂层的厚度小时也是灵活的。本发明提供一种在聚酰亚胺树脂层的至少一个表面上具有金属层的布线基板的叠层体，其中通过酰亚胺化重均分子量为150,000〜800,000的聚酰亚胺前体树脂得到的聚酰亚胺树脂层（A）为主要聚酰亚胺树脂层和主要聚酰亚胺树脂层构成的聚酰亚胺树脂具有由以下通式（1）和（2）表示的结构单元，其中R表示低级烷基，苯基或卤素原子和Ar 1表示双（氨基苯氧基）苯或双（氨基苯氧基）萘的残基。

4. 发明授权

US08551908B2 Exhaust gas purification catalyst 有权
标题翻译：废气净化催化剂
公开(公告)号：US08551908B2
公开(公告)日：2013-10-08
申请号：US13001683
申请日：2009-06-26
申请人： Akemi Satou , Masahiko Takeuchi , Keizo Hiraku , Yusuke Kawamura , Takahiro Fujiwara , Tadashi Suzuki , Naoki Takahashi
发明人： Akemi Satou , Masahiko Takeuchi , Keizo Hiraku , Yusuke Kawamura , Takahiro Fujiwara , Tadashi Suzuki , Naoki Takahashi
IPC分类号： B01J23/00 , B01J21/00
CPC分类号： B01J23/002 , B01D53/945 , B01D2255/1021 , B01D2255/1023 , B01D2255/1025 , B01D2255/206 , B01D2255/20715 , B01D2255/9022 , B01D2255/908 , B01D2257/304 , B01J23/63 , B01J23/83 , B01J23/894 , B01J35/04 , B01J37/0244 , B01J2523/00 , Y02T10/22 , B01J2523/3712 , B01J2523/3718 , B01J2523/48 , B01J2523/828 , B01J2523/824 , B01J2523/822
摘要： An exhaust gas purification catalyst includes: a lower catalyst layer that contains a ceria-zirconia mixed oxide having 50 to 70 mass % of CeO2 and 5 mass % or more of Pr2O3 and carries at least one of Pt and Pd; and an upper catalyst layer that contains at least zirconia and carries at least Rh, wherein the total amount of CeO2 per liter of the carrier base is 15 to 30 g. Because the amount of CeO2 is small, formation of H2S is suppressed and a high capability of adsorbing and releasing oxygen is brought out in spite of the small amount of CeO2.
摘要翻译：废气净化催化剂包括：含有氧化铈 - 氧化锆混合氧化物的下部催化剂层，其具有50〜70质量％的CeO 2和5质量％以上的Pr 2 O 3，并携带Pt和Pd中的至少一种; 和至少含有氧化锆并至少含有Rh的上部催化剂层，其中每升载体碱的CeO 2的总量为15〜30g。由于CeO 2的量少，因此抑制了H 2 S的形成，并且尽管CeO 2的量少，但是吸附和释放氧的能力也很高。

5. 发明授权

US06849957B2 Photomask including auxiliary mark area, semiconductor device and manufacturing method thereof 有权
标题翻译：包括辅助标记区域的光掩模，半导体器件及其制造方法
公开(公告)号：US06849957B2
公开(公告)日：2005-02-01
申请号：US09725853
申请日：2000-11-30
申请人： Masahiko Takeuchi , Koichiro Narimatsu , Atsushi Ueno
发明人： Masahiko Takeuchi , Koichiro Narimatsu , Atsushi Ueno
IPC分类号： H01L21/66 , G03F9/00 , H01L21/027 , H01L21/822 , H01L23/544 , H01L27/04
CPC分类号： G03F9/7084 , G03F1/42 , G03F9/7076 , H01L23/544 , H01L2223/54406 , H01L2223/5442 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device enabling precise and accurate measurement of an inspection mark in a simple manner is obtained. The semiconductor device includes a device forming area and a dicing line area arranged to surround the device forming area on a semiconductor substrate. In the dicing line area, first and second registration marks formed in different shots are provided, and the first and second registration marks include auxiliary marks for identifying the first and second registration marks.
摘要翻译：获得能够以简单的方式精确而准确地测量检查标记的半导体器件。半导体器件包括设置成围绕半导体衬底上的器件形成区域的器件形成区域和切割线区域。在切割线区域中，设置以不同镜头形成的第一和第二对准标记，并且第一和第二对准标记包括用于识别第一和第二对准标记的辅助标记。

6. 发明授权

US06521933B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06521933B2
公开(公告)日：2003-02-18
申请号：US09725852
申请日：2000-11-30
申请人： Takashi Miyajima , Masahiko Takeuchi
发明人： Takashi Miyajima , Masahiko Takeuchi
IPC分类号： H01L27108
CPC分类号： H01L27/10894 , H01L27/10852
摘要： In the drawn-out interconnection structure of the present invention, a storage node (SN) groove extending from a region, and a groove-shape drawn-out electrode is formed on the inner wall of storage node (SN) groove. An extended pad electrode portion extending from groove-shape drawn-out electrode is provided above storage node (SN) groove. Also provided is a contact plug that penetrates through extended pad electrode portion and that connects aluminum interconnection and extended pad electrode portion in a layer above extended pad electrode portion. With this arrangement, the structure of an interconnection drawn from an electrode of a semiconductor device can be obtained which allows the production of a cell transistor TEG capable of performing a reliable and stable measurement of the cell transistor characteristics.
摘要翻译：在本发明的拉出互连结构中，在存储节点（SN）槽的内壁上形成有从区域延伸的存储节点（SN）槽和槽形引出电极。从槽形拉出电极延伸的延伸焊盘电极部分设置在存储节点（SN）槽的上方。还提供一种接触插塞，其穿过延伸的焊盘电极部分并且将铝互连和延伸焊盘电极部分连接在延伸的焊盘电极部分上方的层中。通过这种布置，可以获得从半导体器件的电极拉出的互连结构，其允许制造能够执行电池晶体管特性的可靠和稳定测量的电池晶体管TEG。

7. 发明授权

US07363858B2 Printing apparatus with plate feeding mechanism having transport rollers 失效
标题翻译：具有送纸机构的印刷装置具有输送辊
公开(公告)号：US07363858B2
公开(公告)日：2008-04-29
申请号：US11079337
申请日：2005-03-15
申请人： Kenji Edamitsu , Masahiko Takeuchi
发明人： Kenji Edamitsu , Masahiko Takeuchi
IPC分类号： B41F27/12
CPC分类号： B41F27/1206 , B41P2227/62
摘要： A printing apparatus includes a printing plate feeder for feeding printing plates to a first plate cylinder. The printing plate feeder has a pair of transport rollers acting as a leveling roller and a driven roller. The leveling roller is fixed to a leveling roller rotary shaft extending parallel to a rotational axis of the first plate cylinder, and is opposed to middle and opposite end regions of the first plate cylinder. The leveling roller rotary shaft is connected to a driving device, a one-way clutch for permitting rotation only in a transport direction of the printing plates, and a torque transmission clutch acting as a loading device for applying a load to rotation in a direction opposite to the transport direction of the printing plates.
摘要翻译：印刷装置包括用于将印版供给到第一印版滚筒的印版进给器。印版进纸器具有一对作为调平辊和从动辊的输送辊。调平辊被固定到平行于第一印版滚筒的旋转轴线延伸的调平辊旋转轴，并与第一印版滚筒的中间和相对端区相对。调平辊旋转轴连接到驱动装置，单向离合器仅允许在印版的传送方向上旋转;以及扭矩传递离合器，用作加载装置，用于沿相反方向旋转载荷到印版的传送方向。

8. 发明授权

US06924192B2 Semiconductor device manufacturing method and semiconductor device 有权
公开(公告)号：US06924192B2
公开(公告)日：2005-08-02
申请号：US10697316
申请日：2003-10-31
申请人： Masahiko Takeuchi
发明人： Masahiko Takeuchi
IPC分类号： H01L23/522 , H01L21/02 , H01L21/768 , H01L21/8242 , H01L21/8247 , H01L27/04 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L28/65 , H01L21/7687 , H01L21/76877 , H01L27/105 , H01L27/10811 , H01L27/10852 , H01L27/10885 , H01L27/10888 , H01L27/10894 , H01L27/10897 , H01L28/91
摘要： A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation is performed during formation of dielectric films of capacitors. Conductive barrier layers (82) are provided in the top ends of contact plugs (83b) electrically connected to ones of source/drain regions (59). Lower electrodes (70) of capacitors (73) are formed in contact with the conductive barrier layers (82) of the contact plugs (83b) and then dielectric films (71) and upper electrodes (72) of the capacitors (73) are sequentially formed. In the logic region, contact plugs (25) are formed in an upper layer so that they are in contact respectively with contact plugs (33) electrically connected to source/drain regions (9).

9. 发明授权

US06765256B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06765256B2
公开(公告)日：2004-07-20
申请号：US10370657
申请日：2003-02-24
申请人： Masahiko Takeuchi , Takashi Dokan
发明人： Masahiko Takeuchi , Takashi Dokan
IPC分类号： H01L27108
CPC分类号： H01L27/10894 , H01L27/10814 , H01L27/10882
摘要： A semiconductor device includes: lower storage node electrodes provided on a main surface of a silicon substrate; a dielectric film provided on the lower storage node electrodes; an upper cell plate electrode provided on the dielectric film; and an interlayer insulating film covering the upper cell plate electrode. The upper cell plate electrode contains ruthenium. The interlayer insulating film has a contact hole reaching the upper cell plate electrode. The contact hole is provided so that the distance between the main surface of the silicon substrate and the bottom face of the contact hole is not less than the distance between the main surface of the silicon substrate and the bottom face of the upper cell plate electrode. A semiconductor device is provided wherein contact defects in the upper electrode and the generation of an area penalty are prevented.
摘要翻译：半导体器件包括：设置在硅衬底的主表面上的下部存储节点电极; 设置在下部存储节点电极上的电介质膜; 设置在电介质膜上的上电池板电极; 以及覆盖上电池板电极的层间绝缘膜。上电池板电极含有钌。层间绝缘膜具有到达上电池板电极的接触孔。接触孔设置成使得硅衬底的主表面和接触孔的底面之间的距离不小于硅衬底的主表面和上电池板电极的底面之间的距离。提供一种半导体器件，其中防止上电极中的接触缺陷和产生区域损失。

10. 发明授权

US5763921A Semiconductor device including retrograde well structure with suppressed substrate bias effects 失效
标题翻译：包括具有抑制衬底偏置效应的逆行井结构的半导体器件
公开(公告)号：US5763921A
公开(公告)日：1998-06-09
申请号：US645700
申请日：1996-05-14
申请人： Yoshinori Okumura , Masahiko Takeuchi , Hideaki Arima
发明人： Yoshinori Okumura , Masahiko Takeuchi , Hideaki Arima
IPC分类号： H01L21/76 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L27/0928 , H01L21/823807
摘要： An n well and a p well are formed in a silicon substrate. The n well has n type impurity concentration peaks and a p type impurity concentration peak. The p well has p type concentration peaks. The impurity concentration peaks serving as channel stopper regions for isolating elements exist only in proximity to the lower surface of an isolation oxide film but not in element regions.
摘要翻译：在硅衬底中形成n阱和p阱。 n阱具有n型杂质浓度峰和p型杂质浓度峰。 p阱具有p型浓度峰。作为用于隔离元件的通道阻挡区域的杂质浓度峰值仅存在于隔离氧化膜的下表面附近，而不存在于元件区域中。

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