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1. 发明授权

US08254175B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08254175B2
公开(公告)日：2012-08-28
申请号：US12638836
申请日：2009-12-15
申请人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
发明人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
IPC分类号： G11C11/34
CPC分类号： H01L21/28282
摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
摘要翻译：半导体器件包括半导体区域，形成在半导体区域上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，形成在电荷存储绝缘膜上的块绝缘膜和形成的控制栅电极在所述块绝缘膜上，其中所述隧道绝缘膜包括形成在所述半导体区域的表面上并且包含硅和氧的第一区域，包含硅和氮的第二区域，形成在所述第二区域的背面的电荷存储绝缘膜并且包含硅和氧，以及至少形成在第一区域和第二区域之间或者在第二区域和第三区域之间形成的绝缘区域，并且包含硅和氮和氧，并且第二区域形成在第一区域和第三区域之间。

2. 发明申请

US20100157680A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100157680A1
公开(公告)日：2010-06-24
申请号：US12638836
申请日：2009-12-15
申请人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
发明人： Masaaki Higuchi , Hiroshi Matsuba , Yoshio Ozawa , Tetsuya Kai
IPC分类号： G11C16/04 , H01L29/792 , H01L21/28 , G11C11/34
CPC分类号： H01L21/28282
摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
摘要翻译：半导体器件包括半导体区域，形成在半导体区域上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，形成在电荷存储绝缘膜上的块绝缘膜和形成的控制栅电极在所述块绝缘膜上，其中所述隧道绝缘膜包括形成在所述半导体区域的表面上并且包含硅和氧的第一区域，包含硅和氮的第二区域，形成在所述第二区域的背面的电荷存储绝缘膜并且包含硅和氧，以及至少形成在第一区域和第二区域之间或者在第二区域和第三区域之间形成的绝缘区域，并且包含硅和氮和氧，并且第二区域形成在第一区域和第三区域之间。

3. 发明授权

US08829593B2 Semiconductor memory device having three-dimensionally arranged memory cells, and manufacturing method thereof 有权
标题翻译：具有三维布置的存储单元的半导体存储器件及其制造方法
公开(公告)号：US08829593B2
公开(公告)日：2014-09-09
申请号：US12726952
申请日：2010-03-18
申请人： Katsuyuki Sekine , Kensuke Takano , Masaaki Higuchi , Tetsuya Kai , Yoshio Ozawa
发明人： Katsuyuki Sekine , Kensuke Takano , Masaaki Higuchi , Tetsuya Kai , Yoshio Ozawa
IPC分类号： H01L29/792 , H01L21/336 , H01L29/423 , H01L27/115 , H01L29/788
CPC分类号： H01L27/11578 , H01L27/11551 , H01L27/11556 , H01L27/11582 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L29/7926
摘要： A first select transistor is formed on a semiconductor substrate. Memory cell transistors are stacked on the first select transistor and connected in series. A second select transistor is formed on the memory cell transistors. The memory cell transistors include a tapered semiconductor pillar which increases in diameter from the first select transistor toward the second select transistor, a tunnel dielectric film formed on the side surface of the semiconductor pillar, a charge storage layer which is formed on the side surface of the tunnel dielectric film and which increases in charge trap density from the first select transistor side toward the second select transistor side, a block dielectric film formed on the side surface of the charge storage layer, and conductor films which are formed on the side surface of the block dielectric film and which serve as gate electrodes.
摘要翻译：第一选择晶体管形成在半导体衬底上。存储单元晶体管堆叠在第一选择晶体管上并串联连接。在存储单元晶体管上形成第二选择晶体管。存储单元晶体管包括从第一选择晶体管朝向第二选择晶体管的直径增加的锥形半导体柱，形成在半导体柱的侧表面上的隧道电介质膜，形成在半导体柱的侧表面上的电荷存储层隧道电介质膜，并且其从第一选择晶体管侧朝向第二选择晶体管侧的电荷陷阱密度增加，形成在电荷存储层的侧表面上的块状电介质膜和形成在电荷存储层的侧表面上的导体膜该块介质膜并用作栅电极。

4. 发明授权

US08759901B2 Nonvolatile semiconductor memory device including a charge storage layer and semiconductor region in a groove 有权
标题翻译：非易失性半导体存储器件，其包括电荷存储层和凹槽中的半导体区域
公开(公告)号：US08759901B2
公开(公告)日：2014-06-24
申请号：US12855212
申请日：2010-08-12
申请人： Masaaki Higuchi , Yoshio Ozawa , Katsuyuki Sekine , Ryota Fujitsuka
发明人： Masaaki Higuchi , Yoshio Ozawa , Katsuyuki Sekine , Ryota Fujitsuka
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/4234 , H01L29/513 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device including a semiconductor layer with a main surface, a first insulating layer formed on the main surface of the semiconductor layer, a charge storage layer formed on the first insulating layer, a second insulating layer formed on the charge storage layer, and a control gate electrode formed on the second insulating layer. At least one inelastic scattering film that reduces energy of electrons by scattering is contained in at least one of the charge storage layer and second insulating layer.
摘要翻译：根据一个实施例，一种非易失性半导体存储器件，包括具有主表面的半导体层，形成在半导体层的主表面上的第一绝缘层，形成在第一绝缘层上的电荷存储层，形成在第一绝缘层上的第二绝缘层电荷存储层和形成在第二绝缘层上的控制栅电极。至少一个通过散射减少电子能量的非弹性散射膜被包含在电荷存储层和第二绝缘层中的至少一个中。

5. 发明授权

US08674426B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08674426B2
公开(公告)日：2014-03-18
申请号：US13023025
申请日：2011-02-08
申请人： Masaaki Higuchi , Yoshio Ozawa
发明人： Masaaki Higuchi , Yoshio Ozawa
IPC分类号： H01L29/788
CPC分类号： H01L29/7926 , H01L27/11578 , H01L27/11582 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a stacked body, a semiconductor pillar and a charge storage layer. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. The semiconductor pillar is buried in the stacked body, and extends in a stacking direction of the insulating films and the electrode films. The charge storage layer is provided between the electrode films and the semiconductor pillar. The electrode films are divided into a plurality of control gate electrodes. Each of the plurality of control gate electrodes faces the semiconductor pillar and sandwiches the charge storage layer with the semiconductor pillar.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括堆叠体，半导体柱和电荷存储层。层叠体包括交替层叠有多个电极膜的多个绝缘膜。半导体柱被埋置在层叠体中，并且在绝缘膜和电极膜的层叠方向上延伸。电荷存储层设置在电极膜和半导体柱之间。电极膜被分成多个控制栅电极。多个控制栅极电极中的每一个面对半导体柱并且用半导体柱夹着电荷存储层。

6. 发明申请

US20110073935A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20110073935A1
公开(公告)日：2011-03-31
申请号：US12887114
申请日：2010-09-21
申请人： Akiko SEKIHARA , Tesuya Kai , Masaaki Higuchi , Yoshio Ozawa
发明人： Akiko SEKIHARA , Tesuya Kai , Masaaki Higuchi , Yoshio Ozawa
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L27/11568 , H01L27/11578 , H01L29/40117
摘要： In one embodiment, a non-volatile semiconductor memory device has a semiconductor layer having a pair of source/drain regions formed at a predetermined distance and a channel region between the pair of source/drain regions; a first insulating film formed above the semiconductor layer; a charge accumulating film formed above the first insulating film; a second insulating film formed above the charge accumulating film; and a control gate electrode film formed above the second insulating film. The first insulating film includes a first oxide film, a first silicon nitride film formed above the first oxide film and including Boron, and a second oxide film formed above the first silicon nitride film.
摘要翻译：在一个实施例中，非易失性半导体存储器件具有半导体层，其具有以预定距离形成的一对源极/漏极区域和该一对源极/漏极区域之间的沟道区域; 形成在半导体层上方的第一绝缘膜; 形成在所述第一绝缘膜上方的电荷蓄积膜; 在电荷蓄积膜上形成的第二绝缘膜; 以及形成在第二绝缘膜上方的控制栅极电极膜。第一绝缘膜包括第一氧化物膜，形成在第一氧化物膜上方并包括硼的第一氮化硅膜和形成在第一氮化硅膜上方的第二氧化物膜。

7. 外观设计

USD310348S Engine generator 失效
公开(公告)号：USD310348S
公开(公告)日：1990-09-04
申请号：US110682
申请日：1987-10-20
申请人： Masaaki Higuchi , Masaru Atsuumi , Yasuo Otake , Yukinori Itoh
设计人： Masaaki Higuchi , Masaru Atsuumi , Yasuo Otake , Yukinori Itoh

8. 发明授权

US4327899A Stave cooling device having unwelded double tube 失效
标题翻译：具有未焊接双管的梯形冷却装置
公开(公告)号：US4327899A
公开(公告)日：1982-05-04
申请号：US136755
申请日：1980-04-03
申请人： Gyoichi Suzuki , Teruo Shimotsuma , Masaaki Higuchi , Tsunenori Sugawara , Takeshi Yano
发明人： Gyoichi Suzuki , Teruo Shimotsuma , Masaaki Higuchi , Tsunenori Sugawara , Takeshi Yano
IPC分类号： C21B7/10 , F27B1/24 , F27D1/12 , F27D9/00
CPC分类号： F27D1/12 , C21B7/10 , F27D2009/0048
摘要： A stave cooling device includes a double drawn steel tube cast-mounted in a castable metal main body, and the double tube includes an inner tube which serves as a passage for a coolant. The inner tube of the double tube contains 0.20 to 0.38% of equivalent carbon and an outer tube of the double tube contains 0.15 to 0.25% of equivalent carbon. The outer tube has on its outer surface an alumina coating of 0.08 to 0.25 mm thick, and the main body is formed by casting a spheroidal graphite cast iron. The double tube is cast-mounted in the main body such that the double tube and the main body are not welded together.
摘要翻译：壁式冷却装置包括浇铸在铸造金属主体中的双拉伸钢管，双管包括用作冷却剂通道的内管。双管的内管含有0.20〜0.38％的当量碳，双管的外管含有0.15〜0.25％的当量碳。外管在其外表面上具有0.08至0.25mm厚的氧化铝涂层，并且主体通过铸造球墨铸铁形成。双管铸造安装在主体中，使得双管和主体不被焊接在一起。

9. 发明授权

US4029053A Cooling box for metallurgical furnace 失效
标题翻译：冶金炉冷却箱
公开(公告)号：US4029053A
公开(公告)日：1977-06-14
申请号：US670004
申请日：1976-03-24
申请人： Masaaki Higuchi
发明人： Masaaki Higuchi
IPC分类号： C21B7/10 , F27D1/12 , F27D9/00 , F28D7/06 , F22B37/00
CPC分类号： C21B7/10 , F27D1/12 , F27D2009/0043
摘要： A cooling box for a metallurgical furnace comprising an independent and outermost first cooling water channel turning back in the front end part of the cooling box to form itself into a loop, a second cooling water channel turning back to form itself into a loop along the inner side of said first cooling water channel and a third cooling water channel turning back along the inner side of the second cooling water channel and communicating with the second cooling water channel at one end thereof.
摘要翻译：一种用于冶金炉的冷却箱，包括独立且最外面的第一冷却水通道，该第一冷却水通道在冷却箱的前端部分回转以形成环路，第二冷却水通道转回以沿着内部所述第一冷却水通道的侧面和沿着所述第二冷却水通道的内侧回转的第三冷却水通道，并且在所述第二冷却水通道的一端与所述第二冷却水通道连通。

10. 发明授权

US07873750B2 Server system having I/O interface unit 失效
标题翻译：具有I / O接口单元的服务器系统
公开(公告)号：US07873750B2
公开(公告)日：2011-01-18
申请号：US10853335
申请日：2004-05-26
申请人： Keizo Yabuta , Hidekazu Itsuki , Kazutoshi Abe , Masaaki Higuchi
发明人： Keizo Yabuta , Hidekazu Itsuki , Kazutoshi Abe , Masaaki Higuchi
IPC分类号： G06F15/16
CPC分类号： G06F13/409 , G06F13/4027
摘要： A disclosed server system has a processor blade in which a processor is mounted and an interface unit that is connected to an external device, and a serial interface connects between these units. Multiple serial interfaces are bundled to enable expansion of a band. The processor blade and the interface unit connect fellow connectors back to back.
摘要翻译：所公开的服务器系统具有其中安装有处理器的处理器刀片和连接到外部设备的接口单元，并且串行接口在这些单元之间连接。绑定多个串行接口以实现频段的扩展。处理器刀片和接口单元背对背连接其他连接器。

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