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    • 2. 发明授权
    • Close packed magnetic head linear array
    • 封闭磁头线性阵列
    • US5452165A
    • 1995-09-19
    • US214902
    • 1994-03-16
    • Mao-Min ChenKochan JuMohamad T. KrounbiDenny D. TangPo-Kang Wang
    • Mao-Min ChenKochan JuMohamad T. KrounbiDenny D. TangPo-Kang Wang
    • G11B5/008G11B5/012G11B5/31G11B5/48G11B5/56G11B5/584G11B5/29
    • G11B5/3103G11B5/3183G11B5/4886G11B5/4893G11B5/56G11B5/584G11B5/00817G11B5/012
    • The present invention includes a plurality of thin film magnetic heads which are arranged in a linear array with a spacing D between adjacent heads. The pole pieces of the magnetic heads are positioned in a side by side relationship in contrast to the normal pancake type of magnetic head. The linear array is angled at a skew angle .theta. with respect to the direction of travel of the magnetic medium. The track pitch is then D sin .theta.. The track width is substantially equal to the thickness of the pole tips P1T and P2T of the magnetic heads. This thickness can be in the order of 3 .mu.m. With such a pole tip thickness the track pitch of each magnetic head in the linear array can be 3-4 .mu.m. A plurality of narrow data tracks can then be provided with minimum pitch by a corresponding number of magnetic heads. The write signals are simultaneously fed to the heads or the read signals are simultaneously fed to the heads. This allows high data rates to be processed. The invention also provides different azimuth between adjacent heads to minimize cross talk between the tracks caused by track misregistration. Additional magnetic heads can be employed for servo control as needed.
    • 本发明包括多个薄膜磁头,其以相邻磁头之间的间隔D布置成线性阵列。 与正常的煎饼型磁头相反,磁头的极片与并排的关系定位。 线性阵列相对于磁性介质的行进方向以偏斜角θ成角度。 轨道间距为Dsinθ。 轨道宽度基本上等于磁头的极尖P1T和P2T的厚度。 该厚度可以在3μm左右。 具有这样的极尖厚度,线阵列中每个磁头的轨道间距可以是3-4μm。 然后可以通过相应数量的磁头以最小间距来提供多个窄数据轨道。 写入信号被同时馈送到头部,或者读取信号被同时馈送到头部。 这样可以处理高数据速率。 本发明还提供相邻头部之间的不同方位角,以最小化由轨道重合失调引起的轨道之间的串扰。 可根据需要使用额外的磁头进行伺服控制。
    • 4. 发明授权
    • Magnetoresistive read head with back filled gap insulation layers
    • 磁阻读头与后填充间隙绝缘层
    • US5617277A
    • 1997-04-01
    • US589813
    • 1996-01-22
    • Mao-Min ChenMohamad T. Krounbi
    • Mao-Min ChenMohamad T. Krounbi
    • G01R33/09G01R33/06G11B5/31G11B5/39H01L43/08H01L43/12
    • G11B5/3929G11B5/3103
    • A magnetic disk storage system with high linear resolution magnetoresistive (MR) head or heads comprising a dielectric substrate, a first magnetic shield, a first gap insulation layer, an MR stripe element, conductive leads, a second gap insulation layer, and a second magnetic shield. Back-fill layers of insulation material are deposited on the first gap insulation layer adjacent the MR element and/or on the second gap insulation layer in thicknesses substantially sufficient to at least in part replace insulation material removed during the various processing steps to ensure against short circuiting of the MR element. The MR element preferably is a trilayer comprising a soft MR sensing layer biased at an acute angle to the lengthwise dimension of the element but free to rotate therefrom according to the magnitude and direction of applied magnetic field; a soft magnetic or hard magnetic layer with magnetization fixed in a direction perpendicular to the lengthwise direction of the MR element; and a spacer layer separating these two layers.
    • 一种具有高线性分辨率磁阻(MR)磁头或磁头的磁盘存储系统,包括电介质基板,第一磁屏蔽,第一间隙绝缘层,MR条形元件,导电引线,第二间隙绝缘层和第二磁 屏蔽。 绝缘材料的填充层沉积在与MR元件相邻的第一间隙绝缘层和/或第二间隙绝缘层上,其厚度基本上足以至少部分地替代在各种加工步骤期间去除的绝缘材料,以确保短时间 MR元件的回路。 MR元件优选是三层,其包括根据所施加的磁场的大小和方向以与该元件的纵向尺寸成锐角倾斜的柔性MR感测层,但可自由旋转; 软磁性或硬磁性层,其磁化方向固定在与MR元件的长度方向垂直的方向上; 以及分隔这两层的间隔层。
    • 6. 发明授权
    • Spacer structure in MRAM cell and method of its fabrication
    • MRAM单元的间隔结构及其制作方法
    • US07880249B2
    • 2011-02-01
    • US11290763
    • 2005-11-30
    • Jun YuanLiubo HongMao-Min Chen
    • Jun YuanLiubo HongMao-Min Chen
    • H01L29/82
    • H01L43/12H01L27/222H01L43/08
    • Methods are presented for fabricating an MTJ element having a precisely controlled spacing between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each method forms a dielectric spacer layer on the lateral sides of the MTJ element and, depending on the method, includes an additional layer that protects the spacer layer during etching processes used to form a Cu damascene bit line. At various stages in the process, a dielectric layer is also formed to act as a CMP stop layer so that the capping layer on the MTJ element is not thinned by the CMP process that planarizes the surrounding insulation. Subsequent to planarization, the stop layer is removed by an anisotropic etch of such precision that the MTJ element capping layer is not thinned and serves to maintain an exact spacing between the bit line and the MTJ free layer.
    • 提出了用于制造在其自由层和位线之间具有精确控制的间隔的MTJ元件的方法,此外,具有邻接MTJ元件的侧面形成的保护性间隔层以消除MTJ层与钻头之间的泄漏电流 线。 每种方法在MTJ元件的侧面上形成电介质间隔层,并且根据该方法,包括在用于形成Cu镶嵌位线的蚀刻工艺期间保护间隔层的附加层。 在该过程的各个阶段,还形成介电层以用作CMP停止层,使得MTJ元件上的覆盖层不会通过使周围绝缘平坦化的CMP工艺变薄。 在平坦化之后,通过各向异性蚀刻去除停止层,其精度使得MTJ元件覆盖层不变薄并且用于保持位线和MTJ自由层之间的精确间隔。