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1. 发明申请

US20050243616A1 Non-volatile semiconductor storage device 有权
标题翻译：非易失性半导体存储装置
公开(公告)号：US20050243616A1
公开(公告)日：2005-11-03
申请号：US11113046
申请日：2005-04-25
申请人： Manabu Komiya , Yasuhiro Tomita , Hitoshi Suwa
发明人： Manabu Komiya , Yasuhiro Tomita , Hitoshi Suwa
IPC分类号： G11C16/02 , G11C11/34 , G11C16/22
CPC分类号： G11C16/22
摘要： The non-volatile semiconductor storage device 101 includes the specific command Enable/Disable signal lines 120 connected to the command decoder 108. The specific command Enable/Disable signals are externally inputted to the command decoder 108 through the signal lines 120. Thereby, when the device 101 is initialized, the command decoder 108 enables the specific command and the device 101 can shift to a mode corresponding to the specific command. On the other hand, the command decoder 108 can disable the specific command, for example, when a user uses the device 101, thereby preventing the specific command from being executed even when the specific command is erroneously issued.
摘要翻译：非易失性半导体存储装置101包括连接到命令解码器108的特定命令启用/禁止信号线120。特定命令使能/禁止信号通过信号线120被外部输入到命令解码器108。因此，当初始化设备101时，命令解码器108启用特定命令，并且设备101可以转换到与特定命令相对应的模式。另一方面，命令解码器108可以例如当用户使用设备101时禁止特定命令，从而即使在特定命令被错误地发出时也防止特定命令被执行。

2. 发明授权

US07310277B2 Non-volatile semiconductor storage device with specific command enable/disable control signal 有权
标题翻译：具有特定命令的非易失性半导体存储器件使能/禁止控制信号
公开(公告)号：US07310277B2
公开(公告)日：2007-12-18
申请号：US11113046
申请日：2005-04-25
申请人： Manabu Komiya , Yasuhiro Tomita , Hitoshi Suwa
发明人： Manabu Komiya , Yasuhiro Tomita , Hitoshi Suwa
IPC分类号： G11C7/00
CPC分类号： G11C16/22
摘要： The non-volatile semiconductor storage device 101 includes the specific command Enable/Disable signal lines 120 connected to the command decoder 108. The specific command Enable/Disable signals are externally inputted to the command decoder 108 through the signal lines 120. Thereby, when the device 101 is initialized, the command decoder 108 enables the specific command and the device 101 can shift to a mode corresponding to the specific command. On the other hand, the command decoder 108 can disable the specific command, for example, when a user uses the device 101, thereby preventing the specific command from being executed even when the specific command is erroneously issued.
摘要翻译：非易失性半导体存储装置101包括连接到命令解码器108的特定命令启用/禁止信号线120。特定命令使能/禁止信号通过信号线120被外部输入到命令解码器108。因此，当初始化设备101时，命令解码器108启用特定命令，并且设备101可以转换到与特定命令相对应的模式。另一方面，命令解码器108可以例如当用户使用设备101时禁止特定命令，从而即使在特定命令被错误地发出时也防止特定命令被执行。

3. 发明申请

US20050286299A1 Flash memory and program verify method for flash memory 有权
标题翻译：闪存的闪存和程序验证方法
公开(公告)号：US20050286299A1
公开(公告)日：2005-12-29
申请号：US11116440
申请日：2005-04-28
申请人： Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Jacob , Avi Parvin , Noam Eshel
发明人： Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Jacob , Avi Parvin , Noam Eshel
IPC分类号： G11C11/34 , G11C16/34
CPC分类号： G11C16/3454
摘要： In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory cell to be programmed is erroneously determined to be lower. Therefore, in a program verify process, a control circuit 3 writes a fail value to a neighbor cell buffer 5 when all neighbor cell(s) having an offset of n or less from a memory cell to be programmed are in the erased state, and when otherwise, writes a pass value to the neighbor cell buffer 5. The control circuit 3 verifies input write data and also verifies data stored in the neighbor cell buffer(s). In the latter verify process, a verify voltage higher than an ordinary one is used to compensate for the leakage of cell current.
摘要翻译：在存储器单元共享位线的常规存储器阵列中，在程序验证过程中，单元电流流过相邻单元，因此，要被编程的存储器单元的阈值被错误地确定为较低。因此，在程序验证处理中，当从要被编程的存储单元的偏移量为n以下的所有相邻单元都处于被擦除状态时，控制电路3向相邻单元缓冲器5写入失败值，否则，将通过值写入邻居单元缓冲器5。控制电路3验证输入写入数据，并验证存储在相邻单元缓冲器中的数据。在后一验证过程中，使用高于常规验证电压的验证电压来补偿电池电流的泄漏。

4. 发明授权

US07446549B2 Semiconductor leakage current detector and leakage current measurement method, semiconductor leakage current detector with voltage trimming function and reference voltage trimming method, and semiconductor integrated circuit thereof 有权
标题翻译：半导体漏电流检测器和漏电流测量方法，具有调压功能和参考电压调整方法的半导体漏电检测器及其半导体集成电路
公开(公告)号：US07446549B2
公开(公告)日：2008-11-04
申请号：US11614127
申请日：2006-12-21
申请人： Yasuhiro Tomita , Manabu Komiya , Hitoshi Suwa , Toshiki Mori
发明人： Yasuhiro Tomita , Manabu Komiya , Hitoshi Suwa , Toshiki Mori
IPC分类号： G01R31/02 , G01R19/14 , G01R31/08 , H03K5/22 , G08B21/00
CPC分类号： G01R31/3008 , G11C29/02 , G11C29/025 , G11C29/028 , G11C29/50 , G11C2029/1204 , G11C2029/5006
摘要： A semiconductor leakage current detector of the present invention includes a first analog switch which causes a current to be measured to flow or to be cut off, a second analog switch which causes a reference current to flow or to be cut off, an integral capacitance element which is connected by the first analog switch and the second analog switch and is charged with the current to be measured or the reference current, a discharge unit which discharges the integral capacitor, and a comparison unit which compares the reference voltage with each of an integral voltage generated in the integral capacitor by a reference current after the discharge of the integral capacitor and an integral voltage generated in the integral capacitance element by the current to be measured after the discharge of the integral capacitor.
摘要翻译：本发明的半导体泄漏电流检测器包括使得测量电流流动或切断的第一模拟开关，引起参考电流流动或被切断的第二模拟开关，积分电容元件其通过第一模拟开关和第二模拟开关连接，并对被测量电流或参考电流进行充电;放电单元，其对积分电容器进行放电;以及比较单元，其将参考电压与积分电压在积分电容器放电之后，在积分电容器中产生的电压由积分电容器放电后的基准电流产生，积分电容元件中产生的积分电压由积分电容器放电后的待测电流产生。

5. 发明授权

US07313649B2 Flash memory and program verify method for flash memory 有权
标题翻译：闪存的闪存和程序验证方法
公开(公告)号：US07313649B2
公开(公告)日：2007-12-25
申请号：US11116440
申请日：2005-04-28
申请人： Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Allan Jacob , Avi Parvin , Noam Eshel
发明人： Yasuhiro Tomita , Hitoshi Suwa , Manabu Komiya , Tamas Toth , Jeffrey Allan Jacob , Avi Parvin , Noam Eshel
IPC分类号： G06F12/00
CPC分类号： G11C16/3454
摘要： In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory cell to be programmed is erroneously determined to be lower. Therefore, in a program verify process, a control circuit 3 writes a fail value to a neighbor cell buffer 5 when all neighbor cell(s) having an offset of n or less from a memory cell to be programmed are in the erased state, and when otherwise, writes a pass value to the neighbor cell buffer 5. The control circuit 3 verifies input write data and also verifies data stored in the neighbor cell buffer(s). In the latter verify process, a verify voltage higher than an ordinary one is used to compensate for the leakage of cell current.
摘要翻译：在存储器单元共享位线的常规存储器阵列中，在程序验证过程中，单元电流流过相邻单元，因此，要被编程的存储器单元的阈值被错误地确定为较低。因此，在程序验证处理中，当从要被编程的存储单元的偏移量为n以下的所有相邻单元都处于被擦除状态时，控制电路3向相邻单元缓冲器5写入失败值，否则，将通过值写入邻居单元缓冲器5。控制电路3验证输入写入数据，并验证存储在相邻单元缓冲器中的数据。在后一验证过程中，使用高于常规验证电压的验证电压来补偿电池电流的泄漏。

6. 发明申请

US20050237826A1 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20050237826A1
公开(公告)日：2005-10-27
申请号：US11099605
申请日：2005-04-06
申请人： Hitoshi Suwa , Manabu Komiya , Yasuhiro Tomita
发明人： Hitoshi Suwa , Manabu Komiya , Yasuhiro Tomita
IPC分类号： G11C16/06 , G11C7/00 , G11C11/34 , G11C16/10
CPC分类号： G11C16/10
摘要： An n-bit status signal indicating an execution state of a write command is outputted from a status register. At the time of data writing, an output switching circuit outputs (n×m)-bit data in which a status signal pattern repeats m times. At the time of data reading, the output switching circuit outputs data stored in a memory cell array.
摘要翻译：从状态寄存器输出表示写命令执行状态的n位状态信号。在数据写入时，输出切换电路输出状态信号模式重复m次的（n×m）位数据。在数据读取时，输出切换电路输出存储在存储单元阵列中的数据。

7. 发明授权

US07110305B2 Nonvolatile semiconductor memory device for outputting a status signal having an output data width wider than an input data width 有权
标题翻译：非易失性半导体存储器件，用于输出具有比输入数据宽度宽的输出数据宽度的状态信号
公开(公告)号：US07110305B2
公开(公告)日：2006-09-19
申请号：US11099605
申请日：2005-04-06
申请人： Hitoshi Suwa , Manabu Komiya , Yasuhiro Tomita
发明人： Hitoshi Suwa , Manabu Komiya , Yasuhiro Tomita
IPC分类号： G11C7/10
CPC分类号： G11C16/10
摘要： An n-bit status signal indicating an execution state of a write command is outputted from a status register. At the time of data writing, an output switching circuit outputs (n×m)-bit data in which a status signal pattern repeats m times. At the time of data reading, the output switching circuit outputs data stored in a memory cell array.
摘要翻译：从状态寄存器输出表示写命令执行状态的n位状态信号。在数据写入时，输出切换电路输出状态信号模式重复m次的（n×m）位数据。在数据读取时，输出切换电路输出存储在存储单元阵列中的数据。

8. 发明申请

US20070057190A1 Ultra-high resolution pixel electrode arrangement structure signal processing method 失效
标题翻译：超高分辨率像素电极排列结构信号处理方法
公开(公告)号：US20070057190A1
公开(公告)日：2007-03-15
申请号：US10576413
申请日：2004-10-20
申请人： Yoshinori Hatanaka , Toru Aoki , Yasuhiro Tomita
发明人： Yoshinori Hatanaka , Toru Aoki , Yasuhiro Tomita
IPC分类号： G01T1/24 , H01L27/146 , H01L25/00
CPC分类号： H04N5/349 , H04N5/32 , H04N5/3651
摘要： When a semiconductor sensor element used for detecting high-energy x-rays and gamma rays and an amplifier are connected via wires, the capacitances vary depending on the wires, thereby causing a sensitivity variation. To solve this, a structure for making the capacitances uniform is proposed. If a staggered arrangement is used for high resolution, the capacitances by wiring are different from element to element, so dummy sensor mounting sections (2) are provided to electrode sections (3) to make the capacitance uniform. The width of the connection section is decreased depending on the wiring length so as to make the capacitance uniform.
摘要翻译：当用于检测高能X射线和γ射线的半导体传感器元件和放大器通过导线连接时，电容根据导线而变化，从而导致灵敏度变化。为了解决这个问题，提出了一种使电容均匀化的结构。如果以高分辨率使用交错布置，则通过布线的电容与元件不同，因此将虚拟传感器安装部分（2）设置到电极部分（3）以使电容均匀。连接部分的宽度根据布线长度而减小，从而使电容均匀。

9. 发明申请

US20060203560A1 Driving method of nonvolatile memory and nonvolatile memory used in the same method 有权
标题翻译：以相同的方法使用非易失性存储器和非易失性存储器的驱动方法
公开(公告)号：US20060203560A1
公开(公告)日：2006-09-14
申请号：US11371908
申请日：2006-03-10
申请人： Yasuhiro Tomita
发明人： Yasuhiro Tomita
IPC分类号： G11C16/04
CPC分类号： H01L21/28282 , G11C16/0475 , G11C16/28 , H01L27/115
摘要： To increase a cell current ratio of a program state to an erase state of two bit storage nonvolatile memory cells and reduce power consumption, a program state of MONOS-typed memory cells is a state where electrons are injected into two local regions near drain and source junction edges, an erase state is a state where the electrons injected into the two local regions are neutralized or holes are injected, and a read bias is a linear region. A cell current in the program state can be suppressed since charges injected into the source side suppress introduction of electron carriers required for formation of a conductive channel and charges injected into the drain side limit the formation of the conductive channel near the drain side. Accordingly, a read current can be reduced, a cell current ratio can be enhanced, and moreover, a margin of a reading operation can be increased.
摘要翻译：为了将编程状态的单元电流比率增加到两位存储非易失性存储单元的擦除状态并降低功耗，MONOS型存储单元的编程状态是将电子注入漏极和源极附近的两个局部区域的状态结合边缘，擦除状态是注入到两个局部区域中的电子被中和或注入空穴并且读取偏压是线性区域的状态。可以抑制编程状态下的电池电流，因为注入到源极侧的电荷抑制形成导电沟道所需的电子载流子的引入和注入到漏极侧的电荷限制了靠近漏极侧的导电通道的形成。因此，可以减小读取电流，可以提高电池电流比，而且可以提高读取操作的余量。

10. 发明授权

US07847261B2 Radiation detector 有权
标题翻译：辐射检测器
公开(公告)号：US07847261B2
公开(公告)日：2010-12-07
申请号：US11993391
申请日：2005-06-30
申请人： Yasuhiro Tomita , Yuji Shirayanagi , Shinjiro Matsui
发明人： Yasuhiro Tomita , Yuji Shirayanagi , Shinjiro Matsui
IPC分类号： G01T1/161
CPC分类号： G01T1/169 , G01T1/161
摘要： A detecting unit (2) detects radiation. A data acquiring block (34) creates basic data equivalent to the count per unit time of the detected radiation. A data processing block (40) compares the basic data with a threshold and generates a annunciation control signal when the basic data is above the threshold. An annunciation block (42) generates a detection sound in response to the annunciation control signal. A computing block (38) computes the threshold by using a coefficient specified by means of an input device (18) and the maximum value of the basic data stored in a storage block (36). When the user repetitively examines a region (50) to be measured while gradually increasing the threshold, the region where the detection sound is generated is gradually narrowed. With this, a portion (53) where radiation is concentrated in the region (50) can be found out.
摘要翻译：检测单元（2）检测辐射。数据获取块（34）产生与检测到的辐射的每单位时间的计数等价的基本数据。数据处理块（40）将基本数据与阈值进行比较，当基本数据高于阈值时，生成通知控制信号。通知块（42）响应于通知控制信号产生检测声音。计算块（38）通过使用通过输入装置（18）指定的系数和存储在存储块（36）中的基本数据的最大值来计算阈值。当用户在逐渐增加阈值的同时重复地检查要测量的区域（50）时，产生检测声音的区域逐渐变窄。由此，可以发现辐射集中在区域（50）中的部分（53）。

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