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    • 2. 发明授权
    • Pixel defect correction apparatus
    • 像素缺陷校正装置
    • US4701784A
    • 1987-10-20
    • US829135
    • 1986-01-31
    • Hiroki MatsuokaAtsushi MorimuraYoshinori Kitamura
    • Hiroki MatsuokaAtsushi MorimuraYoshinori Kitamura
    • H04N5/367H04N3/14
    • H04N5/367
    • A defect correction apparatus includes a memory having information of image failure of a solid state imaging device, a coincidence detection circuit for detecting a position of pixel having a failure at the time of image pick up, and a failure correction circuit. The failure correction circuit includes structure for producing plural signals for correction of signals of pixels around the pixel having the failure, and structure for selecting an optimum one from the produced plural signals, for correction responding to condition of the image and signals of the pixel therearound, and to use the selected optimum signal for correction by switching for the signal of the failure pixel.
    • PCT No.PCT / JP85 / 00300 Sec。 371日期1986年1月31日 102(e)日期1986年1月31日PCT提交1985年5月30日PCT公布。 公开号WO85 / 05752 日期:1985年12月19日。缺陷修正装置包括具有固态成像装置的图像故障信息的存储器,用于检测图像拾取时具有故障的像素的位置的重合检测电路和故障 校正电路。 故障校正电路包括用于产生用于校正具有故障的像素周围的像素的信号的多个信号的结构,以及用于从所产生的多个信号中选择最佳像素的结构,用于根据图像的条件和其周围的像素的信号进行校正 并且通过切换故障像素的信号来使用所选择的最佳信号进行校正。
    • 4. 发明授权
    • Digital-signal-processing camera
    • 数字信号处理相机
    • US5371540A
    • 1994-12-06
    • US133786
    • 1993-10-08
    • Akihiro TamuraAtsushi MorimuraYoshinori Kitamura
    • Akihiro TamuraAtsushi MorimuraYoshinori Kitamura
    • H04N5/067H04N5/77H04N5/91H04N5/14
    • H04N5/0675H04N5/77H04N5/91Y10S348/914
    • In the present invention, a drive circuit 12 drives a solid-state image-pickup element 11 in synchronism with a synchronizing signal generated by a synchronizing signal generation circuit 13, and the solid-state image-pickup element 11 issues an output signal prior to an end time of a horizontal blanking period by a time period T.sub.A. This output signal is processed in a digital signal processing circuit 14 and is issued as a picture signal. At that time, the picture signal is delayed from the synchronizing signal by a time period (T.sub.B -T.sub.A) owing to the signal processing, whereas the synchronizing signal is delayed by a delay circuit 15, in which a delay time made by subtracting a time period T.sub.A from a delay time T.sub.B of the digital signal processing circuit 14 is given, and can be issued in a proper timing for a picture signal output of the digital signal processing circuit 14. Further, by incorporating the delay circuit 15 in an LSI which constitutes the digital signal processing circuit 14, a circuit-construction can be minimized and a disturbance, which is given to the picture signal by the synchronizing signal, can be remarkably eliminated.
    • 在本发明中,驱动电路12与由同步信号发生电路13产生的同步信号同步地驱动固态摄像元件11,并且固态摄像元件11在 水平消隐期的结束时间为时间段TA。 该输出信号在数字信号处理电路14中进行处理,作为图像信号发出。 此时,由于信号处理,图像信号从同步信号延迟一段时间(TB-TA),而同步信号被延迟电路15延迟,其中通过减去时间 给出了数字信号处理电路14的延迟时间TB的周期TA,并且可以在数字信号处理电路14的图像信号输出的适当定时发出。另外,通过将延迟电路15并入LSI 构成数字信号处理电路14,可以最小化电路结构,并且可以显着地消除由同步信号给予图像信号的干扰。