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1. 发明授权

US6072677A Electrostatic discharge protective circuit formed by use of a silicon controlled rectifier 有权
标题翻译：使用可控硅整流器形成的静电放电保护电路
公开(公告)号：US6072677A
公开(公告)日：2000-06-06
申请号：US184897
申请日：1998-11-03
申请人： Mainn-Gwo Chen , Ming-Jer Chen , Chuan H. Liu
发明人： Mainn-Gwo Chen , Ming-Jer Chen , Chuan H. Liu
IPC分类号： H01L27/02 , H02H9/04
CPC分类号： H01L27/0259 , H01L27/0251
摘要： An electrostatic discharge protective circuit formed by use of a silicon controller rectifier is coupled to an input port and an internal circuit for discharging electrostatic charges on the input port to ground. When the electrostatic charges are applied on the input port, a punch-through effect is created between a first P-type diffusion region and a second N-type diffusion region to turn on a parasitic NPN bipolar junction transistor. At the same time, a voltage is applied on a gate of the MOS transistor via a small-signal equivalent capacitor to turn on itself, thereby discharging the electrostatic charges. Accordingly, the trigger voltage of the silicon controller rectifier can be efficiently lowered to improve the electrostatic discharge protective capability of the silicon control rectifier.
摘要翻译：通过使用硅控制器整流器形成的静电放电保护电路耦合到输入端口和内部电路，用于将输入端口上的静电电荷排放到地。当静电电荷施加到输入端口时，在第一P型扩散区域和第二N型扩散区域之间产生穿透效应，以接通寄生NPN双极结型晶体管。同时，通过小信号等效电容器在MOS晶体管的栅极上施加电压以使其自身导通，从而放电静电电荷。因此，可以有效地降低硅控制整流器的触发电压，以提高硅控整流器的静电放电保护能力。

2. 发明授权

US06169035A Method of local oxidation using etchant and oxidizer 失效
标题翻译：使用蚀刻剂和氧化剂进行局部氧化的方法
公开(公告)号：US06169035A
公开(公告)日：2001-01-02
申请号：US09173153
申请日：1998-10-14
申请人： Chuan H. Liu , Chin-Kun Lo , Mainn-Gwo Chen
发明人： Chuan H. Liu , Chin-Kun Lo , Mainn-Gwo Chen
IPC分类号： H01L21311
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31116 , H01L21/31662 , H01L21/76202
摘要： A LOCOS method uses a reagent mixed of etchant and oxidizer to simultaneously perform the step of forming the FOX layer and the step of removing a mask layer of the conventional LOCOS method. The applied temperature is about 950-1150° C. The etchant. such as a HF acid solution, is used to remove the mask layer, and the oxidizer, such as O2, is used to form the FOX layer on a silicon substrate.
摘要翻译： LOCOS方法使用与蚀刻剂和氧化剂混合的试剂来同时进行形成FOX层的步骤和去除常规LOCOS方法的掩模层的步骤。施加的温度为约950-1150℃。蚀刻剂。例如HF酸溶液，用于去除掩模层，氧化剂如O 2用于在硅衬底上形成FOX层。

3. 发明授权

US06249139B1 Lifetime measurement of an ultra-thin dielectric layer 有权
标题翻译：超薄电介质层寿命测量
公开(公告)号：US06249139B1
公开(公告)日：2001-06-19
申请号：US09393054
申请日：1999-09-09
申请人： Kuan-Yu Fu , Mainn-Gwo Chen , Chuan H. Liu
发明人： Kuan-Yu Fu , Mainn-Gwo Chen , Chuan H. Liu
IPC分类号： G01R3126
CPC分类号： G01R31/129 , G01R31/2648
摘要： A method is described for taking a lifetime measurement of an ultra-thin dielectric layer. In order to discover the life time of the ultra-thin dielectric layer, the measurement comprises using about one half of a stress voltage to measure a time-dependent leakage current of the ultra-thin dielectric layer.
摘要翻译：描述了一种对超薄介电层进行寿命测量的方法。为了发现超薄电介质层的寿命，测量包括使用大约一半的应力电压来测量超薄电介质层的时间依赖性漏电流。

4. 发明授权

US06269315B1 Reliability testing method of dielectric thin film 有权
标题翻译：电介质薄膜的可靠性测试方法
公开(公告)号：US06269315B1
公开(公告)日：2001-07-31
申请号：US09232202
申请日：1999-01-14
申请人： Kuan-Yu Fu , Chuan H. Liu , Donald Cheng , Sheng-Hsing Yang , Mu-Chun Wang
发明人： Kuan-Yu Fu , Chuan H. Liu , Donald Cheng , Sheng-Hsing Yang , Mu-Chun Wang
IPC分类号： G01R2702
CPC分类号： G01R31/129
摘要： A method for testing the reliability of a dielectric thin film. An exponential current ramp test is performed with a delay time to test the dielectric thin film. An exponential current ramp charge-to-breakdown distribution, which is represented by cumulative distribution failure percentage, is obtained. An exponential current ramp charge-to-breakdown at a cumulative distribution failure percentage is calculated. An exponential current ramp constant and a constant current stress constant at the cumulative distribution failure percentage are calculated. A constant current stress charge-to-breakdown at the cumulative distribution failure percentage is calculated by using a specified current density and the constant current stress constant at the cumulative distribution failure percentage. The constant current stress charge-to-breakdown at the cumulative distribution failure percentage is compared to a specified constant current stress charge-to-breakdown to determine the reliability of the dielectric thin film.
摘要翻译：一种用于测试电介质薄膜可靠性的方法。以延迟时间进行指数电流斜坡测试来测试电介质薄膜。获得由累积分布失效百分比表示的指数电流斜坡电荷到击穿分布。计算累积分布失败百分比下的指数电流斜坡电荷分解。计算累积分布失效百分比下的指数电流斜坡常数和恒定电流应力常数。通过使用规定的电流密度和累积分布失效百分比下的恒定电流应力常数来计算累积分布失效百分比下的恒定电流应力电荷分解。将累积分布失效百分比下的恒定电流应力电荷击穿与特定的恒定电流应力电荷分解进行比较，以确定电介质薄膜的可靠性。

5. 发明授权

US06268269B1 Method for fabricating an oxide layer on silicon with carbon ions introduced at the silicon/oxide interface in order to reduce hot carrier effects 有权
标题翻译：用于在硅/氧化物界面处引入碳离子的硅上制造氧化层以减少热载体效应的方法
公开(公告)号：US06268269B1
公开(公告)日：2001-07-31
申请号：US09474846
申请日：1999-12-30
申请人： Ming-Tsan Lee , Chuan H. Liu , Kuan-Yu Fu
发明人： Ming-Tsan Lee , Chuan H. Liu , Kuan-Yu Fu
IPC分类号： H01L21322
CPC分类号： H01L21/28185 , H01L21/26506 , H01L21/28211
摘要： A fabrication method for an oxide layer with reduced interface-trapped charges, which is applicable to the fabrication of a gate oxide layer of a flash memory device, is described. The method includes conducting a first inert ambient annealing process, followed by growing an oxide layer on the silicon substrate. A second inert ambient annealing process is then conducted on the oxide layer. Carbon ions are then incorporated into the interface between the oxide layer and the silicon substrate, followed by a third ambient annealing process.
摘要翻译：描述了可应用于制造闪速存储器件的栅极氧化物层的具有减少的界面俘获电荷的氧化物层的制造方法。该方法包括进行第一惰性环境退火工艺，随后在硅衬底上生长氧化物层。然后在氧化物层上进行第二惰性环境退火工艺。然后将碳离子并入到氧化物层和硅衬底之间的界面中，随后进行第三环境退火处理。

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