专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5364496A Highly durable noncontaminating surround materials for plasma etching 失效
标题翻译：用于等离子体蚀刻的高度耐用的不污染环绕材料
公开(公告)号：US5364496A
公开(公告)日：1994-11-15
申请号：US110021
申请日：1993-08-20
申请人： Lynn D. Bollinger , Michael P. Power , Richard R. Poole , George J. Gardopee
发明人： Lynn D. Bollinger , Michael P. Power , Richard R. Poole , George J. Gardopee
IPC分类号： H01L21/68 , H01L21/306 , B44C1/22
CPC分类号： H01L21/68
摘要： A support and positioning apparatus (10) for supporting and positioning a wafer (12), substrate or the like in a plasma assisted chemical etching process. Surround components (14, 16, 18, 20) positioned around the substrate (12) are comprised of substantially pure magnesium or are aluminum coated with a magnesium fluoride coating such that as a plasma tool associated with the plasma etching process traverses the edge of the substrate (12), the plasma etching environment generated from a fluorine containing feed gas emitted from the plasma tool does not significantly erode the surround components (14, 16, 18, 20) or cause contamination of the substrate (12).
摘要翻译：一种用于在等离子体辅助化学蚀刻工艺中支撑和定位晶片（12），衬底等的支撑和定位装置（10）。位于基板（12）周围的环绕部件（14,16,18,20）由基本上纯的镁构成，或者是用氟化镁涂层涂覆的铝，使得与等离子体蚀刻工艺相关的等离子体工具横穿从等离子体工具发射的含氟进料气体产生的等离子体蚀刻环境不会显着侵蚀环绕部件（14,16,18,20）或引起基板（12）的污染。

2. 发明授权

US5474647A Wafer flow architecture for production wafer processing 失效
标题翻译：晶圆流程架构用于生产晶圆加工
公开(公告)号：US5474647A
公开(公告)日：1995-12-12
申请号：US153236
申请日：1993-11-15
申请人： Sherman K. Poultney , Peter B. Mumola , Joseph P. Prusak , George J. Gardopee , Thomas J. McHugh
发明人： Sherman K. Poultney , Peter B. Mumola , Joseph P. Prusak , George J. Gardopee , Thomas J. McHugh
IPC分类号： H01L21/302 , H01L21/00 , H01L21/02 , H01L21/306 , H01L21/677
CPC分类号： H01L21/67063
摘要： A method for controlling the flow of semiconductor wafers within a semiconductor wafer processing facility. This method includes a wafer storage and preparation area (10) and a wafer metrology and etch area (12), both of which are monitored and/or controlled by a master controller (14). The wafer storage and preparation area (10) is typically kept at a class 10 clean room level and is comprised of a wafer storage area (16) and a wafer preparation area (18). The wafer metrology and etch area (12) is typically kept at a class 1000 clean room level and is comprised of an I/O cassette module (22), a wafer pre-aligner (24), a wafer router (26), a wafer metrology instrument (28), and a wafer etching instrument (30). The semiconductor wafers are transported, either manually or automatically, between the wafer storage area (16) and the wafer preparation area (18), as well as between the wafer storage and preparation area (10) and the wafer metrology and etch area (12), within wafer storage cassettes ( 20). The semiconductor wafers are individually transported between the I/O cassette module (22), the wafer pre-aligner (24), the wafer metrology instrument (28), and the wafer etching instrument (30) by the wafer router (26).
摘要翻译：一种用于控制半导体晶片处理设备内的半导体晶片的流动的方法。该方法包括晶片存储和准备区域（10）以及晶片计量和蚀刻区域（12），它们都由主控制器（14）监视和/或控制。晶片存储和制备区域（10）通常保持在10级洁净室水平，并且包括晶片存储区域（16）和晶片准备区域（18）。晶片测量和蚀刻区域（12）通常保持在1000级洁净室水平，并且包括I / O盒模块（22），晶片预对准器（24），晶片路由器（26），晶片计量仪器（28）和晶片蚀刻仪器（30）。半导体晶片手动或自动地在晶片存储区域（16）和晶片制备区域（18）之间以及晶片存储和准备区域（10）之间以及晶片计量和蚀刻区域（12）之间传送），在晶片存储盒（20）内。半导体晶片由晶片路由器（26）在I / O盒模块（22），晶片预对准器（24），晶片计量仪器（28）和晶片蚀刻仪器（30）之间单独传输。

3. 发明授权

US06242926B1 Method and apparatus for moving an article relative to and between a pair of thickness measuring probes to develop a thickness map for the article 有权
标题翻译：用于相对于一对厚度测量探针之间和之间移动制品的方法和装置，以形成用于制品的厚度图
公开(公告)号：US06242926B1
公开(公告)日：2001-06-05
申请号：US09228307
申请日：1999-01-12
申请人： George J. Gardopee , Anthony M. Ledger , Alexander A. Gomez
发明人： George J. Gardopee , Anthony M. Ledger , Alexander A. Gomez
IPC分类号： G01R2726
CPC分类号： G01B11/06 , G01B21/08 , G01B2210/44 , G01B2210/48
摘要： A method and apparatus for moving an article relative to and between a pair of distance sensing probes of a thickness measuring apparatus which are spaced apart a known distance D is described. In the method, the article is moved relative to and between the pair of probes in at least one direction in a plane normal to a common measurement axis Ac between the probes. A distance a along the common measurement axis Ac between the first probe and a point on the surface of the article nearest to the first probe of the pair that intersects the common measurement axis Ac is measured. A similar distance b between the second probe and the article is measured. From the measured distance a, the article is moved relative to the probes along the common measurement axis Ac so as to minimize any difference between the measured distance a and a desired distance ad along the common measurement axis Ac between the first probe and a point on the surface of the article nearest to the first probe that intersects the common measurement axis. The measured distances a and b and the position of the article relative to the probes in at least one direction are recorded at predetermined time intervals to develop a thickness map of the article. In a thickness computation, all of the measured distances a for each recorded position of the article are substantially the same.
摘要翻译：描述了一种用于相对于间隔开已知距离D的厚度测量装置的一对距离感测探头之间和之间移动物品的方法和装置。在该方法中，物品在垂直于探针之间的公共测量轴线Ac的平面中的至少一个方向上相对于探针对和之间移动。测量第一探针与物体表面上最接近于与公共测量轴Ac相交的第一探针的点之间的距离a的距离a。测量第二探针和制品之间的类似距离b。从测量的距离a，物品沿着公共测量轴Ac相对于探头移动，以便最小化测量距离a与沿着公共测量轴线的期望距离ad之间的任何差异。第一探测器和点最接近第一个探针的物体表面与公共测量轴相交。以预定的时间间隔记录测量的距离a和b以及物品相对于探针在至少一个方向上的位置，以形成物品的厚度图。在厚度计算中，对于制品的每个记录位置的所有测量距离a基本相同。

4. 发明授权

US5610102A Method for co-registering semiconductor wafers undergoing work in one or more blind process modules 失效
标题翻译：在一个或多个盲目处理模块中共同对准正在进行工作的半导体晶片的方法
公开(公告)号：US5610102A
公开(公告)日：1997-03-11
申请号：US152780
申请日：1993-11-15
申请人： George J. Gardopee , Paul J. Clapis , Joseph P. Prusak , Sherman K. Poultney
发明人： George J. Gardopee , Paul J. Clapis , Joseph P. Prusak , Sherman K. Poultney
IPC分类号： G01R31/26 , G01R31/28 , H01L21/677 , H01L21/68 , H01L21/302
CPC分类号： H01L21/67796 , G06F2203/0382 , Y10S148/162 , Y10S414/136
摘要： A method for co-registering a semiconductor wafer (14) undergoing work in one or more blind process modules (10), (12) requires a means (16), (18) for consistently and repeatably registering the semiconductor wafer (14) to each process module (10), (12). Given this consistent and repeatable singular wafer registration means (16), (18), the location of the coordinate axes of each process module (10), (12) is determined with respect to the position of the semiconductor wafer (14) that is registered therein. The present invention method provides three approaches for determining the location of these axes: (1) an absolute location of the axes, (2) a relative location of the axes using one blind process module (10) to measure the position of a pattern etched into the semiconductor wafer (14) with another blind process module (12), and (3) a relative location of the axes using one blind process module (10) to measure surface or layer thickness characteristics in the semiconductor wafer (14) as modified by wafer processing. Regardless of which approach is followed, the determination of the location of the coordinate axes in each process module (10), (12) is an effective co-registration of the semiconductor wafer (14).
摘要翻译：一种用于共同对准在一个或多个盲工艺模块（10），（12）中进行工作的半导体晶片（14）的方法需要用于将半导体晶片（14）一致地和可重复地对准的装置（16），（18）每个处理模块（10），（12）。给定这种一致且可重复的奇异晶片登记装置（16），（18），每个处理模块（10），（12）的坐标轴的位置相对于半导体晶片（14）的位置来确定，在其中注册。本发明方法提供了用于确定这些轴的位置的三种方法：（1）轴的绝对位置，（2）使用一个盲处理模块（10）的轴的相对位置，以测量蚀刻的图案的位置通过另一个盲目处理模块（12）进入半导体晶片（14），和（3）使用一个盲目处理模块（10）的轴的相对位置，以测量半导体晶片（14）中的表面或层厚度特性通过晶片处理。不管遵循哪种方法，在每个处理模块（10），（12）中确定坐标轴的位置是半导体晶片（14）的有效共同配准。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式