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    • 1. 发明授权
    • Wafer flow architecture for production wafer processing
    • 晶圆流程架构用于生产晶圆加工
    • US5474647A
    • 1995-12-12
    • US153236
    • 1993-11-15
    • Sherman K. PoultneyPeter B. MumolaJoseph P. PrusakGeorge J. GardopeeThomas J. McHugh
    • Sherman K. PoultneyPeter B. MumolaJoseph P. PrusakGeorge J. GardopeeThomas J. McHugh
    • H01L21/302H01L21/00H01L21/02H01L21/306H01L21/677
    • H01L21/67063
    • A method for controlling the flow of semiconductor wafers within a semiconductor wafer processing facility. This method includes a wafer storage and preparation area (10) and a wafer metrology and etch area (12), both of which are monitored and/or controlled by a master controller (14). The wafer storage and preparation area (10) is typically kept at a class 10 clean room level and is comprised of a wafer storage area (16) and a wafer preparation area (18). The wafer metrology and etch area (12) is typically kept at a class 1000 clean room level and is comprised of an I/O cassette module (22), a wafer pre-aligner (24), a wafer router (26), a wafer metrology instrument (28), and a wafer etching instrument (30). The semiconductor wafers are transported, either manually or automatically, between the wafer storage area (16) and the wafer preparation area (18), as well as between the wafer storage and preparation area (10) and the wafer metrology and etch area (12), within wafer storage cassettes ( 20). The semiconductor wafers are individually transported between the I/O cassette module (22), the wafer pre-aligner (24), the wafer metrology instrument (28), and the wafer etching instrument (30) by the wafer router (26).
    • 一种用于控制半导体晶片处理设备内的半导体晶片的流动的方法。 该方法包括晶片存储和准备区域(10)以及晶片计量和蚀刻区域(12),它们都由主控制器(14)监视和/或控制。 晶片存储和制备区域(10)通常保持在10级洁净室水平,并且包括晶片存储区域(16)和晶片准备区域(18)。 晶片测量和蚀刻区域(12)通常保持在1000级洁净室水平,并且包括I / O盒模块(22),晶片预对准器(24),晶片路由器(26), 晶片计量仪器(28)和晶片蚀刻仪器(30)。 半导体晶片手动或自动地在晶片存储区域(16)和晶片制备区域(18)之间以及晶片存储和准备区域(10)之间以及晶片计量和蚀刻区域(12)之间传送 ),在晶片存储盒(20)内。 半导体晶片由晶片路由器(26)在I / O盒模块(22),晶片预对准器(24),晶片计量仪器(28)和晶片蚀刻仪器(30)之间单独传输。
    • 2. 发明授权
    • Method for co-registering semiconductor wafers undergoing work in one or
more blind process modules
    • 在一个或多个盲目处理模块中共同对准正在进行工作的半导体晶片的方法
    • US5610102A
    • 1997-03-11
    • US152780
    • 1993-11-15
    • George J. GardopeePaul J. ClapisJoseph P. PrusakSherman K. Poultney
    • George J. GardopeePaul J. ClapisJoseph P. PrusakSherman K. Poultney
    • G01R31/26G01R31/28H01L21/677H01L21/68H01L21/302
    • H01L21/67796G06F2203/0382Y10S148/162Y10S414/136
    • A method for co-registering a semiconductor wafer (14) undergoing work in one or more blind process modules (10), (12) requires a means (16), (18) for consistently and repeatably registering the semiconductor wafer (14) to each process module (10), (12). Given this consistent and repeatable singular wafer registration means (16), (18), the location of the coordinate axes of each process module (10), (12) is determined with respect to the position of the semiconductor wafer (14) that is registered therein. The present invention method provides three approaches for determining the location of these axes: (1) an absolute location of the axes, (2) a relative location of the axes using one blind process module (10) to measure the position of a pattern etched into the semiconductor wafer (14) with another blind process module (12), and (3) a relative location of the axes using one blind process module (10) to measure surface or layer thickness characteristics in the semiconductor wafer (14) as modified by wafer processing. Regardless of which approach is followed, the determination of the location of the coordinate axes in each process module (10), (12) is an effective co-registration of the semiconductor wafer (14).
    • 一种用于共同对准在一个或多个盲工艺模块(10),(12)中进行工作的半导体晶片(14)的方法需要用于将半导体晶片(14)一致地和可重复地对准的装置(16),(18) 每个处理模块(10),(12)。 给定这种一致且可重复的奇异晶片登记装置(16),(18),每个处理模块(10),(12)的坐标轴的位置相对于半导体晶片(14)的位置来确定, 在其中注册。 本发明方法提供了用于确定这些轴的位置的三种方法:(1)轴的绝对位置,(2)使用一个盲处理模块(10)的轴的相对位置,以测量蚀刻的图案的位置 通过另一个盲目处理模块(12)进入半导体晶片(14),和(3)使用一个盲目处理模块(10)的轴的相对位置,以测量半导体晶片(14)中的表面或层厚度特性 通过晶片处理。 不管遵循哪种方法,在每个处理模块(10),(12)中确定坐标轴的位置是半导体晶片(14)的有效共同配准。