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    • 2. 发明授权
    • Dynamic instruction execution based on transaction priority tagging
    • 基于事务优先级标记的动态指令执行
    • US08886918B2
    • 2014-11-11
    • US11946504
    • 2007-11-28
    • Louis B. Capps, Jr.Robert H. Bell, Jr.
    • Louis B. Capps, Jr.Robert H. Bell, Jr.
    • G06F9/30G06F11/34G06F9/50G06F9/38
    • G06F9/30101G06F9/3851G06F9/5011G06F11/3409G06F11/3466G06F2201/81G06F2201/885G06F2209/507Y02D10/22Y02D10/34
    • A method, system and program are provided for dynamically assigning priority values to instruction threads in a computer system based on one or more predetermined thread performance tests, and using the assigned instruction priorities to determine how resources are used in the system. By storing the assigning priority values for each thread as a tag in the thread's instructions, tagged instructions from different threads that are dispatched through the system are allocated system resources based on the tagged priority values assigned to the respective instruction threads. Priority values for individual threads may be updated with control software which tests thread performance and uses the test results to apply predetermined adjustment policies. The test results may be used to optimize the workload allocation of system resources by dynamically assigning thread priority values to individual threads using any desired policy, such as achieving thread execution balance relative to thresholds and to performance of other threads, reducing thread response time, lowering power consumption, etc.
    • 提供了一种方法,系统和程序,用于基于一个或多个预定的线程性能测试来动态地为计算机系统中的指令线程分配优先级值,并且使用所分配的指令优先级来确定如何在系统中使用资源。 通过将每个线程的分配优先级值作为标签存储在线程的指令中,基于分配给各个指令线程的标记的优先级值来分配来自系统调度的来自不同线程的标记指令。 可以使用测试线程性能的控制软件更新各个线程的优先级值,并使用测试结果来应用预定的调整策略。 测试结果可用于通过使用任何期望的策略动态地将线程优先级值分配给各个线程来优化系统资源的工作量分配,例如实现相对于阈值的线程执行平衡以及其他线程的性能,减少线程响应时间,降低 功耗等
    • 6. 发明授权
    • Performance of processors is improved by limiting number of branch prediction levels
    • 通过限制分支预测级别的数量来提高处理器的性能
    • US09582284B2
    • 2017-02-28
    • US13308696
    • 2011-12-01
    • Robert H. Bell, Jr.Wen-Tzer T. Chen
    • Robert H. Bell, Jr.Wen-Tzer T. Chen
    • G06F9/38G06F11/30
    • G06F9/3844G06F9/3842G06F11/30G06F11/3024G06F11/3409G06F2201/81
    • A method utilizes information provided by performance monitoring hardware to dynamically adjust the number of levels of speculative branch predictions allowed (typically 3 or 4 per thread) for a processor core. The information includes cycles-per-instruction (CPI) for the processor core and number of memory accesses per unit time. If the CPI is below a CPI threshold; and the number of memory accesses (NMA) per unit time is above a prescribed threshold, the number of levels of speculative branch predictions is reduced per thread for the processor core. Likewise, the number of levels of speculative branch predictions could be increased, from a low level to maximum allowed, if the CPI threshold is exceeded or the number of memory accesses per unit time is below the prescribed threshold.
    • 一种方法利用由性能监视硬件提供的信息来动态调整对于处理器核心允许的推测分支预测级别(通常为每线程3或4个)。 该信息包括处理器核心的每个指令周期(CPI)和每单位时间的存储器访问次数。 如果CPI低于CPI阈值; 并且每单位时间的存储器访问次数(NMA)高于规定的阈值,则对于处理器核,每个线程的推测分支预测的级别数量减少。 同样地,如果超过CPI阈值或每单位时间的存储器访问次数低于规定的阈值,则可以将推测分支预测的级数从低级别增加到允许的最大级别。
    • 9. 发明授权
    • Dynamic prioritization of cache access
    • 高速缓存访​​问的动态优先级
    • US08769210B2
    • 2014-07-01
    • US13323076
    • 2011-12-12
    • Robert H. Bell, Jr.Hong L. HuaWilliam A. MaronMysore S. Srinivas
    • Robert H. Bell, Jr.Hong L. HuaWilliam A. MaronMysore S. Srinivas
    • G06F12/08
    • G06F12/0815
    • Some embodiments of the inventive subject matter are directed to a cache comprising a tracking unit and cache state machines. In some embodiments, the tracking unit is configured to track an amount of cache resources used to service cache misses within a past period. In some embodiments, each of the cache state machines is configured to, determine whether a memory access request results in a cache miss or cache hit, and in response to a cache miss for a memory access request, query the tracking unit for the amount of cache resources used to service cache misses within the past period. In some embodiments, the each of the cache state machines is configured to service the memory access request based, at least in part, on the amount of cache resources used to service the cache misses within the past period according to the tracking unit.
    • 本发明主题的一些实施例涉及包括跟踪单元和高速缓存状态机的高速缓存。 在一些实施例中,跟踪单元被配置为跟踪用于在过去时间段内服务高速缓存未命中的高速缓存资源的量。 在一些实施例中,每个高速缓存状态机被配置为,确定存储器访问请求是否导致高速缓存未命中或高速缓存命中,并且响应于存储器访问请求的高速缓存未命中,查询跟踪单元的数量 用于在过去一段时间内缓存未命中服务的缓存资源。 在一些实施例中,每个高速缓存状态机被配置为至少部分地基于用于根据跟踪单元在过去时段内服务高速缓存未命中的高速缓存资源的量来服务存储器访问请求。