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1. 发明授权

US06415293B1 Memory device including an associative memory for the storage of data belonging to a plurality of classes 失效
标题翻译：存储装置包括用于存储属于多个类的数据的关联存储器
公开(公告)号：US06415293B1
公开(公告)日：2002-07-02
申请号：US09023151
申请日：1998-02-12
申请人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
发明人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
IPC分类号： G06F1204
CPC分类号： G06F17/30985 , G11C15/046 , Y10S707/961 , Y10S707/99945
摘要： A memory device having an associative memory for the storage of data belonging to a plurality of classes. The associative memory has a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row has a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class has data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.
摘要翻译：具有用于存储属于多个类别的数据的关联存储器的存储器件。关联存储器具有沿着行和列对准的多个存储器位置，用于沿行存储数据。每个存储器行具有多组存储单元，每组存储相应的数据，其中沿同一行相邻的存储单元组存储属于不同类的数据。在列方向上相邻并且位于不同行上的存储器组的组存储属于同一类的数据。每个类具有不同的最大长度的数据。该装置特别适用于存储属于用于自动识别书面文本中的词典的字典的单词。

2. 发明授权

US06748390B2 Associative memory device with optimized occupation, particularly for the recognition of words 有权
标题翻译：关联存储器件具有优化的占位特别用于识别字
公开(公告)号：US06748390B2
公开(公告)日：2004-06-08
申请号：US10137109
申请日：2002-04-30
申请人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
发明人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
IPC分类号： G06F1730
CPC分类号： G06F17/30985 , G11C15/046 , Y10S707/961 , Y10S707/99945
摘要： A memory device having an associative memory for the storage of data belonging to a plurality of classes. The associative memory has a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row has a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class has data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.
摘要翻译：具有用于存储属于多个类别的数据的关联存储器的存储器件。关联存储器具有沿着行和列对准的多个存储器位置，用于沿行存储数据。每个存储器行具有多组存储单元，每组存储相应的数据，其中沿同一行相邻的存储单元组存储属于不同类的数据。在列方向上相邻并且位于不同行上的存储器组的组存储属于同一类的数据。每个类具有不同的最大长度的数据。该装置特别适用于存储属于用于自动识别书面文本中的词典的字典的单词。

3. 发明授权

US06512851B2 Word recognition device and method 有权
公开(公告)号：US06512851B2
公开(公告)日：2003-01-28
申请号：US09974290
申请日：2001-10-09
申请人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
发明人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
IPC分类号： G06K972
CPC分类号： G06F17/30985 , G11C15/046 , Y10S707/99936
摘要： A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.

4. 发明授权

US06442295B2 Word recognition device and method 失效
标题翻译：词识别装置及方法
公开(公告)号：US06442295B2
公开(公告)日：2002-08-27
申请号：US09022666
申请日：1998-02-12
申请人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
发明人： Loris Navoni , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Alan Kramer , Pierluigi Rolandi
IPC分类号： G06K972
CPC分类号： G06F17/30985 , G11C15/046 , Y10S707/99936
摘要： A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.
摘要翻译：字识别装置使用关联存储器来存储多个编码字，使得权重与存储字的字母表的每个字符相关联，其中相等的权重对应于相等的字符。要进行识别，首先选择字典; 根据预先确定的代码将其存储在关联存储器中; 接收与要识别的字对应的一串字符; 与所接收的字符串对应的权重序列被提供给关联存储器; 要被识别的单词和至少一些所存储的单词之间的距离被并行计算为要被识别的单词的每个字符的权重与所存储的单词的每个字符的权重之差的总和; 确定最小距离; 存储具有最小距离的关联存储器中存储的字。

5. 发明授权

US5990816A Digital-to-analog current converter employing floating gate MOS transistors 失效
标题翻译：采用浮栅MOS晶体管的数模转换电流转换器
公开(公告)号：US5990816A
公开(公告)日：1999-11-23
申请号：US940803
申请日：1997-09-30
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Philip Leong , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Philip Leong , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： H03M1/74 , H03M1/00
CPC分类号： H03M1/74
摘要： The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals and an output for an analog signal. It comprises a current amplification circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs and having their source terminals coupled together and to a first reference of potential. The converter has drain terminals coupled together and to the input of the amplification circuit, and has control terminals coupleable, under control from the inputs of the plurality, to different references of potential having selected fixed values.
摘要翻译：本发明涉及具有用于数字信号的多个输入和用于模拟信号的输出的数模转换器。它包括具有耦合到转换器输出的输入和输出的电流放大电路，以及对应于多个转换器输入并且其源极端子耦合在一起并具有第一潜在参考电压的多个浮置栅极MOS晶体管。该转换器具有耦合到放大电路的输入端的漏极端子，并且在多个输入端的控制下具有可耦合的控制端子到具有选定的固定值的不同的电位基准。

6. 发明授权

US5973949A Input structure for analog or digital associative memories 失效
标题翻译：模拟或数字关联存储器的输入结构
公开(公告)号：US5973949A
公开(公告)日：1999-10-26
申请号：US941879
申请日：1997-09-30
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： G11C15/00 , G11C15/04
CPC分类号： G11C15/00 , G11C15/046
摘要： An input structure for associative memories, including an array of elementary cells, a number of input lines, a number of output lines, a number of address lines, and a number of enable lines. Each elementary cell is formed by a D flip-flop having a data input coupled to one of the address lines and an enable input coupled to one of the enable lines, and by a switch coupled between an input line and an output line, and having a control input coupled to the output of a respective latch to selectively couple the respective input line and output line according to the data stored in the latch.
摘要翻译：一种用于关联存储器的输入结构，包括基本单元阵列，输入线数量，输出线数量，地址线数量以及使能线数。每个单元由D触发器形成，D触发器具有耦合到一个地址线的数据输入和耦合到使能线之一的使能输入，以及耦合在输入线和输出线之间的开关，并且具有耦合到相应锁存器的输出的控制输入，以根据存储在锁存器中的数据选择性地耦合相应的输入线和输出线。

7. 发明授权

US5952946A Digital-to-analog charge converter employing floating gate MOS transisitors 失效
标题翻译：采用浮栅MOS晶体管的数模转换电荷转换器
公开(公告)号：US5952946A
公开(公告)日：1999-09-14
申请号：US941881
申请日：1997-09-30
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： H03M1/80 , H03M1/66
CPC分类号： H03M1/802
摘要： The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals, and an output for an analog signal. It also contains a charge integration circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs, the MOS transistors all having their source and drain terminals coupled together and to the input of the integration circuit, and having control terminals coupleable, under control from the plurality of inputs of digital signals, to different reference voltages having selected fixed values.
摘要翻译：本发明涉及具有用于数字信号的多个输入和用于模拟信号的输出的数模转换器。它还包含具有耦合到转换器输出的输入和输出的电荷积分电路，以及与多个转换器输入相对应的多个浮置栅极MOS晶体管，所述MOS晶体管的源极和漏极端子都耦合在一起并连接到输入积分电路，并且在多个数字信号输入的控制下使控制端可耦合到具有选定的固定值的不同参考电压。

8. 发明授权

US5901085A Programmable reference voltage source, particularly for analog memories 失效
标题翻译：可编程参考电压源，特别适用于模拟存储器
公开(公告)号：US5901085A
公开(公告)日：1999-05-04
申请号：US941880
申请日：1997-09-30
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： G11C16/06 , G05F1/56 , G11C27/00 , G11C16/04
CPC分类号： G11C27/005
摘要： A programmable reference voltage source includes a nonvolatile memory cell, the floating-gate region of which stores electric charges determining a memorized threshold value. The drain terminal of the cell is biased at a constant voltage, and the source terminal is coupled to a constant-current source and to the inverting input of an operational amplifier having the noninverting input coupled to a reference voltage and the output coupled to the gate terminal of the cell. By defining the threshold of the cell as the gate voltage (measured with respect to ground) capable of causing the cell to be flown by the current set by the current source, the output voltage of the operational amplifier equals the threshold and may be used as a programmable reference in analog memories.
摘要翻译：可编程参考电压源包括非易失性存储单元，其浮动栅极区域存储确定存储的阈值的电荷。电池的漏极端子以恒定电压被偏置，并且源极端子耦合到恒定电流源和运算放大器的反相输入端，该运算放大器具有耦合到参考电压的非反相输入端，耦合到栅极的输出端终端的单元格。通过将电池的阈值定义为能够使电池流过由电流源设定的电流的栅极电压（相对于地测量），运算放大器的输出电压等于阈值，并且可以用作模拟存储器中的可编程参考。

9. 发明授权

US6014044A Voltage comparator with floating gate MOS transistor 失效
标题翻译：具有浮动栅极MOS晶体管的电压比较器
公开(公告)号：US6014044A
公开(公告)日：2000-01-11
申请号：US960186
申请日：1997-10-29
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Philip Leong , Marco Onorato , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Philip Leong , Marco Onorato , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： H03K5/08 , H03K19/00 , H03M1/36 , H03M1/46 , H03K5/153
CPC分类号： H03K5/08 , H03K19/0027 , H03M1/36 , H03M1/46
摘要： This invention relates to a voltage comparator with an input for an analog signal and an output for a digital signal, comprising an inverter which has an input coupled to the comparator input and an output coupled to the comparator output, and comprising at least two MOS transistors coupled to each other, at least one of the two MOS transistors being of the floating gate type.
摘要翻译：本发明涉及具有用于模拟信号和数字信号的输出的电压比较器，包括一个反相器，该反相器具有耦合到比较器输入的输入端和耦合到该比较器输出的输出，并且包括至少两个MOS晶体管彼此耦合，两个MOS晶体管中的至少一个是浮栅型。

10. 发明授权

US5946235A Floating gate MOS transistor charge injection circuit and computation devices incorporating it 失效
标题翻译：浮栅MOS晶体管电荷注入电路和结合其的计算器件
公开(公告)号：US5946235A
公开(公告)日：1999-08-31
申请号：US940278
申请日：1997-09-30
申请人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
发明人： Alan Kramer , Roberto Canegallo , Mauro Chinosi , Giovanni Gozzini , Pier Luigi Rolandi , Marco Sabatini
IPC分类号： G06G7/26 , G06N3/063 , G11C16/04
CPC分类号： G11C16/0441 , G06G7/26 , G06N3/0635
摘要： The charge injection circuit of this invention comprises at least one pair of floating gate MOS transistors having source and drain terminals which are coupled together and to an injection node, and at least one corresponding pair of generators of substantially step-like voltage signals having an initial value and a final value, and having outputs respectively coupled to the control terminals of said transistors. The signal generators are such that the initial value of a first of the signals is substantially the equal of the final value of a second of the signals, and that the final value of the first signal is substantially the equal of the initial value of the second signal.
摘要翻译：本发明的电荷注入电路包括至少一对浮置栅极MOS晶体管，其具有耦合在一起并且连接到注入节点的源极和漏极端子以及具有基本上阶梯状电压信号的至少一对相应的发生器，其具有初始值和最终值，并且具有分别耦合到所述晶体管的控制端子的输出。信号发生器使得第一信号的初始值基本上等于第二信号的最终值，并且第一信号的最终值基本上等于第二信号的初始值信号。

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