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1. 发明授权

US06545906B1 Method of writing to scalable magnetoresistance random access memory element 有权
标题翻译：写入可伸缩磁阻随机存取存储元件的方法
公开(公告)号：US06545906B1
公开(公告)日：2003-04-08
申请号：US09978859
申请日：2001-10-16
申请人： Leonid Savtchenko , Bradley N. Engel , Nicholas D. Rizzo , Mark F. Deherrera , Jason Allen Janesky
发明人： Leonid Savtchenko , Bradley N. Engel , Nicholas D. Rizzo , Mark F. Deherrera , Jason Allen Janesky
IPC分类号： G11C1100
CPC分类号： G11C11/16 , G11C11/161 , G11C11/1675
摘要： A method to switch a scalable magnetoresistive memory cell including the steps of providing a magnetoresistive memory device sandwiched between a word line and a digit line so that current waveforms can be applied to the word and digit lines at various times to cause a magnetic field flux to rotate the effective magnetic moment vector of the device by approximately 180°. The magnetoresistive memory device includes N ferromagnetic layers that are anti-ferromagnetically coupled. N can be adjusted to change the magnetic switching volume of the device.
摘要翻译：一种用于切换可扩展磁阻存储单元的方法，包括以下步骤：提供夹在字线和数字线之间的磁阻存储器件，使得可以在不同时间将电流波形施加到字和数字线，以使磁场通量将器件的有效磁矩矢量旋转大约180°。磁阻存储器件包括反铁磁耦合的N个铁磁层。可以调节N以改变设备的磁性开关量。

2. 发明授权

US06531723B1 Magnetoresistance random access memory for improved scalability 失效
标题翻译：磁阻随机存取存储器可提高可扩展性
公开(公告)号：US06531723B1
公开(公告)日：2003-03-11
申请号：US09978860
申请日：2001-10-16
申请人： Bradley N. Engel , Leonid Savtchenko , Jason Allen Janesky , Nicholas D. Rizzo
发明人： Bradley N. Engel , Leonid Savtchenko , Jason Allen Janesky , Nicholas D. Rizzo
IPC分类号： H01L31072
CPC分类号： B82Y25/00 , B82Y40/00 , G11C11/15 , G11C11/16 , H01F10/3254 , H01F10/3268 , H01F41/302 , H01L43/08
摘要： A scalable magnetoresistive tunneling junction memory cell comprising a fixed ferromagnetic region having a magnetic moment vector fixed in a preferred direction in the absence of an applied magnetic field, an electrically insulating material positioned on the fixed ferromagnetic region to form a magnetoresistive tunneling junction, and a free ferromagnetic region having a magnetic moment vector oriented in a position parallel or anti-parallel to that of the fixed ferromagnetic region. The free ferromagnetic region includes N ferromagnetic layers that are anti-ferromagnetically coupled, where N is an integer greater than or equal to two. The number N of ferromagnetic layers can be adjusted to increase the effective magnetic switching volume of the MRAM device.
摘要翻译：一种可扩展的磁阻隧道结存储单元，包括在没有施加的磁场的情况下具有固定在优选方向上的磁矩向量的固定铁磁区域，位于固定铁磁区上的电绝缘材料以形成磁阻隧道结，以及具有定向在与固定铁磁性区域平行或反平行的位置的磁矩矢量的自由铁磁区域。自由铁磁区域包括反铁磁耦合的N个铁磁层，其中N是大于或等于2的整数。可以调节铁磁层数N，以增加MRAM器件的有效磁开关量。

3. 发明授权

US07235408B2 Synthetic antiferromagnetic structure for magnetoelectronic devices 失效
标题翻译：用于磁电子器件的合成反铁磁结构
公开(公告)号：US07235408B2
公开(公告)日：2007-06-26
申请号：US11075587
申请日：2005-03-09
申请人： Jason Allen Janesky , Bradley N. Engel , Nicholas D. Rizzo , Jon M Slaughter
发明人： Jason Allen Janesky , Bradley N. Engel , Nicholas D. Rizzo , Jon M Slaughter
IPC分类号： H01L21/00
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , B82Y40/00 , G01R33/093 , G11C11/16 , H01F10/3254 , H01F10/3272 , H01F41/302 , H01L43/12
摘要： A nearly balanced synthetic antiferromagnetic (SAF) structure that can be advantageously used in magnetoelectronic devices such as a magnetoresistive memory cell includes two ferromagnetic layers and an antiferromagnetic coupling layer separating the two ferromagnetic layers. The SAF free layer has weakly coupled regions formed in the antiferromagnetic coupling layer by a treatment such as annealing, layering of the antiferromagnetic coupling layer, or forming the antiferromagnetic coupling layer over a roughened surface of a ferromagnetic layer. The weakly coupled regions lower the flop field of the SAF free layer in comparison to untreated SAF free layers. The SAF flop is used during the write operation of such a structure and its reduction results in lower power consumption during write operations and correspondingly increased device performance.
摘要翻译：可以有利地用于诸如磁阻存储器单元的磁电子器件中的几乎平衡的合成反铁磁（SAF）结构包括两个铁磁层和分离两个铁磁层的反铁磁耦合层。 SAF自由层通过诸如退火，反铁磁耦合层的分层或在铁磁层的粗糙表面上形成反铁磁耦合层的处理，在反铁磁耦合层中形成弱耦合区域。与未处理的SAF自由层相比，弱耦合区域降低了SAF自由层的触发场。在这种结构的写入操作期间使用SAF触发器，并且其减少导致在写入操作期间较低的功耗并且相应地增加器件性能。

4. 发明授权

US06720597B2 Cladding of a conductive interconnect for programming a MRAM device using multiple magnetic layers 失效
标题翻译：用于使用多个磁性层编程MRAM器件的导电互连的包层
公开(公告)号：US06720597B2
公开(公告)日：2004-04-13
申请号：US10010363
申请日：2001-11-13
申请人： Jason Allen Janesky , Nicholas D. Rizzo , Bradley N. Engel
发明人： Jason Allen Janesky , Nicholas D. Rizzo , Bradley N. Engel
IPC分类号： H01L2976
CPC分类号： H01L27/222 , G11C11/16
摘要： A cladded conductive interconnect for programming a magnetoresistive memory device which includes a conductive material with a length, a first barrier conductive material positioned on the conductive material, and a multi-layer cladding region positioned along the length of the conductive material wherein the multi-layer cladding region includes N ferromagnetic layers, where N is a whole number greater than or equal to two, and wherein the multi-layer cladding region further includes at least one spacer layer, wherein the spacer layer can include a metal, an insulator, or an exchange interaction material, and wherein the spacer layer is sandwiched therebetween each adjacent ferromagnetic layer.
摘要翻译：一种用于编程磁阻存储器件的包覆导电互连件，其包括具有长度的导电材料，位于导电材料上的第一阻挡导电材料，以及沿导电材料的长度定位的多层包覆区域，其中多层包层区域包括N个铁磁层，其中N是大于或等于2的整数，并且其中所述多层包覆区域还包括至少一个间隔层，其中所述间隔层可以包括金属，绝缘体或交换相互作用材料，并且其中间隔层夹在每个相邻的铁磁层之间。

5. 发明授权

US06898112B2 Synthetic antiferromagnetic structure for magnetoelectronic devices 失效
标题翻译：用于磁电子器件的合成反铁磁结构
公开(公告)号：US06898112B2
公开(公告)日：2005-05-24
申请号：US10322979
申请日：2002-12-18
申请人： Jason Allen Janesky , Bradley N. Engel , Nicholas D. Rizzo , Jon M. Slaughter
发明人： Jason Allen Janesky , Bradley N. Engel , Nicholas D. Rizzo , Jon M. Slaughter
IPC分类号： G01R33/09 , G11C11/16 , H01F10/32 , H01F41/30 , G11C11/00
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , B82Y40/00 , G01R33/093 , G11C11/16 , H01F10/3254 , H01F10/3272 , H01F41/302 , H01L43/12
摘要： A nearly balanced synthetic antiferromagnetic (SAF) structure that can be advantageously used in magnetoelectronic devices such as a magnetoresistive memory cell includes two ferromagnetic layers and an antiferromagnetic coupling layer separating the two ferromagnetic layers. The SAF free layer has weakly coupled regions formed in the antiferromagnetic coupling layer by a treatment such as annealing, layering of the antiferromagnetic coupling layer, or forming the antiferromagnetic coupling layer over a roughened surface of a ferromagnetic layer. The weakly coupled regions lower the flop field of the SAF free layer in comparison to untreated SAF free layers. The SAF flop is used during the write operation of such a structure and its reduction results in lower power consumption during write operations and correspondingly increased device performance.
摘要翻译：可以有利地用于诸如磁阻存储器单元的磁电子器件中的几乎平衡的合成反铁磁（SAF）结构包括两个铁磁层和分离两个铁磁层的反铁磁耦合层。 SAF自由层通过诸如退火，反铁磁耦合层的分层或在铁磁层的粗糙表面上形成反铁磁耦合层的处理，在反铁磁耦合层中形成弱耦合区域。与未处理的SAF自由层相比，弱耦合区域降低了SAF自由层的触发场。在这种结构的写入操作期间使用SAF触发器，并且其减少导致在写入操作期间较低的功耗并且相应地增加器件性能。

6. 发明授权

US06633498B1 Magnetoresistive random access memory with reduced switching field 失效
标题翻译：具有减少开关场的磁阻随机存取存储器
公开(公告)号：US06633498B1
公开(公告)日：2003-10-14
申请号：US10173907
申请日：2002-06-18
申请人： Bradley N. Engel , Jason Allen Janesky , Nicholas D. Rizzo
发明人： Bradley N. Engel , Jason Allen Janesky , Nicholas D. Rizzo
IPC分类号： G11C1100
CPC分类号： G11C11/16
摘要： A magnetoresistive tunneling junction memory cell (10) including a pinned ferromagnetic region (17) having a magnetic moment vector (47) fixed in a preferred direction in the absence of an applied magnetic field wherein the pinned ferromagnetic region has a magnetic fringing field (96), an electrically insulating material positioned on the pinned ferromagnetic region to form a magnetoresistive tunneling junction (16), and a free ferromagnetic region (15) having a magnetic moment vector (53) oriented in a position parallel or anti-parallel to that of the pinned ferromagnetic region wherein the magnetic fringing field is chosen to obtain a desired switching field.
摘要翻译：包括磁矩矢量（ 10 ）的磁阻隧道结存储单元（ 10 ）包括固定铁磁区域（ 17 在不存在所施加的磁场的情况下固定在优选方向上的HIL> 47 ，其中固定的铁磁区域具有磁性边缘场（ 96 PDAT>），位于被钉扎的铁磁区域上以形成磁阻隧道结（ 16 ）的电绝缘材料和自由铁磁区域（ 15 具有定向在与被钉扎的铁磁区域平行或反平行的位置的磁矩矢量（ 53 ）的位置，其中磁性边缘场被选择以获得期望的切换字段。

7. 发明授权

US06430084B1 Magnetic random access memory having digit lines and bit lines with a ferromagnetic cladding layer 失效
标题翻译：磁性随机存取存储器具有带铁磁覆层的数字线和位线
公开(公告)号：US06430084B1
公开(公告)日：2002-08-06
申请号：US09940263
申请日：2001-08-27
申请人： Nicholas D. Rizzo , Mark F. DeHerrera , Bradley N. Engel
发明人： Nicholas D. Rizzo , Mark F. DeHerrera , Bradley N. Engel
IPC分类号： G11C1115
CPC分类号： G11C11/5607 , G11C11/16 , H01L27/222
摘要： A magneto-electronic component includes an electrically conductive layer for generating a magnetic field, a ferromagnetic cladding layer adjacent to the electrically conductive layer, and an antiferromagnetic layer adjacent to the ferromagnetic cladding layer.
摘要翻译：磁电子部件包括用于产生磁场的导电层，与导电层相邻的铁磁性包层，以及与铁磁性包覆层相邻的反铁磁层。

8. 发明授权

US06909631B2 MRAM and methods for reading the MRAM 有权
标题翻译： MRAM和读取MRAM的方法
公开(公告)号：US06909631B2
公开(公告)日：2005-06-21
申请号：US10679134
申请日：2003-10-02
申请人： Mark A. Durlam , Thomas W. Andre , Mark F. DeHerrera , Bradley N. Engel , Bradley J. Garni , Joseph J. Nahas , Nicholas D. Rizzo , Saied Tehrani
发明人： Mark A. Durlam , Thomas W. Andre , Mark F. DeHerrera , Bradley N. Engel , Bradley J. Garni , Joseph J. Nahas , Nicholas D. Rizzo , Saied Tehrani
IPC分类号： G11C11/15 , G11C11/16 , G11C11/14
CPC分类号： G11C11/16 , G11C11/15
摘要： An MRAM is provided that minimizes the limits in MRAM density imposed by utilization of an isolation or select device in each memory cell. In addition, methods are provided for reading an MTJ in a ganged memory cell of the MRAM. The method includes determining an electrical value that is at least partially associated with a resistance of a ganged memory cell of the MRAM. The MTJ in the ganged memory cell is toggled and a second electrical value, which is at least partially associated with the resistance of the ganged memory cell, is determined after toggling the MTJ. Once the electrical value prior to the toggling and after the toggling is determined, the difference between the two electrical values is analyzed to determine the value of the MTJ.
摘要翻译：提供了一种MRAM，其通过利用每个存储单元中的隔离或选择装置来最小化MRAM密度的限制。另外，提供了用于读取MRAM的联动存储单元中的MTJ的方法。该方法包括确定至少部分地与MRAM的联动存储器单元的电阻相关联的电气值。切换联合存储器单元中的MTJ，并且在切换MTJ之后确定至少部分地与组合存储器单元的电阻相关联的第二电值。一旦确定了切换之前和切换之后的电气值，则分析两个电气值之间的差异，以确定MTJ的值。

9. 发明授权

US06956763B2 MRAM element and methods for writing the MRAM element 失效
标题翻译： MRAM元素和写入MRAM元素的方法
公开(公告)号：US06956763B2
公开(公告)日：2005-10-18
申请号：US10609288
申请日：2003-06-27
申请人： Bengt J. Akerman , Mark F. Deherrera , Bradley N. Engel , Nicholas D. Rizzo
发明人： Bengt J. Akerman , Mark F. Deherrera , Bradley N. Engel , Nicholas D. Rizzo
IPC分类号： G11C11/155 , G11C11/00
CPC分类号： G11C11/155
摘要： A direct write is provided for a magnetoelectronics information device that includes producing a first magnetic field with a first field magnitude in proximity to the magnetoelectronics information device at a first time (t1). Once this first magnetic field with the first magnitude is produced, a second magnetic field with a second field magnitude is produced in proximity to the magnetoelectronics information device at a second time (t2). The first magnetic field is adjusted to provide a third magnitude at a third time (t3) that is less than the first field magnitude and greater than zero, and the second magnetic field is adjusted to provide a fourth field magnitude at a fourth time (t4) that is less than the second field magnitude. This direct write is used in conjunction with other direct writes and also in combination with toggle writes to write the MRAM element without an initial read.
摘要翻译：提供了一种用于磁电子信息设备的直接写入，其包括在第一时间（t 1> 1）处产生具有接近磁电子信息器件的第一场强的第一磁场。一旦产生具有第一幅度的第一磁场，则在第二时间（t 2> 2）处产生具有第二磁场强度的第二磁场，靠近磁电子信息装置。第一磁场被调整以在小于第一场幅度并大于零的第三时间（t 3/3）处提供第三幅度，并且调整第二磁场以提供第四磁场小于第二场强的第四时间（t> 4 ）的场强。这种直接写入与其他直接写入一起使用，并且与切换写入组合使用以写入MRAM元素而不进行初始读取。

10. 发明授权

US06888743B2 MRAM architecture 有权
标题翻译： MRAM架构
公开(公告)号：US06888743B2
公开(公告)日：2005-05-03
申请号：US10331058
申请日：2002-12-27
申请人： Mark A. Durlam , Thomas W. Andre , Brian R. Butcher , Mark F. Deherrera , Bradley N. Engel , Bradley J. Garni , Gregory W. Grynkewich , Joseph J. Nahas , Nicholas D. Rizzo , Saied Tehrani , Clarance J. Tracy
发明人： Mark A. Durlam , Thomas W. Andre , Brian R. Butcher , Mark F. Deherrera , Bradley N. Engel , Bradley J. Garni , Gregory W. Grynkewich , Joseph J. Nahas , Nicholas D. Rizzo , Saied Tehrani , Clarance J. Tracy
IPC分类号： G11C11/15 , G11C11/02
CPC分类号： G11C11/16
摘要： An MRAM architecture is provided that reduces the number of isolation transistors. The MRAM architecture includes magnetoresistive memory cells that are electrically coupled to form a ganged memory cell. The magnetoresistive memory cells of the ganged memory cell are formed with Magnetic Tunnel Junctions (MTJs) and formed without isolation devices, such as isolation transistors, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells. Preferably, the magnetoresistive memory cells of the ganged memory cell only include MTJs, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells.
摘要翻译：提供了一种减少隔离晶体管数量的MRAM架构。 MRAM架构包括电耦合以形成有组合的存储单元的磁阻存储单元。组合存储单元的磁阻存储单元由磁隧道结（MTJ）形成，并且形成为没有隔离器件，例如隔离晶体管，并且编程线和位线与每个磁阻存储器单元相邻。优选地，联动存储单元的磁阻存储单元仅包括MTJ，并且编程线和位线与每个磁阻存储单元相邻。

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