专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6057063A Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith 失效
标题翻译：相移掩模设计系统，相移掩模和用其制造的VLSI电路器件
公开(公告)号：US6057063A
公开(公告)日：2000-05-02
申请号：US824700
申请日：1997-04-14
申请人： Lars W. Liebmann , Ioana C. Graur , Young O. Kim , Mark A. Lavin , Alfred K. Wong
发明人： Lars W. Liebmann , Ioana C. Graur , Young O. Kim , Mark A. Lavin , Alfred K. Wong
IPC分类号： G03F1/00 , G06F17/50 , G03F9/00
CPC分类号： G06F17/5068 , G03F1/26
摘要： A process for creating and verifying a design of phase-shifted masks utilizing at least one phase shift region employing a computer-aided design system. A chip design is provided. A phase-shift mask design capable of producing the chip design is created. Features in a design of the phase-shifted mask that require phase shifting are located. Uncolored phase regions are created on opposite sides of the features. Proper phase termination of the phase regions is ensured based upon space constraints of a phase-shifted mask technique utilized. Phases are determined for the phase regions. Whether coloring errors and un-phase-shiftable design features exist is determined. Mask process specific overlaps and expansions are applied to the mask design to prepare designed data levels for mask manufacture. A residual phase edge image removal design is derived.
摘要翻译：利用采用计算机辅助设计系统的至少一个相移区域来创建和验证相移掩模的设计的过程。提供芯片设计。产生了能够产生芯片设计的相移掩模设计。定位需要相移的相移掩模设计中的特征。未着色的相位区域在特征的相对侧上创建。基于所采用的相移掩模技术的空间限制，确保相位区域的正确相位终止。确定相位区域的相位。是否存在着色误差和不相移设计特征。掩模过程特定的重叠和扩展被应用于掩模设计以准备用于掩模制造的设计的数据级。导出残留相边缘图像去除设计。

2. 发明授权

US06578190B2 Process window based optical proximity correction of lithographic images 有权
公开(公告)号：US06578190B2
公开(公告)日：2003-06-10
申请号：US09759013
申请日：2001-01-11
申请人： Richard A. Ferguson , Mark A. Lavin , Lars W. Liebmann , Alfred K. Wong
发明人： Richard A. Ferguson , Mark A. Lavin , Lars W. Liebmann , Alfred K. Wong
IPC分类号： G06F1750
CPC分类号： G03F1/70 , G03F1/36
摘要： A method of creating a pattern for a mask adapted for use in lithographic production of features on a substrate. The method comprises initially providing a mask pattern of a feature to be created on the substrate using the mask. The method then includes establishing target dimensional bounds of the pattern, determining simulated achievable dimensional bounds of the pattern, comparing the target dimensional bounds of the pattern to the simulated achievable dimensional bounds of the pattern, and determining locations where the simulated achievable dimensional bounds of the pattern differ from the target dimensional bounds of the pattern. In its preferred embodiment, the feature is an integrated circuit to be lithographically produced on a semiconductor substrate.

3. 发明授权

US5883813A Automatic generation of phase shift masks using net coloring 失效
公开(公告)号：US5883813A
公开(公告)日：1999-03-16
申请号：US810844
申请日：1997-03-04
申请人： Young O. Kim , Mark A. Lavin , Lars W. Liebmann , Glenwood S. Weinert
发明人： Young O. Kim , Mark A. Lavin , Lars W. Liebmann , Glenwood S. Weinert
IPC分类号： G03F1/08 , G06F17/50 , H01L21/027 , G06K9/00
CPC分类号： G06F17/5068
摘要： According to the preferred embodiment, a method is provided for automatically coloring VLSI design elements for the purpose of assigning binary properties to the elements. The preferred method is particularly applicable for use generating phase shift mask designs from VLSI CAD datasets. The preferred method uses net coloring to automatically generate a data set of colored elements. The preferred method is not dependent on the order in which the elements are operated upon. The preferred method has the additional advantage of being able to automatically detect conflicts that prevent the VLSI design from being optimally colored. The preferred method is equally applicable to hierarchical VLSI databases with nested components and traditional flat databases. When applied the hierarchical databases, the preferred method provides element coloring with minimal data flattening required.

4. 发明授权

US07687207B2 System for coloring a partially colored design in an alternating phase shift mask 失效
标题翻译：用于在交替相移掩模中着色部分着色设计的系统
公开(公告)号：US07687207B2
公开(公告)日：2010-03-30
申请号：US12121371
申请日：2008-05-15
申请人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
发明人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
IPC分类号： G03F1/00
CPC分类号： G03F1/30
摘要： A method of designing an alternating phase shifting mask for projecting an image of an integrated circuit design. Phase units are binary colorable within each unit of the hierarchical circuit design, e.g., cell, an array, a net, or array of nets and/or cells, the phase shapes. The assignment of phases or colors within a hierarchical unit will be correctly binary colored to satisfy the lithographic, manufacturability and other design rules, referred to collectively as coloring rules. During assembly with other units, the coloring of phases in a hierarchical unit may change (e.g., be reversed or flipped), but the correct binary colorability of a hierarchical unit is preserved, which simplifies assembly of the integrated circuit layout.
摘要翻译：一种设计用于投影集成电路设计的图像的交替相移掩模的方法。相位单元在分层电路设计的每个单元内，例如单元，阵列，网络或网络和/或单元阵列，可以是相位形状的二进制可着色。分层单元内的相位或颜色的分配将被正确地二进制着色以满足平版印刷，可制造性和其他设计规则，统称为着色规则。在与其他单元的组装期间，层级单元中的相位的着色可能改变（例如，被颠倒或翻转），但是保留了分层单元的正确的二值可着色性，这简化了集成电路布局的组装。

5. 发明授权

US07378195B2 System for coloring a partially colored design in an alternating phase shift mask 有权
标题翻译：用于在交替相移掩模中着色部分着色设计的系统
公开(公告)号：US07378195B2
公开(公告)日：2008-05-27
申请号：US10710224
申请日：2004-06-28
申请人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
发明人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
IPC分类号： G03F1/00
CPC分类号： G03F1/30
摘要： A method of designing an alternating phase shifting mask for projecting an image of an integrated circuit design. Phase units are binary colorable within each unit of the hierarchical circuit design, e.g., cell, an array, a net, or array of nets and/or cells, the phase shapes. The assignment of phases or colors within a hierarchical unit will be correctly binary colored to satisfy the lithographic, manufacturability and other design rules, referred to collectively as coloring rules. During assembly with other units, the coloring of phases in a hierarchical unit may change (e.g., be reversed or flipped), but the correct binary colorability of a hierarchical unit is preserved, which simplifies assembly of the integrated circuit layout.
摘要翻译：一种设计用于投影集成电路设计的图像的交替相移掩模的方法。相位单元在分层电路设计的每个单元内，例如单元，阵列，网络或网络和/或单元阵列，可以是相位形状的二进制可着色。分层单元内的相位或颜色的分配将被正确地二进制着色以满足平版印刷，可制造性和其他设计规则，统称为着色规则。在与其他单元的组装期间，层级单元中的相位的着色可能改变（例如，被颠倒或翻转），但是保留了分层单元的正确的二值可着色性，这简化了集成电路布局的组装。

6. 发明申请

US20080244503A1 System for Coloring a Partially Colored Design in an Alternating Phase Shift Mask 失效
标题翻译：用于在交替相移掩模中着色部分彩色设计的系统
公开(公告)号：US20080244503A1
公开(公告)日：2008-10-02
申请号：US12121371
申请日：2008-05-15
申请人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
发明人： Ioana Graur , Young O. Kim , Mark A. Lavin , Lars W. Liebmann
IPC分类号： G06F17/50
CPC分类号： G03F1/30
摘要： A method of designing an alternating phase shifting mask for projecting an image of an integrated circuit design. Phase units are binary colorable within each unit of the hierarchical circuit design, e.g., cell, an array, a net, or array of nets and/or cells, the phase shapes. The assignment of phases or colors within a hierarchical unit will be correctly binary colored to satisfy the lithographic, manufacturability and other design rules, referred to collectively as coloring rules. During assembly with other units, the coloring of phases in a hierarchical unit may change (e.g., be reversed or flipped), but the correct binary colorability of a hierarchical unit is preserved, which simplifies assembly of the integrated circuit layout.
摘要翻译：一种设计用于投影集成电路设计的图像的交替相移掩模的方法。相位单元在分层电路设计的每个单元内，例如单元，阵列，网络或网络和/或单元阵列，可以是相位形状的二进制可着色。分层单元内的相位或颜色的分配将被正确地二进制着色以满足平版印刷，可制造性和其他设计规则，统称为着色规则。在与其他单元的组装期间，层级单元中的相位的着色可能改变（例如，被颠倒或翻转），但是保留了分层单元的正确的二值可着色性，这简化了集成电路布局的组装。

7. 发明授权

US6066180A Automatic generation of phase shift masks using net coloring 有权
标题翻译：使用净色自动生成相移掩模
公开(公告)号：US6066180A
公开(公告)日：2000-05-23
申请号：US268414
申请日：1999-03-15
申请人： Young O. Kim , Mark A. Lavin , Lars W. Liebmann , Glenwood S. Weinert
发明人： Young O. Kim , Mark A. Lavin , Lars W. Liebmann , Glenwood S. Weinert
IPC分类号： G03F1/08 , G06F17/50 , H01L21/027 , G06K9/00
CPC分类号： G06F17/5068
摘要： According to the preferred embodiment, a method is provided for automatically coloring VLSI design elements for the purpose of assigning binary properties to the elements. The preferred method is particularly applicable for use generating phase shift mask designs from VLSI CAD datasets. The preferred method uses net coloring to automatically generate a data set of colored elements. The preferred method is not dependent on the order in which the elements are operated upon. The preferred method has the additional advantage of being able to automatically detect conflicts that prevent the VLSI design from being optimally colored. The preferred method is equally applicable to hierarchical VLSI databases with nested components and traditional flat databases. When applied the hierarchical databases, the preferred method provides element coloring with minimal data flattening required.
摘要翻译：根据优选实施例，提供了一种用于自动着色VLSI设计元件以便为元件分配二进制特性的方法。优选的方法特别适用于从VLSI CAD数据集产生相移掩模设计。首选方法使用净色来自动生成彩色元素的数据集。优选的方法不依赖于操作元件的顺序。优选的方法具有能够自动检测阻止VLSI设计被最佳着色的冲突的额外优点。优选的方法同样适用于具有嵌套组件和传统平面数据库的分层VLSI数据库。当应用分层数据库时，首选方法提供了元素着色，需要最少的数据平坦化。

8. 发明申请

US20090037866A1 ALTERNATING PHASE SHIFT MASK OPTIMIZATION FOR IMPROVED PROCESS WINDOW 审中-公开
标题翻译：改进过程窗口的相位移位掩码优化
公开(公告)号：US20090037866A1
公开(公告)日：2009-02-05
申请号：US11833462
申请日：2007-08-03
申请人： Ioana C. Graur , Donald J. Samuels , Zachary Baum , Lars W. Liebmann
发明人： Ioana C. Graur , Donald J. Samuels , Zachary Baum , Lars W. Liebmann
IPC分类号： G06F17/50
CPC分类号： G03F1/30
摘要： A method for designing alternating phase shift masks is provided, in which narrow phase shapes located between densely spaced design shapes are colored to allow a maximum amount of light transmission. After assigning and ensuring binary legalization of the phase shapes, the narrow phase shapes are assigned a color, such as 0° phase shift, that allows the more light transmission than the alternate or opposite color (e.g. 180° phase shift), which helps avoid printing errors such as resist scumming between closely spaced shapes, and maximizes the lithographic process window.
摘要翻译：提供了一种用于设计交替相移掩模的方法，其中位于密集间隔设计形状之间的窄相形状被着色以允许最大量的光透射。在分配并确保相位形状的二进制合法化之后，窄相位形状被赋予诸如0°相移的颜色，其允许比交替或相反颜色（例如180°相移）更多的光透射，这有助于避免打印错误，例如紧密间隔形状之间的抗污垢浮渣，并使光刻工艺窗口最大化。

9. 发明授权

US07115343B2 Pliant SRAF for improved performance and manufacturability 失效
标题翻译： Pliant SRAF，以提高性能和可制造性
公开(公告)号：US07115343B2
公开(公告)日：2006-10-03
申请号：US10708535
申请日：2004-03-10
申请人： Ronald L. Gordon , Ioana C. Graur , Lars W. Liebmann
发明人： Ronald L. Gordon , Ioana C. Graur , Lars W. Liebmann
IPC分类号： G03F9/00 , G06F17/50
CPC分类号： G03F1/36
摘要： A method for increasing coverage of subresolution assist features (SRAFs) in a layout. A set of possible SRAF placement and sizing rules for a given pitch is provided, ranked according to some figure of merit. During SRAF placement, the fit of a plurality of different SRAF solutions is successively evaluated to find the SRAF solution, or combinations thereof, which most improves lithographic performance while avoiding manufacturability problems. In general, the method comprises: obtaining a plurality of SRAF configurations for the layout; ranking the SRAF configurations based on a figure of merit; applying a highest ranked SRAF configuration to the layout; applying a predetermined number of lower ranked SRAF configurations to the layout; and selecting SRAF features from at least one of the applied SRAF configurations to provide the optimal SRAF configuration for the layout.
摘要翻译：一种用于增加布局中的分解辅助特征（SRAF）的覆盖的方法。提供了一组可能的SRAF放置和给定音调的大小调整规则，根据某些品质因素进行排名。在SRAF放置期间，连续地评估多个不同的SRAF解决方案的拟合，以找到最大程度上提高光刻性能同时避免可制造性问题的SRAF解决方案或其组合。通常，该方法包括：获得用于布局的多个SRAF配置; 基于品质因素对SRAF配置进行排名; 将最高排名的SRAF配置应用于布局; 将预定数量的较低排名的SRAF配置应用于所述布局; 以及从应用的SRAF配置中的至少一个选择SRAF特征以提供布局的最佳SRAF配置。

10. 发明授权

US06996797B1 Method for verification of resolution enhancement techniques and optical proximity correction in lithography 失效
标题翻译：用于光刻中分辨率增强技术和光学邻近校正的验证方法
公开(公告)号：US06996797B1
公开(公告)日：2006-02-07
申请号：US10904600
申请日：2004-11-18
申请人： Lars W. Liebmann , James A. Culp , Ioana C. Graur , Maharaj Mukherjee
发明人： Lars W. Liebmann , James A. Culp , Ioana C. Graur , Maharaj Mukherjee
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method for model-based verification of resolution enhancement techniques (RET) and optical proximity correction (OPC) in lithography includes scaling shapes of a drawn mask layout to their corresponding intended wafer dimensions so as to create a scaled image. A first feature of the scaled image is shifted with respect to a second feature thereof in accordance with a predetermined maximum overlay error. An intersection parameter of the first and said second features of the scaled image is calculated so as to determine a yield metric of an ideal layout. A first feature of a simulated wafer image is shifted with respect to a second feature thereof in accordance with the predetermined maximum overlay error. An intersection parameter of the first and said second features of the simulated wafer image is calculated so as to determine a yield metric of a simulated layout, and the yield metric of the simulated wafer image is compared to the yield metric of the scaled image.
摘要翻译：用于光刻中的分辨率增强技术（RET）和光学邻近校正（OPC）的基于模型的验证的方法包括将绘制的掩模布局的形状缩放到其相应的预期晶片尺寸，以便创建缩放图像。根据预定的最大重叠误差，缩放图像的第一特征相对于其第二特征偏移。计算缩放图像的第一和第二特征的交点参数，以便确定理想布局的屈服度量。模拟晶片图像的第一特征相对于其第二特征根据预定的最大重叠误差而偏移。计算模拟晶片图像的第一和第二特征的交叉参数，以便确定模拟布局的屈服度量，并将模拟晶片图像的屈服度量与缩放图像的屈服度量进行比较。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式