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1. 发明授权

US06831497B2 Active quadrature signal generator using load having low-pass and high-pass filter characteristics 失效
标题翻译：使用具有低通和高通滤波器特性的负载的有源正交信号发生器
公开(公告)号：US06831497B2
公开(公告)日：2004-12-14
申请号：US10179491
申请日：2002-06-24
申请人： Kwang Jin Koh , Hyun Kyu Yu
发明人： Kwang Jin Koh , Hyun Kyu Yu
IPC分类号： H03H1116
CPC分类号： H03B27/00 , H03B5/1209 , H03B5/1228 , H03B5/1231 , H03B5/1268 , H03B2201/0208
摘要： An active quadrature signal generator produces poly-phase quadrature signals necessary in high frequency transmit and receive elements of a communication system. The quadrature signals are produced using the phase difference between a load representing a low-pass filter characteristic and a load representing a high-pass filter characteristic and the quadrature signal is then used in the differential structure to produce amplified signal having 4 quadrature phases. The device can reduce a loss characteristic of the signal and additional power consumption for compensating for it in a common poly-phase quadrature filter having only conventional resistors and capacitor.
摘要翻译：有源正交信号发生器产生在通信系统的高频发射和接收元件中所需的多相正交信号。使用表示低通滤波器特性的负载和表示高通滤波器特性的负载之间的相位差产生正交信号，然后在差分结构中使用正交信号以产生具有4个正交相位的放大信号。该器件可以减少信号的损耗特性和额外的功耗，以便在仅具有常规电阻器和电容器的公共多相正交滤波器中进行补偿。

2. 发明授权

US09013347B2 Radar apparatus 有权
标题翻译：雷达装置
公开(公告)号：US09013347B2
公开(公告)日：2015-04-21
申请号：US13445102
申请日：2012-04-12
申请人： Pil Jae Park , Cheon Soo Kim , Hyun Kyu Yu , Min Park , Ik Soo Eo
发明人： Pil Jae Park , Cheon Soo Kim , Hyun Kyu Yu , Min Park , Ik Soo Eo
IPC分类号： G01S13/74 , G01S13/08 , G01S13/58 , G01S13/32 , G01S7/00
CPC分类号： G01S13/325 , G01S7/003 , G01S13/584
摘要： An embodiment of the present invention relates to a radar apparatus, wherein a distance to a target and a velocity of the target are measured by transmitting a digitally modulated transmitting signal using a digital code and receiving and demodulating an echo signal returned due to reflection of the transmitting signal from the target.
摘要翻译：本发明的实施例涉及一种雷达装置，其中通过使用数字码发送数字调制的发射信号来测量与目标的距离和目标的速度，并且接收和解调由于反射而返回的回波信号从目标传输信号。

3. 发明授权

US08509353B2 Digital receiver 有权
标题翻译：数字接收机
公开(公告)号：US08509353B2
公开(公告)日：2013-08-13
申请号：US12818510
申请日：2010-06-18
申请人： Seon-Ho Han , Hyun Kyu Yu
发明人： Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H03K9/00
CPC分类号： H04B1/0025 , H04B1/001
摘要： In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.
摘要翻译：在数字接收机中，噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器，对模拟信号进行放大和频带滤波，并衰减白噪声和除频带信号之外的干扰信号。 ADC在期望信号的载波频率上执行子采样，并通过使用采样频率对已经通过噪声衰减和信号幅度映射可变放大单元的模拟信号进行数字信号的期望信号的频带上的过采样，的直接转换频带或中频带。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号，并通过数字调节增益来处理数字信号。

4. 发明申请

US20130064148A1 SINGLE FREQUENCY SYNTHESIZER BASED FDD TRANSCEIVER 有权
标题翻译：单频合成器FDD收发器
公开(公告)号：US20130064148A1
公开(公告)日：2013-03-14
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

5. 发明申请

US20130063199A1 PROGRAMMABLE COMPLEX MIXER 审中-公开
标题翻译：可编程复合混合器
公开(公告)号：US20130063199A1
公开(公告)日：2013-03-14
申请号：US13615423
申请日：2012-09-13
申请人： Seon-Ho HAN , Hyun Ho Boo , Mun Yang Park , Jang Hong Choi , Hyun Kyu Yu
发明人： Seon-Ho HAN , Hyun Ho Boo , Mun Yang Park , Jang Hong Choi , Hyun Kyu Yu
IPC分类号： G06G7/14
CPC分类号： H03D7/165
摘要： Disclosed is a programmable complex mixer. In accordance with the embodiments of the present invention, it is possible to control an output by programming paths and signs of internal signals in a complex mixer to reduce a processing bandwidth, power consumption, and a chip area in a transceiver, thereby improving performance of a transceiver.
摘要翻译：公开了一种可编程复合混合器。根据本发明的实施例，可以通过在复合混频器中编程内部信号的路径和符号来控制输出，以减少收发器中的处理带宽，功耗和芯片面积，从而提高收发器

6. 发明授权

US08217818B2 Digital RF converter and RF converting method thereof 有权
标题翻译：数字RF转换器及其RF转换方法
公开(公告)号：US08217818B2
公开(公告)日：2012-07-10
申请号：US12902125
申请日：2010-10-11
申请人： Jang Hong Choi , Hyun Ho Boo , Hyun Kyu Yu
发明人： Jang Hong Choi , Hyun Ho Boo , Hyun Kyu Yu
IPC分类号： H03M1/66
CPC分类号： H03M3/504 , H03M3/32
摘要： Provided are a digital radio frequency (RF) converter and an RF converting method thereof. The RF frequency converter includes first and second RF output terminals of a differential form outputting an RF signal; a differential switch selectively connecting first and second nodes into the first and second RF output terminals in response to an oscillating waveform; at least one digital delay device column outputting a plurality of unit bits by sequentially delaying an input bit corresponding to the digital input signal; a front-end processor summing an output of the at least one digital delay device column; a plurality of current sources; and a plurality of first switches corresponding to the plurality of current sources, respectively, and delivering currents of current sources whose number corresponds to the sum value of the front-end processor among the plurality of current sources, to one of the first and second nodes.
摘要翻译：提供一种数字射频（RF）转换器及其RF转换方法。 RF频率转换器包括输出RF信号的差分形式的第一和第二RF输出端; 差分开关响应于振荡波形选择性地将第一和第二节点连接到第一和第二RF输出端子中; 至少一个数字延迟装置列通过顺序地延迟对应于数字输入信号的输入位而输出多个单位位; 前端处理器对所述至少一个数字延迟装置列的输出求和; 多个电流源; 以及分别对应于多个电流源的多个第一开关，并将数量对应于多个电流源中的前端处理器的和值的电流源的电流传送到第一和第二节点之一。

7. 发明授权

US08164494B2 Method and device for digitally correcting DC offset 有权
标题翻译：数字校正直流偏移的方法和装置
公开(公告)号：US08164494B2
公开(公告)日：2012-04-24
申请号：US12628186
申请日：2009-11-30
申请人： Jae Hoon Shim , Hyun Kyu Yu
发明人： Jae Hoon Shim , Hyun Kyu Yu
IPC分类号： H03M1/06
CPC分类号： H03F3/005
摘要： There is provided a digital Direct Current (DC) offset correction method and device. The device includes a digital-analog converter charging a load capacitor according to an input code value and generating an initial voltage value of the load capacitor; a comparator comparing an output DC offset value of a discrete-time amplifier and filter on the basis of the initial voltage value with a preset output DC offset value when the discrete-time amplifier and filter and the load capacitor are connected to each other; and a controller changing the input code value of the digital-analog converter according to comparison result of the comparator.
摘要翻译：提供了数字直流（DC）偏移校正方法和装置。该装置包括数模转换器，根据输入代码值对负载电容器充电并产生负载电容器的初始电压值; 当离散时间放大器和滤波器和负载电容器彼此连接时，比较器将基于初始电压值的离散时间放大器和滤波器的输出DC偏移值与预设输出DC偏移值进行比较; 以及根据比较器的比较结果改变数模转换器的输入代码值的控制器。

8. 发明授权

US08115525B2 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：US08115525B2
公开(公告)日：2012-02-14
申请号：US12626554
申请日：2009-11-25
申请人： Byung Hun Min , Hyun Kyu Yu
发明人： Byung Hun Min , Hyun Kyu Yu
IPC分类号： H03L7/06
CPC分类号： H03L7/091 , H03L7/085 , H03L7/107 , H03L7/1075 , H03L7/183 , H03L2207/06 , H03L2207/50
摘要： There is provided a frequency synthesizer. The frequency synthesizer includes a frequency oscillator adjusting an output frequency according to a control bit; a programmable divider having a preset minimum division ratio, the programming divider dividing the output frequency of the frequency oscillator at a variable division ratio; a counter unit receiving an output signal of the programmable divider and a reference frequency to generate a count value by counting rising edges of the output signal of the programmable divider during one cycle of the reference frequency, and outputting a first hit signal when the count value is 1, and outputting a second hit signal when the count value is 2; and a phase detection unit outputting a control bit obtained by subtracting a fractional error of the output signal of the programmable divider from a fractional error at a locked phase obtained from the count value and the reference frequency.
摘要翻译：提供了一个频率合成器。频率合成器包括根据控制位调节输出频率的频率振荡器; 具有预设的最小分频比的可编程分频器，所述编程分频器以可分分频比划分所述频率振荡器的输出频率; 接收可编程分频器的输出信号的计数器单元和参考频率，以在参考频率的一个周期期间对可编程分频器的输出信号的上升沿进行计数以产生计数值，并且当计数值是1，并且当计数值为2时输出第二命中信号; 以及相位检测单元，输出通过从从计数值和参考频率获得的锁定相位的分数误差中减去可编程分频器的输出信号的分数误差而获得的控制位。

9. 发明授权

US07999707B2 Apparatus for compensating for error of time-to-digital converter 有权
标题翻译：用于补偿时间 - 数字转换器误差的装置
公开(公告)号：US07999707B2
公开(公告)日：2011-08-16
申请号：US12629020
申请日：2009-12-01
申请人： Mi Jeong Park , Byung Hun Min , Ja Yol Lee , Hyun Kyu Yu
发明人： Mi Jeong Park , Byung Hun Min , Ja Yol Lee , Hyun Kyu Yu
IPC分类号： H03M1/06
CPC分类号： G04F10/06 , H03L7/085 , H03L2207/50
摘要： An apparatus for compensating for an error of a time-to-digital converter (TDC) is disclosed to receive a delay phase from a phase detector including the TDC and a phase error including a TDC error and compensate for the TDC error to have a time resolution higher by N times (N is a natural number). The apparatus includes: a fragmenting and multiplying unit fragmenting the delay phase by N times (N is a natural number) to generate first to (N−1)th fragmented delay phases; an adding unit adding each of the first to the (N−1)th fragmented delay phases to the phase error to generate first to (N−1)th phase errors; and a comparison unit acquiring a phase error compensation value nearest to an actual phase error from the phase error and the first to (N−1)th phase errors.
摘要翻译：公开了用于补偿时间 - 数字转换器（TDC）的误差的装置，以从包括TDC的相位检测器和包括TDC误差的相位误差接收延迟相位并补偿TDC误差以具有时间分辨率提高N倍（N是自然数）。该装置包括：分段和乘法单元，将延迟相位分片N次（N是自然数），以产生第一至第（N-1）个分段延迟相位; 加法单元将第一到第（N-1）个分段延迟相位中的每一个相加到相位误差，以产生第一到第（N-1）个相位误差; 以及比较单元从相位误差和第一到第（N-1）个相位误差获取最接近实际相位误差的相位误差补偿值。

10. 发明授权

US07933369B2 Apparatus for automatic gain control and wireless receiver employing the same 失效
标题翻译：用于自动增益控制的装置和采用该装置的无线接收器
公开(公告)号：US07933369B2
公开(公告)日：2011-04-26
申请号：US11635197
申请日：2006-12-07
申请人： Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
发明人： Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
IPC分类号： H04L27/08
CPC分类号： H04L27/0002 , H03G3/001 , H03G3/3068
摘要： Provided is an apparatus for automatic gain control (AGC) widely used in a receiver of a wireless communication system. The receiver of a wireless communication system includes: a step variable gain amplifier and an analog variable gain amplifier disposed in the path of a wireless signal and amplifying the wireless signal; an analog gain control unit for generating a gain control voltage for feedback-controlling an amplification value of the analog variable gain amplifier; a digital gain control unit for receiving the control voltage and generating a digital code determining an amplification value of the step variable gain amplifier. The apparatus for AGC constituted as described above can reduce power consumption and the number of devices by efficiently running an AGC loop in an analog domain, and can be embodied at low cost in a structure appropriately controlling the step gain amplifier and the analog gain amplifier.
摘要翻译：提供了广泛用于无线通信系统的接收机中的自动增益控制（AGC）的装置。无线通信系统的接收机包括：设置在无线信号的路径中的步进可变增益放大器和模拟可变增益放大器，并放大无线信号; 模拟增益控制单元，用于产生用于反馈控制模拟可变增益放大器的放大值的增益控制电压; 数字增益控制单元，用于接收控制电压并产生确定阶跃可变增益放大器的放大值的数字代码。如上所述构成的AGC装置可以通过有效地运行模拟域中的AGC环路来降低功耗和装置数量，并且可以在适当地控制步进增益放大器和模拟增益放大器的结构中以低成本实现。

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