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1. 发明申请

US20110001144A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110001144A1
公开(公告)日：2011-01-06
申请号：US12919992
申请日：2009-12-11
申请人： Kuzuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
发明人： Kuzuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
IPC分类号： H01L31/0312 , H01L21/337
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/1066 , H01L29/1608 , H01L29/8083
摘要： A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.
摘要翻译： JFET是半导体器件，允许更可靠地实现通过使用SiC作为材料而基本上可实现的特性，并且包括至少由碳化硅制成的上表面的晶片和形成在上表面上的栅极接触电极。晶片包括用作离子注入区域的第一p型区域，其形成为包括上表面。第一p型区域包括设置成包括上表面的基极区域和突出区域。基部区域沿着上表面的方向具有大于突出区域的宽度（w2）的宽度（w1）。栅极接触电极设置成与第一p型区域接触，使得栅极接触电极完全位于第一p型区域上，如平面图所示。

2. 发明授权

US08643065B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08643065B2
公开(公告)日：2014-02-04
申请号：US12919992
申请日：2009-12-11
申请人： Kazuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
发明人： Kazuhiro Fujikawa , Hideto Tamaso , Shin Harada , Yasuo Namikawa
IPC分类号： H01L29/80
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/1066 , H01L29/1608 , H01L29/8083
摘要： A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.
摘要翻译： JFET是半导体器件，允许更可靠地实现通过使用SiC作为材料而基本上可实现的特性，并且包括至少由碳化硅制成的上表面的晶片和形成在上表面上的栅极接触电极。晶片包括用作离子注入区域的第一p型区域，其形成为包括上表面。第一p型区域包括设置成包括上表面的基极区域和突出区域。基部区域沿着上表面的方向具有大于突出区域的宽度（w2）的宽度（w1）。栅极接触电极设置成与第一p型区域接触，使得栅极接触电极完全位于第一p型区域上，如平面图所示。

3. 发明申请

US20120119225A1 SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：硅碳化硅基板，外延层基板，半导体器件及制造碳化硅基板的方法
公开(公告)号：US20120119225A1
公开(公告)日：2012-05-17
申请号：US13322089
申请日：2011-02-21
申请人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
发明人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/02631 , H01L21/02658 , H01L21/02664 , H01L21/046 , H01L21/0495 , H01L29/04 , H01L29/1608 , H01L29/6606 , H01L29/66068
摘要： The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.
摘要翻译：本发明提供一种碳化硅衬底，提供衬底的外延层，半导体器件和制造碳化硅衬底的方法，其中每一个都实现了降低的导通电阻。碳化硅衬底是具有主表面的碳化硅衬底，并且包括：形成在主表面的至少一部分中的SiC单晶衬底; 以及设置成围绕SiC单晶衬底的基底构件。基部构件包括边界区域和基底区域。边界区域沿着主表面的方向与SiC单晶基板相邻，并且在其中具有晶界。基极区域在与主表面垂直的方向上与SiC单晶衬底相邻，杂质浓度高于SiC单晶衬底。

4. 发明申请

US20120003811A1 METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE 审中-公开
标题翻译：制造半导体基板的方法
公开(公告)号：US20120003811A1
公开(公告)日：2012-01-05
申请号：US13254947
申请日：2010-09-28
申请人： Makoto Sasaki , Shin Harada , Taro Noshiguchi , Kyoto Okita , Hideto Tamaso , Yasuo Namikawa
发明人： Makoto Sasaki , Shin Harada , Taro Noshiguchi , Kyoto Okita , Hideto Tamaso , Yasuo Namikawa
IPC分类号： H01L21/04
CPC分类号： H01L21/02378 , H01L21/0243 , H01L21/02529 , H01L21/02612 , H01L21/02656 , H01L21/02667 , H01L21/047 , H01L29/66068
摘要： A first silicon carbide substrate has a first front-side surface and a first side surface. A second silicon carbide substrate has a second front-side surface and a second side surface. The second side surface is disposed such that a gap having an opening between the first and second front-side surfaces of the first and second silicon carbide substrates is disposed between the first side surface and the second side surface. A closing portion is provided to close the gap over the opening. By depositing sublimates from the first and second side surfaces onto the closing portion, a connecting portion is formed to connect the first and second side surfaces to each other so as to close the opening. After the step of forming the connecting portion, the closing portion is removed.
摘要翻译：第一碳化硅衬底具有第一前侧表面和第一侧表面。第二碳化硅衬底具有第二前侧表面和第二侧表面。第二侧表面设置成使得在第一和第二碳化硅衬底的第一和第二前侧表面之间具有开口的间隙设置在第一侧表面和第二侧表面之间。提供封闭部分以封闭开口上的间隙。通过将第一和第二侧表面的升华物沉积到封闭部分上，形成连接部分以将第一和第二侧表面彼此连接以便关闭开口。在形成连接部分的步骤之后，去除封闭部分。

5. 发明申请

US20120068195A1 METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE AND SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：制造碳化硅基体和碳化硅基体的方法
公开(公告)号：US20120068195A1
公开(公告)日：2012-03-22
申请号：US13322937
申请日：2010-09-27
申请人： Shin Harada , Makoto Sasaki , Taro Nishiguchi , Hideto Tamaso , Yasuo Namikawa
发明人： Shin Harada , Makoto Sasaki , Taro Nishiguchi , Hideto Tamaso , Yasuo Namikawa
IPC分类号： H01L29/161 , H01L21/762
CPC分类号： H01L29/7802 , C30B29/36 , H01L21/02378 , H01L21/02428 , H01L21/02433 , H01L21/02529 , H01L29/0878 , H01L29/1608 , H01L29/66068
摘要： A method for manufacturing a silicon carbide substrate includes the steps of: preparing a plurality of SiC substrates each made of single-crystal silicon carbide; forming a base layer made of silicon carbide and holding the plurality of SiC substrates, which are arranged side by side when viewed in a planar view; and forming a filling portion filling a gap between the plurality of SiC substrates.
摘要翻译：一种制造碳化硅基板的方法包括以下步骤：制备由单晶碳化硅制成的多个SiC基板; 形成由碳化硅制成的基层，并保持在俯视时并排设置的多个SiC基板; 以及形成填充所述多个SiC衬底之间的间隙的填充部分。

6. 发明申请

US20120032191A1 METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE AND SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：制造碳化硅基体和碳化硅基体的方法
公开(公告)号：US20120032191A1
公开(公告)日：2012-02-09
申请号：US13259012
申请日：2010-09-27
申请人： Shin Harada , Makoto Sasaki , Taro Nishiguchi , Hideto Tamaso , Yasuo Namikawa
发明人： Shin Harada , Makoto Sasaki , Taro Nishiguchi , Hideto Tamaso , Yasuo Namikawa
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/24 , C30B23/00 , C30B25/186 , C30B29/36 , H01L21/02378 , H01L21/02428 , H01L21/02433 , H01L21/02529 , H01L21/187 , H01L29/1608 , H01L29/66068 , H01L29/808 , H01L29/872
摘要： A method for manufacturing a silicon carbide substrate (1) having a large diameter provided readily includes the steps of: preparing a plurality of SiC substrates (20) each made of single-crystal silicon carbide; and connecting end surfaces (20B) of the plurality of SiC substrates (20) to one another such that the plurality of SiC substrates (20) are arranged side by side when viewed in a planar view.
摘要翻译：制造具有大直径的碳化硅衬底（1）的方法容易包括以下步骤：制备由单晶碳化硅制成的多个SiC衬底（20）; 并且将所述多个SiC衬底（20）的端面（20B）彼此连接，使得当在平面图中观察时所述多个SiC衬底（20）并排布置。

7. 发明申请

US20110175111A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：硅碳化硅半导体器件
公开(公告)号：US20110175111A1
公开(公告)日：2011-07-21
申请号：US13121893
申请日：2009-08-07
申请人： Shin Harada , Hideto Tamaso , Tomoaki Hatayama
发明人： Shin Harada , Hideto Tamaso , Tomoaki Hatayama
IPC分类号： H01L29/24
CPC分类号： H01L29/7802 , H01L21/046 , H01L21/0485 , H01L29/0878 , H01L29/1608 , H01L29/32 , H01L29/66068 , H01L29/808 , H01L29/8613
摘要： Provided is a silicon carbide semiconductor device capable of lowering the contact resistance of an ohmic electrode and achieving high reverse breakdown voltage characteristics. A semiconductor device includes a substrate and a p+ region as an impurity layer. The substrate of the first conductive type (n type) is made of silicon carbide and has a dislocation density of 5×103 cm−2 or less. The p+ region is formed on the substrate, in which the concentration of the conductive impurities having the second conductive type different from the first conductive type is 1×1020 cm3 or more and 5×1021 cm3 or less.
摘要翻译：提供了能够降低欧姆电极的接触电阻并实现高反向击穿电压特性的碳化硅半导体器件。半导体器件包括衬底和作为杂质层的p +区域。第一导电型（n型）的基板由碳化硅构成，位错密度为5×10 3 cm -2以下。 p +区形成在基板上，其中具有不同于第一导电类型的第二导电类型的导电杂质的浓度为1×1020cm 3以上且5×1021cm 3以下。

8. 发明申请

US20100035420A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20100035420A1
公开(公告)日：2010-02-11
申请号：US12517735
申请日：2007-11-29
申请人： Hideto Tamaso , Kazuhiro Fujikawa , Shin Harada
发明人： Hideto Tamaso , Kazuhiro Fujikawa , Shin Harada
IPC分类号： H01L21/265
CPC分类号： H01L29/7802 , H01L21/0465 , H01L29/1608 , H01L29/66068
摘要： A method of manufacturing a semiconductor device includes a first step of forming an ion implantation mask on a portion of a surface of a semiconductor; a second step of implanting ions of a first dopant into at least a portion of an exposed region of the surface of the semiconductor other than the region where the ion implantation mask is formed, to form a first dopant implantation region; a third step of, after forming the first dopant implantation region, removing a portion of the ion implantation mask to increase the exposed region of the surface of the semiconductor; and a fourth step of implanting ions of a second dopant into at least a portion of the increased exposed region of the surface of the semiconductor to form a second dopant implantation region.
摘要翻译：一种制造半导体器件的方法包括：在半导体表面的一部分上形成离子注入掩模的第一步骤; 将第一掺杂剂的离子注入除了形成离子注入掩模的区域之外的半导体表面的暴露区域的至少一部分中的第二步骤，以形成第一掺杂剂注入区域; 第三步骤，在形成第一掺杂剂注入区域之后，去除一部分离子注入掩模以增加半导体表面的暴露区域; 以及第四步骤，将第二掺杂剂的离子注入所述半导体表面的增加的暴露区域的至少一部分中，以形成第二掺杂剂注入区域。

9. 发明授权

US08435866B2 Method for manufacturing silicon carbide substrate 失效
标题翻译：碳化硅基板的制造方法
公开(公告)号：US08435866B2
公开(公告)日：2013-05-07
申请号：US13256991
申请日：2010-09-28
申请人： Taro Nishiguchi , Makoto Sasaki , Shin Harada , Kyoko Okita , Hiroki Inoue , Shinsuke Fujiwara , Yasuo Namikawa
发明人： Taro Nishiguchi , Makoto Sasaki , Shin Harada , Kyoko Okita , Hiroki Inoue , Shinsuke Fujiwara , Yasuo Namikawa
IPC分类号： H01L21/306 , H01L21/304
CPC分类号： C30B29/36 , C30B33/06
摘要： At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.
摘要翻译：制备至少一个具有背面并由碳化硅制成的单晶基板和具有主表面并由碳化硅制成的支撑部分。在该制备步骤中，通过机械加工形成背面和主表面中的至少一个。通过该形成步骤，在背面和主面中的至少一个上形成有晶体结构变形的表层。表面层至少部分去除。在该去除步骤之后，背面和主表面彼此连接。

10. 发明申请

US20120184113A1 METHOD AND DEVICE FOR MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：用于制造碳化硅基板的方法和装置
公开(公告)号：US20120184113A1
公开(公告)日：2012-07-19
申请号：US13395793
申请日：2011-01-07
申请人： Hiroki Inoue , Shin Harada , Makoto Sasaki , Taro Nishiguchi , Kyoko Okita , Yasuo Namikawa
发明人： Hiroki Inoue , Shin Harada , Makoto Sasaki , Taro Nishiguchi , Kyoko Okita , Yasuo Namikawa
IPC分类号： H01L21/30 , H05B3/02
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/02529 , H01L21/02667 , H01L21/7602 , H01L29/1608 , H01L29/66068
摘要： A step of preparing a stack is performed to position each single-crystal substrate in a first single-crystal substrate group and a first base substrate face to face with each other, position each single-crystal substrate in a second single-crystal substrate group and a second base substrate face to face with each other, and stack the first single-crystal substrate group, the first base substrate, an insertion portion, the second single-crystal substrate group, and the second base substrate in one direction in this order. Next, the stack is heated so as to allow a temperature of the stack to reach a temperature at which silicon carbide can sublime and so as to form a temperature gradient in the stack with the temperature thereof getting increased in the above-described direction. In this way, silicon carbide substrates can be manufactured efficiently.
摘要翻译：执行制备叠层的步骤，将第一单晶衬底组和第一衬底中的每个单晶衬底彼此面对，将每个单晶衬底放置在第二单晶衬底组中，第二基板彼此面对，并且在一个方向上依次堆叠第一单晶基板组，第一基板，插入部，第二单晶基板组和第二基板。接下来，对叠层进行加热，以使堆叠的温度达到碳化硅可以升华的温度，并且在上述方向上随着温度升高而在叠层中形成温度梯度。以这种方式，可以有效地制造碳化硅衬底。

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