专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6153517A Low resistance poly landing pad 有权
标题翻译：低阻多层落地垫
公开(公告)号：US6153517A
公开(公告)日：2000-11-28
申请号：US266880
申请日：1999-03-12
申请人： Kun-Jung Chuang , Shou-Yi Hsu , Yi-Te Chen , Hon-Hung Lui
发明人： Kun-Jung Chuang , Shou-Yi Hsu , Yi-Te Chen , Hon-Hung Lui
IPC分类号： H01L21/768 , H01L23/485 , H01L21/44
CPC分类号： H01L21/76855 , H01L21/76843 , H01L21/76849 , H01L21/76889 , H01L23/485 , H01L2924/0002
摘要： A method is disclosed for forming a low resistance poly landing pad which is achieved by shunting the polysilicon of a landing pad with metallic conductors. A window is opened through a first dielectric layer to expose a conducting region over a semiconductor substrate. A metallic layer, deposited overall, is followed by an overall deposition of a polysilicon layer, with the layers being sufficient to fill the window completely. Metal and polysilicon outside the window is removed by chemical/mechanical polishing which also provides global planarization. Salicidation provides a silicide cover over the exposed surface of polysilicon, which was formed by the polishing. A second dielectric is deposited and an opening is formed to the landing pad. Electrical contact is made between metallization on the second dielectric layer and the salicide of the landing pad either, directly by simultaneous deposition of the metallization on the dielectric and the landing pad, or, by first forming a plug in the opening and then depositing the metallization.
摘要翻译：公开了一种用于形成低电阻多接地焊盘的方法，其通过用金属导体分流着陆焊盘的多晶硅来实现。通过第一电介质层打开窗口以暴露半导体衬底上的导电区域。整个沉积的金属层之后是多晶硅层的总体沉积，其中层足以完全填充窗口。通过化学/机械抛光除去窗户外的金属和多晶硅，还提供全局平面化。 Salicidation在多晶硅的暴露表面上提供硅化物覆盖层，其通过抛光形成。沉积第二电介质并且对着陆焊盘形成开口。在第二电介质层上的金属化和着陆焊盘的自对准硅化物之间进行电接触，直接通过金属化同时沉积在电介质和着陆焊盘上，或者首先在开口中形成插塞，然后沉积金属化。

2. 发明授权

US5869370A Ultra thin tunneling oxide using buffer CVD to improve edge thinning 失效
标题翻译：使用缓冲CVD氧化物的新型超薄隧穿氧化物，以改善边缘变薄效应
公开(公告)号：US5869370A
公开(公告)日：1999-02-09
申请号：US998631
申请日：1997-12-29
申请人： Kun-Jung Chuang , Hon-Hung Lui , Yi-Te Chen
发明人： Kun-Jung Chuang , Hon-Hung Lui , Yi-Te Chen
IPC分类号： H01L21/28 , H01L21/336 , H01L29/51 , H01L21/8247 , H01L21/31 , H01L21/469
CPC分类号： H01L21/28194 , H01L29/513 , H01L29/66825
摘要： A new method of forming a tunneling oxide film having a uniform thickness in the fabrication of a Flash EEPROM memory cell is described. A first oxide layer is provided on the surface of a semiconductor substrate wherein a portion of the first oxide layer is removed to expose the semiconductor substrate wherein the exposed portion of the semiconductor substrate comprises a tunneling window. A second oxide layer is deposited within the tunneling window. Thereafter, a thermal oxide layer is grown underlying the first oxide layer and the second oxide layer within the tunneling area wherein the presence of the second oxide layer provides for a uniform thermal oxide thickness throughout the tunneling window and wherein the second oxide layer and the thermal oxide layer together within the tunneling window form the tunneling oxide film in the fabrication of a memory cell.
摘要翻译：描述了在制造闪存EEPROM存储单元中形成具有均匀厚度的隧道氧化物膜的新方法。第一氧化物层设置在半导体衬底的表面上，其中去除第一氧化物层的一部分以露出半导体衬底，其中半导体衬底的暴露部分包括隧道窗。第二氧化物层沉积在隧道窗内。此后，在隧道区域内的第一氧化物层和第二氧化物层下方生长热氧化物层，其中第二氧化物层的存在在整个隧道窗口中提供均匀的热氧化物厚度，并且其中第二氧化物层和热一起在隧道窗内的氧化物层在制造存储器单元中形成隧穿氧化膜。

3. 发明授权

US6071812A Method of forming a modified metal contact opening to decrease its aspect ratio for deep sub-micron processes 有权
标题翻译：形成改性金属接触开口以降低其深亚微米工艺的纵横比的方法
公开(公告)号：US6071812A
公开(公告)日：2000-06-06
申请号：US174622
申请日：1998-10-19
申请人： Shou-Yi Hsu , Hon-Hung Lui , Kun-Jung Chuang
发明人： Shou-Yi Hsu , Hon-Hung Lui , Kun-Jung Chuang
IPC分类号： H01L21/311 , H01L21/768 , H01L23/485 , H01L21/44 , H01L21/31 , H01L21/469 , H01L21/4763
CPC分类号： H01L23/485 , H01L21/31144 , H01L21/76804 , H01L2924/0002
摘要： A method of fabricating a metal contact in a reduced aspect ratio contact hole. The method begins by forming a first insulating layer and a first barrier layer having a first barrier opening over a substrate. The first insulating layer is anisotropically etched through the first barrier opening forming an upper contact hole. A second barrier layer is formed on the first barrier layer and the first insulating layer. The second barrier layer is anisotropically etched forming spacers on sidewalls of the first insulating layer. The first insulating layer is anisotropically etched using the first barrier layer and the spacers as an etch mask forming a lower contact hole. The first barrier layer and the spacers are removed to form the reduced aspect ratio contact hole. The reduced aspect ratio contact hole is comprised by the upper and lower contact holes. The reduced aspect ratio contact hole is filled with a contact metal to contact the contact region in the substrate.
摘要翻译：一种在缩小的纵横比接触孔中制造金属接触的方法。该方法开始于在衬底上形成第一绝缘层和具有第一阻挡开口的第一阻挡层。第一绝缘层通过形成上接触孔的第一阻挡开口被各向异性地蚀刻。在第一阻挡层和第一绝缘层上形成第二阻挡层。第二阻挡层被各向异性地蚀刻，在第一绝缘层的侧壁上形成间隔物。使用第一阻挡层和间隔物作为形成下接触孔的蚀刻掩模来各向异性地蚀刻第一绝缘层。去除第一阻挡层和间隔物以形成减小的纵横比接触孔。缩小的纵横比接触孔由上接触孔和下接触孔组成。缩小的纵横比接触孔填充有接触金属以接触基板中的接触区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式