专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100258346A1 PACKAGE OF ENVIRONMENTALLY SENSITIVE ELECTRONIC DEVICE AND FABRICATING METHOD THEREOF 有权
标题翻译：环境敏感电子设备的包装及其制造方法
公开(公告)号：US20100258346A1
公开(公告)日：2010-10-14
申请号：US12487658
申请日：2009-06-19
申请人： Kuang-Jung Chen , Jia-Chong Ho , Jing-Yi Yan , Shu-Tang Yeh
发明人： Kuang-Jung Chen , Jia-Chong Ho , Jing-Yi Yan , Shu-Tang Yeh
IPC分类号： H01L23/28 , H01L21/56
CPC分类号： H01L23/564 , H01L21/56 , H01L23/293 , H01L23/3121 , H01L51/5243 , H01L51/5246 , H01L51/525 , H01L2251/5338 , H01L2924/0002 , H01L2924/12044 , Y10T29/49002 , H01L2924/00
摘要： A package of an environmentally sensitive electronic device including a first substrate, a second substrate, an environmentally sensitive electronic device, a plurality of barrier structures, and a fill is provided. The second substrate is disposed above the first substrate. The environmentally sensitive electronic device is disposed on the first substrate and located between the first substrate and the second substrate. The barrier structures are disposed between the first substrate and the second substrate, wherein the barrier structures surround the environmental sensitive electronic device, and the water vapor transmission rate of the barrier structures is less than 10−1 g/m2/day. The fill is disposed between the first substrate and the second substrate and covers the environmentally sensitive electronic device and the barrier structures.
摘要翻译：提供一种包括第一基板，第二基板，环境敏感电子设备，多个屏障结构和填充物的环境敏感电子设备的封装。第二基板设置在第一基板的上方。环境敏感的电子设备设置在第一基板上并且位于第一基板和第二基板之间。阻挡结构设置在第一基板和第二基板之间，其中阻挡结构围绕环境敏感电子设备，并且阻挡结构的水蒸汽透过率小于10-1g / m 2 /天。填充物设置在第一基板和第二基板之间并且覆盖环境敏感的电子设备和屏障结构。

2. 发明授权

US08093512B2 Package of environmentally sensitive electronic device and fabricating method thereof 有权
标题翻译：环保型电子器件封装及其制造方法
公开(公告)号：US08093512B2
公开(公告)日：2012-01-10
申请号：US12487658
申请日：2009-06-19
申请人： Kuang-Jung Chen , Jia-Chong Ho , Jing-Yi Yan , Shu-Tang Yeh
发明人： Kuang-Jung Chen , Jia-Chong Ho , Jing-Yi Yan , Shu-Tang Yeh
IPC分类号： H01L23/28
CPC分类号： H01L23/564 , H01L21/56 , H01L23/293 , H01L23/3121 , H01L51/5243 , H01L51/5246 , H01L51/525 , H01L2251/5338 , H01L2924/0002 , H01L2924/12044 , Y10T29/49002 , H01L2924/00
摘要： A package of an environmentally sensitive electronic device including a first substrate, a second substrate, an environmentally sensitive electronic device, a plurality of barrier structures, and a fill is provided. The second substrate is disposed above the first substrate. The environmentally sensitive electronic device is disposed on the first substrate and located between the first substrate and the second substrate. The barrier structures are disposed between the first substrate and the second substrate, wherein the barrier structures surround the environmental sensitive electronic device, and the water vapor transmission rate of the barrier structures is less than 10−1 g/m2/day. The fill is disposed between the first substrate and the second substrate and covers the environmentally sensitive electronic device and the barrier structures.
摘要翻译：提供一种包括第一基板，第二基板，环境敏感电子设备，多个屏障结构和填充物的环境敏感电子设备的封装。第二基板设置在第一基板的上方。环境敏感的电子设备设置在第一基板上并且位于第一基板和第二基板之间。阻挡结构设置在第一基板和第二基板之间，其中阻挡结构围绕环境敏感电子设备，并且阻挡结构的水蒸汽透过率小于10-1g / m 2 /天。填充物设置在第一基板和第二基板之间并且覆盖环境敏感的电子设备和屏障结构。

3. 发明申请

US20110063808A1 PACKAGE OF ENVIRONMENTAL SENSITIVE ELEMENT 有权
标题翻译：环境敏感元件的包装
公开(公告)号：US20110063808A1
公开(公告)日：2011-03-17
申请号：US12703155
申请日：2010-02-09
申请人： Kuang-Jung Chen , Shu-Tang Yeh , Jia-Chong Ho
发明人： Kuang-Jung Chen , Shu-Tang Yeh , Jia-Chong Ho
IPC分类号： H05K1/00
CPC分类号： H01L51/0097 , H01L51/5246 , H01L51/5253 , H01L51/5256 , H01L2251/5338 , Y02E10/549 , Y10T428/239
摘要： A package of an environmental sensitive element including a flexible substrate, an environmental sensitive element, a flexible sacrificial layer and a packaging structure is provided. The environmental sensitive element is disposed on the flexible substrate. The flexible sacrificial layer is disposed on the environmental sensitive element, wherein the environmental sensitive element includes a plurality of first thin films and the flexible sacrificial layer includes a plurality of second thin films. The bonding strength between two adjacent second thin films is substantially equal to or lower than the bonding strength between two adjacent first thin films. Further, the packaging structure covers the environmental sensitive element and the flexible sacrificial layer.
摘要翻译：提供了包括柔性基板，环境敏感元件，柔性牺牲层和封装结构的环境敏感元件的封装。环境敏感元件设置在柔性基板上。柔性牺牲层设置在环境敏感元件上，其中环境敏感元件包括多个第一薄膜，并且柔性牺牲层包括多个第二薄膜。两个相邻的第二薄膜之间的结合强度基本上等于或低于两个相邻的第一薄膜之间的结合强度。此外，包装结构覆盖环境敏感元件和柔性牺牲层。

4. 发明授权

US08446730B2 Package of environmental sensitive element 有权
公开(公告)号：US08446730B2
公开(公告)日：2013-05-21
申请号：US12703155
申请日：2010-02-09
申请人： Kuang-Jung Chen , Shu-Tang Yeh , Jia-Chong Ho
发明人： Kuang-Jung Chen , Shu-Tang Yeh , Jia-Chong Ho
IPC分类号： H05K1/00
CPC分类号： H01L51/0097 , H01L51/5246 , H01L51/5253 , H01L51/5256 , H01L2251/5338 , Y02E10/549 , Y10T428/239
摘要： A package of an environmental sensitive element including a flexible substrate, an environmental sensitive element, a flexible sacrificial layer and a packaging structure is provided. The environmental sensitive element is disposed on the flexible substrate. The flexible sacrificial layer is disposed on the environmental sensitive element, wherein the environmental sensitive element includes a plurality of first thin films and the flexible sacrificial layer includes a plurality of second thin films. The bonding strength between two adjacent second thin films is substantially equal to or lower than the bonding strength between two adjacent first thin films. Further, the packaging structure covers the environmental sensitive element and the flexible sacrificial layer.

5. 发明授权

US09142798B2 Package of environmental sensitive electronic element 有权
标题翻译：环保敏感电子元件包装
公开(公告)号：US09142798B2
公开(公告)日：2015-09-22
申请号：US13354298
申请日：2012-01-19
申请人： Kuang-Jung Chen , Jian-Lin Wu , Shu-Tang Yeh
发明人： Kuang-Jung Chen , Jian-Lin Wu , Shu-Tang Yeh
IPC分类号： H01L33/56 , H01L51/52
CPC分类号： H01L51/5256
摘要： A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer.
摘要翻译：提供一种包括第一基板，第二基板，环境敏感电子元件，柔性结构层和填充层的环境敏感电子元件的封装。环境敏感电子元件设置在第一基板上并且位于第一基板和第二基板之间。环境敏感电子元件包括阳极层，空穴注入层，空穴传输层，有机发光层，阴极层和电子注入层。柔性结构层设置在环境敏感电子元件上，并且包括软层，捕获层和保护层。捕获层的材料与电子注入层的材料相同。填充层设置在第一基板和第二基板之间，并且封装环境敏感的电子元件和柔性结构层。

6. 发明授权

US08236126B2 Encapsulation method of environmentally sensitive electronic element 有权
标题翻译：环境敏感电子元件的封装方法
公开(公告)号：US08236126B2
公开(公告)日：2012-08-07
申请号：US12860945
申请日：2010-08-23
申请人： Kuang-Jung Chen , Shu-Tang Yeh , Ping-I Shih , Kung-Yu Cheng , Jian-Lin Wu
发明人： Kuang-Jung Chen , Shu-Tang Yeh , Ping-I Shih , Kung-Yu Cheng , Jian-Lin Wu
IPC分类号： B32B38/10
CPC分类号： B32B37/26 , B32B37/185 , B32B37/187 , B32B2037/1253 , B32B2037/268 , B32B2038/1891 , B32B2457/206 , H01L51/524 , H01L2251/5338 , H01L2924/16235 , Y10T156/1052
摘要： An encapsulation method of an environmentally sensitive electronic element is provided. A first substrate is provided, wherein at least one first alignment mark and a plurality of environmentally sensitive electronic elements are formed on the first substrate. A second substrate is provided, wherein at least one second alignment mark and a plurality of limiting cavities are formed on the second substrate. A plurality of cover lids is respectively disposed in the limiting cavities. An adhesive is formed on the cover lids. The first substrate and the second substrate are laminated together with the first alignment mark and the second alignment mark as reference, so that the environmentally sensitive electronic elements are sealed in the adhesive and located between the first substrate and the second substrate. The second substrate and the cover lids are separated from each other.
摘要翻译：提供了一种对环境敏感的电子元件的封装方法。提供了第一衬底，其中在第一衬底上形成至少一个第一对准标记和多个对环境敏感的电子元件。提供了第二基板，其中在第二基板上形成至少一个第二对准标记和多个限制腔。多个盖盖分别设置在限制腔中。在盖盖上形成粘合剂。将第一基板和第二基板与第一对准标记和第二对准标记作为参考层压在一起，使得环境敏感的电子元件被密封在粘合剂中并且位于第一基板和第二基板之间。第二基板和盖盖彼此分离。

7. 发明申请

US20120012246A1 ENCAPSULATION METHOD OF ENVIRONMENTALLY SENSITIVE ELECTRONIC ELEMENT 有权
标题翻译：环境敏感电子元件的封装方法
公开(公告)号：US20120012246A1
公开(公告)日：2012-01-19
申请号：US12860945
申请日：2010-08-23
申请人： Kuang-Jung Chen , Shu-Tang Yeh , Ping-I Shih , Kung-Yu Cheng , Jian-Lin Wu
发明人： Kuang-Jung Chen , Shu-Tang Yeh , Ping-I Shih , Kung-Yu Cheng , Jian-Lin Wu
IPC分类号： B32B38/10
CPC分类号： B32B37/26 , B32B37/185 , B32B37/187 , B32B2037/1253 , B32B2037/268 , B32B2038/1891 , B32B2457/206 , H01L51/524 , H01L2251/5338 , H01L2924/16235 , Y10T156/1052
摘要： An encapsulation method of an environmentally sensitive electronic element is provided. A first substrate is provided, wherein at least one first alignment mark and a plurality of environmentally sensitive electronic elements are formed on the first substrate. A second substrate is provided, wherein at least one second alignment mark and a plurality of limiting cavities are formed on the second substrate. A plurality of cover lids is respectively disposed in the limiting cavities. An adhesive is formed on the cover lids. The first substrate and the second substrate are laminated together with the first alignment mark and the second alignment mark as reference, so that the environmentally sensitive electronic elements are sealed in the adhesive and located between the first substrate and the second substrate. The second substrate and the cover lids are separated from each other.
摘要翻译：提供了一种对环境敏感的电子元件的封装方法。提供了第一衬底，其中在第一衬底上形成至少一个第一对准标记和多个对环境敏感的电子元件。提供了第二基板，其中在第二基板上形成至少一个第二对准标记和多个限制腔。多个盖盖分别设置在限制腔中。在盖盖上形成粘合剂。将第一基板和第二基板与第一对准标记和第二对准标记作为参考层压在一起，使得环境敏感的电子元件被密封在粘合剂中并且位于第一基板和第二基板之间。第二基板和盖盖彼此分离。

8. 发明申请

US20130126932A1 PACKAGE OF ENVIRONMENTAL SENSITIVE ELECTRONIC ELEMENT 有权
标题翻译：环境敏感电子元件包装
公开(公告)号：US20130126932A1
公开(公告)日：2013-05-23
申请号：US13354298
申请日：2012-01-19
申请人： Kuang-Jung Chen , Jian-Lin Wu , Shu-Tang Yeh
发明人： Kuang-Jung Chen , Jian-Lin Wu , Shu-Tang Yeh
IPC分类号： H01L33/56
CPC分类号： H01L51/5256
摘要： A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer.
摘要翻译：提供一种包括第一基板，第二基板，环境敏感电子元件，柔性结构层和填充层的环境敏感电子元件的封装。环境敏感电子元件设置在第一基板上并且位于第一基板和第二基板之间。环境敏感电子元件包括阳极层，空穴注入层，空穴传输层，有机发光层，阴极层和电子注入层。柔性结构层设置在环境敏感电子元件上，并且包括软层，捕获层和保护层。捕获层的材料与电子注入层的材料相同。填充层设置在第一基板和第二基板之间，并且封装环境敏感的电子元件和柔性结构层。

9. 发明授权

US09449822B2 Method of forming semiconductor structures with contact holes 有权
标题翻译：形成具有接触孔的半导体结构的方法
公开(公告)号：US09449822B2
公开(公告)日：2016-09-20
申请号：US12846020
申请日：2010-07-29
申请人： Wai-Kin Li , Wu-Song Huang , Joy Cheng , Kuang-Jung Chen
发明人： Wai-Kin Li , Wu-Song Huang , Joy Cheng , Kuang-Jung Chen
IPC分类号： H01L21/033
CPC分类号： H01L21/0337 , H01L21/0338
摘要： Embodiments of the present invention provide a method of forming a semiconductor structure. The method includes forming a set of shapes on top of a substrate; applying a layer of copolymer covering the substrate; causing the copolymer to form a plurality of cylindrical blocks both inside and outside the shapes; forming a pattern of contact holes from the plurality of cylindrical blocks; and transferring the pattern of contact holes to the substrate to form the semiconductor structure. In one embodiment, the shapes are rings and forming the set of shapes includes forming a set of rings that are equally and squarely spaced. In another embodiment, causing the copolymer to form the plurality of cylindrical blocks includes forming only one cylindrical block inside each of the rings and only one cylindrical block outside every four (4) squarely neighboring rings.
摘要翻译：本发明的实施例提供一种形成半导体结构的方法。该方法包括在衬底的顶部上形成一组形状; 涂覆覆盖基材的共聚物层; 使共聚物在形状内部和外部形成多个圆柱形块; 从所述多个圆柱形块形成接触孔的图案; 并将接触孔的图案转移到衬底以形成半导体结构。在一个实施例中，形状是环，并且形成一组形状包括形成均匀且平直间隔的一组环。在另一个实施方案中，使共聚物形成多个圆柱形块包括仅在每个环内形成一个圆柱形块，并且在每四（4）个正方形相邻的环周围仅形成一个圆柱形块。

10. 发明授权

US09316916B2 Method to mitigate resist pattern critical dimension variation in a double-exposure process 有权
标题翻译：减轻双曝光过程中抗蚀剂图案临界尺寸变化的方法
公开(公告)号：US09316916B2
公开(公告)日：2016-04-19
申请号：US12419403
申请日：2009-04-07
申请人： Kuang-Jung Chen , Wu-Song Huang , Wai-kin Li
发明人： Kuang-Jung Chen , Wu-Song Huang , Wai-kin Li
IPC分类号： G03F7/207 , G03F7/40 , G03F7/00 , G03F7/20 , G03F7/38
CPC分类号： G03F7/40 , G03F7/0035 , G03F7/2024 , G03F7/203 , G03F7/2041 , G03F7/38
摘要： A method to mitigate resist pattern critical dimension (CD) variation in a double-exposure process generally includes forming a photoresist layer over a substrate; exposing the photoresist layer to a first radiation; developing the photoresist layer to form a first pattern in the photoresist layer; forming a topcoat layer over the photoresist layer; exposing the topcoat layer and the photoresist layer to a second radiation; removing the topcoat layer; and developing the photoresist layer to form a second pattern in the photoresist layer.
摘要翻译：减轻双曝光工艺中抗蚀剂图案临界尺寸（CD）变化的方法通常包括在衬底上形成光致抗蚀剂层; 将光致抗蚀剂层暴露于第一辐射; 显影光致抗蚀剂层以在光致抗蚀剂层中形成第一图案; 在光致抗蚀剂层上形成顶涂层; 将顶涂层和光致抗蚀剂层暴露于第二辐射; 去除顶涂层; 并且在光致抗蚀剂层中显影光致抗蚀剂层以形成第二图案。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式