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1. 发明申请

US20050258519A1 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050258519A1
公开(公告)日：2005-11-24
申请号：US10921961
申请日：2004-08-20
申请人： Koya Kikuchi , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
发明人： Koya Kikuchi , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
IPC分类号： H01L23/12 , H01L21/60 , H01L23/16 , H01L23/31 , H01L23/495 , H01L23/498 , H01L23/52
CPC分类号： H01L24/50 , H01L23/16 , H01L23/3128 , H01L23/3157 , H01L23/49572 , H01L23/4985 , H01L2224/73204 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/1532 , H01L2924/351 , H01L2924/00
摘要： A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.
摘要翻译：半导体器件包括：具有器件孔和多个孔的绝缘带; 多个引线形成在带的一个表面上并且在一端延伸到器件孔中并在另一端延伸到孔中; 在其主表面上具有多个电极的半导体芯片与延伸到器件孔中的引线连接; 由绝缘树脂形成的密封剂，引线和带的预定部分; 设置在引线的一个表面上的凸起电极; 设置在密封剂和凸起电极之间的带中的狭缝，并且沿凸起电极的一列延伸; 以及由绝缘膜制成并形成在所述带上的防扭曲加强件; 其中半导体芯片和凸块电极连接到引线的同一表面侧。

2. 发明申请

US20080199979A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080199979A1
公开(公告)日：2008-08-21
申请号：US12104774
申请日：2008-04-17
申请人： Koya KIKUCHI , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
发明人： Koya KIKUCHI , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
IPC分类号： H01L21/66
CPC分类号： H01L24/50 , H01L23/16 , H01L23/3128 , H01L23/3157 , H01L23/49572 , H01L23/4985 , H01L24/86 , H01L2224/73204 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/1532 , H01L2924/351 , H01L2924/00
摘要： Method of manufacturing a semiconductor device, including: preparing a TAB tape featuring an insulating tape having a device hole and a plurality of holes, a plurality of leads formed on a surface of the tape and extending at one end into the device hole and at the other end into the holes, slits provided inside arrangements of columns of holes, and a warp prevention reinforcement insulating film to hold the leads between it and the tape; connecting front ends of the leads to the electrodes of the chip; forming an encapsulant to enclose the chip, the leads and a portion of the tape; forming thick bump electrodes on that surface side of the leads running through the holes to which the semiconductor chip is connected; performing an electric characteristic test, using the bump electrodes as measuring terminals; and cutting the TAB tape to a predetermined shape.
摘要翻译：一种制造半导体器件的方法，包括：制备具有绝缘带的TAB带，该绝缘带具有器件孔和多个孔，多个引线形成在带的表面上并且在一端延伸到器件孔中设置在孔的内部布置中的狭缝，以及将引线保持在带之间的防翘曲加强绝缘膜; 将引线的前端连接到芯片的电极; 形成密封剂以包围芯片，引线和磁带的一部分; 在穿过与半导体芯片连接的孔的引线的表面侧上形成厚的凸起电极; 使用凸块电极作为测量端子进行电特性测试; 并将TAB带切割成预定的形状。

3. 发明授权

US07372130B2 Semiconductor device including a semiconductor chip formed on an insulating element such as a tape, and including an improved insulating arrangement 失效
标题翻译：半导体器件包括形成在诸如胶带的绝缘元件上的半导体芯片，并且包括改进的绝缘结构
公开(公告)号：US07372130B2
公开(公告)日：2008-05-13
申请号：US10921961
申请日：2004-08-20
申请人： Koya Kikuchi , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
发明人： Koya Kikuchi , Noriou Shimada , Keiyo Kusanagi , Akihiko Hatasawa , Yutaka Kagaya
IPC分类号： H01L23/495
CPC分类号： H01L24/50 , H01L23/16 , H01L23/3128 , H01L23/3157 , H01L23/49572 , H01L23/4985 , H01L2224/73204 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/1532 , H01L2924/351 , H01L2924/00
摘要： A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.
摘要翻译：半导体器件包括：具有器件孔和多个孔的绝缘带; 多个引线形成在带的一个表面上并且在一端延伸到器件孔中并在另一端延伸到孔中; 在其主表面上具有多个电极的半导体芯片与延伸到器件孔中的引线连接; 由绝缘树脂形成的密封剂，引线和带的预定部分; 设置在引线的一个表面上的凸起电极; 设置在密封剂和凸起电极之间的带中的狭缝，并且沿凸起电极的一列延伸; 以及由绝缘膜制成并形成在所述带上的防扭曲加强件; 其中半导体芯片和凸块电极连接到引线的同一表面侧。

4. 发明授权

US07321165B2 Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07321165B2
公开(公告)日：2008-01-22
申请号：US10885573
申请日：2004-07-08
申请人： Yutaka Kagaya , Keiyo Kusanagi , Koya Kikuchi , Akihiko Hatasawa
发明人： Yutaka Kagaya , Keiyo Kusanagi , Koya Kikuchi , Akihiko Hatasawa
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L23/3128 , H01L23/49572 , H01L23/5382 , H01L24/50 , H01L25/105 , H01L2225/1023 , H01L2225/1058 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00
摘要： In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of the leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates. At least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals. A technique for sorting good products is performed in a state in which the chips are mounted on the substrates.
摘要翻译：在其中堆叠安装半导体芯片的多个基板的半导体器件中，形成在基板上的引线的一端连接到半导体芯片，并且其另一端连接到基板的连接端子。至少一个引线在连接端子附近分支成两个或更多个，并且分支引线的一端连接到连接端子。在芯片安装在基板上的状态下进行排序好的产品的技术。

5. 发明申请

US20050077608A1 Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050077608A1
公开(公告)日：2005-04-14
申请号：US10885573
申请日：2004-07-08
申请人： Yutaka Kagaya , Keiyo Kusanagi , Koya Kikuchi , Akihiko Hatasawa
发明人： Yutaka Kagaya , Keiyo Kusanagi , Koya Kikuchi , Akihiko Hatasawa
IPC分类号： H01L25/18 , H01L23/31 , H01L23/495 , H01L23/538 , H01L25/10 , H01L25/11 , H01L21/48 , H01L29/40
CPC分类号： H01L23/3128 , H01L23/49572 , H01L23/5382 , H01L24/50 , H01L25/105 , H01L2225/1023 , H01L2225/1058 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00
摘要： Using in common a substrate for performing a stack and assembly of semiconductor chips, and coping with increase of the number of signals. In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates, and at least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals. A manufacturing method thereof comprises of the steps of: performing a BGA assembly in which a semiconductor chip is mounted on a substrate; sorting good products in a state of mounting the semiconductor chip on the substrate; maintaining conduction between a predetermined lead and the branched leads in the sorted good products and then singulating the substrates for each layer; and stacking and assembling the singulated substrates in predetermined order. According to this structure, since the substrate having the same lead pattern can be used in common and a sufficient space is provided in the substrate, a large number of signals can be switched.
摘要翻译：通常使用用于执行半导体芯片的堆叠和组装的衬底，并且应对信号数量的增加。在其中堆叠安装半导体芯片的多个基板的半导体器件中，形成在基板上的引线的一端连接到半导体芯片，并且其另一端连接到基板的连接端子，并且至少一个的引线在连接端子附近分支为两个或更多个，并且分支导线的一端连接到连接端子。其制造方法包括以下步骤：执行将半导体芯片安装在基板上的BGA组件; 在将半导体芯片安装在基板上的状态下分选好的产品; 保持预定的引线与分选好的产品中的分支引线之间的导通，然后对每一层分离基片; 并以预定顺序堆叠并组装单个基板。根据该结构，由于可以共同使用具有相同引线图案的基板，并且在基板中设置足够的空间，因此可以切换大量的信号。

6. 发明申请

US20060163745A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060163745A1
公开(公告)日：2006-07-27
申请号：US11340562
申请日：2006-01-27
申请人： Shiro Yamashita , Daisuke Tsuji , Akihiko Hatasawa , Hidehiro Takeshima
发明人： Shiro Yamashita , Daisuke Tsuji , Akihiko Hatasawa , Hidehiro Takeshima
IPC分类号： H01L23/48 , H05K1/16
CPC分类号： H01L25/0657 , H01L23/145 , H01L23/5383 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/06555 , H01L2225/06582 , H01L2225/06586 , H01L2225/06589 , H01L2924/00014 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In a semiconductor device according to the present invention, a first bare chip, and a second bare chip having a wider principal surface than that of the first bare chip are connected to one principal surface and the other principal surface of an interposer substrate, respectively. In the semiconductor device, a resin having a larger coefficient of linear expansion than that of the second bare chip is applied to a backgrind surface (a principal surface at an opposite side to the interposer substrate) of the second bare chip, thereby preventing the second bare chip from cracking due to warpage of the interposer substrate.
摘要翻译：在根据本发明的半导体器件中，具有比第一裸芯片更宽的主表面的第一裸芯片和第二裸芯片分别连接到插入器基板的一个主表面和另一主表面。在半导体装置中，将具有比第二裸芯片的线膨胀系数大的树脂施加到第二裸芯片的背面研磨表面（与内插基板的相反侧的主表面），从而防止第二裸芯片裸芯片由于内插器基板的翘曲而破裂。

7. 发明授权

US07928551B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07928551B2
公开(公告)日：2011-04-19
申请号：US12285832
申请日：2008-10-15
申请人： Reiko Fujiwara , Akihiko Hatasawa , Fumitomo Watanabe
发明人： Reiko Fujiwara , Akihiko Hatasawa , Fumitomo Watanabe
IPC分类号： H01L23/02
CPC分类号： H01L23/3128 , H01L21/561 , H01L21/6835 , H01L23/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/05644 , H01L2224/1134 , H01L2224/1308 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/48499 , H01L2224/48599 , H01L2224/48992 , H01L2224/4945 , H01L2224/73265 , H01L2224/83139 , H01L2224/8314 , H01L2224/83191 , H01L2224/8385 , H01L2224/85001 , H01L2224/85051 , H01L2224/85191 , H01L2224/85203 , H01L2224/85205 , H01L2224/85951 , H01L2224/85986 , H01L2224/97 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/30105 , H01L2224/85 , H01L2224/83 , H01L2224/85186 , H01L2224/78 , H01L2924/00 , H01L2224/92247 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/4554
摘要： In a semiconductor device, a first semiconductor chip is stacked on a wiring substrate and has first electrode pads disposed at predetermined positions on an upper surface thereof. A second semiconductor chip is stacked on the first semiconductor chip through an insulating member in an offset manner so that the first electrode pads are exposed. Support members support a back surface of a protruding portion of the second semiconductor chip through the insulating member.
摘要翻译：在半导体器件中，第一半导体芯片堆叠在布线基板上，并且具有设置在其上表面上的预定位置处的第一电极焊盘。第二半导体芯片通过绝缘构件以偏移方式堆叠在第一半导体芯片上，使得第一电极焊盘露出。支撑构件通过绝缘构件支撑第二半导体芯片的突出部分的后表面。

8. 发明申请

US20090096111A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090096111A1
公开(公告)日：2009-04-16
申请号：US12285832
申请日：2008-10-15
申请人： Reiko Fujiwara , Akihiko Hatasawa , Fumitomo Watanabe
发明人： Reiko Fujiwara , Akihiko Hatasawa , Fumitomo Watanabe
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/3128 , H01L21/561 , H01L21/6835 , H01L23/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/05644 , H01L2224/1134 , H01L2224/1308 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/48499 , H01L2224/48599 , H01L2224/48992 , H01L2224/4945 , H01L2224/73265 , H01L2224/83139 , H01L2224/8314 , H01L2224/83191 , H01L2224/8385 , H01L2224/85001 , H01L2224/85051 , H01L2224/85191 , H01L2224/85203 , H01L2224/85205 , H01L2224/85951 , H01L2224/85986 , H01L2224/97 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/30105 , H01L2224/85 , H01L2224/83 , H01L2224/85186 , H01L2224/78 , H01L2924/00 , H01L2224/92247 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/4554
摘要： In a semiconductor device, a first semiconductor chip is stacked on a wiring substrate and has first electrode pads disposed at predetermined positions on an upper surface thereof. A second semiconductor chip is stacked on the first semiconductor chip through an insulating member in an offset manner so that the first electrode pads are exposed. Support members support a back surface of a protruding portion of the second semiconductor chip through the insulating member.
摘要翻译：在半导体器件中，第一半导体芯片堆叠在布线基板上，并且具有设置在其上表面上的预定位置处的第一电极焊盘。第二半导体芯片通过绝缘构件以偏移方式堆叠在第一半导体芯片上，使得第一电极焊盘露出。支撑构件通过绝缘构件支撑第二半导体芯片的突出部分的后表面。

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