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    • 5. 发明授权
    • Radio communication system, slave unit, master unit and communication method
    • 无线通信系统,从单元,主单元和通信方式
    • US08682253B2
    • 2014-03-25
    • US12042807
    • 2008-03-05
    • Daisuke TsujiShinichi Mukaigawa
    • Daisuke TsujiShinichi Mukaigawa
    • H04B17/00H03C1/62
    • G08C17/02
    • The invention provides a radio communication system allowing a user to readily set a delay time. The controller determines whether the test button was depressed and then determines how long the test button has been kept depressed. The depressed time is set as a delay time and stored in a memory. After a lapse of the set delay time, the controller starts a communication with a master unit, determines whether the installation site of the slave unit 10 is appropriate and notifies the determination. If a normal communication is recognized from the determination result, the user decides to install the slave unit to the tested installation site and terminates the test.
    • 本发明提供了允许用户容易地设置延迟时间的无线电通信系统。 控制器确定测试按钮是否被按下,然后确定测试按钮保持按下多长时间。 抑制时间被设置为延迟时间并存储在存储器中。 在经过设定的延迟时间之后,控制器开始与主单元的通信,确定从单元10的安装地点是否合适,并通知该确定。 如果从确定结果中识别到正常通信,则用户决定将从属单元安装到测试安装地点并终止测试。
    • 10. 发明授权
    • Semiconductor device and method of manufacturing semiconductor device
    • 半导体装置及其制造方法
    • US07477523B2
    • 2009-01-13
    • US11678492
    • 2007-02-23
    • Daisuke Tsuji
    • Daisuke Tsuji
    • H05K7/00
    • H01L21/563H01L21/561H01L23/3128H01L23/49816H01L23/49827H01L24/97H01L2224/1134H01L2224/13144H01L2224/16237H01L2224/73203H01L2224/73204H01L2224/97H01L2924/00013H01L2924/01005H01L2924/01006H01L2924/01029H01L2924/01033H01L2924/01074H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/15184H01L2924/15311H01L2924/181H05K3/3452H05K2201/0989H05K2201/10674H05K2201/10977H05K2203/0594H01L2924/00014H01L2224/13099H01L2924/00012
    • A semiconductor device has at least a square wiring board having a board core made of an insulating material, wires made of a metal and formed on a first surface of the board core, a solder resist film formed on the first surface to cover the wires, and openings formed by partially opening the solder resist film, wherein a plurality of the elongated wires are arranged in parallel on the bottom of the openings, a semiconductor chip having electrodes flip chip connected to the wires are arranged on the bottom of the openings of the wiring board through a conductive bonding material, and an insulating resin is provided for filling an interstice between the wiring board and the semiconductor chip, wherein the wires extend along a width direction orthogonal to a longitudinal direction of the openings, the openings comprise elongated grooves which extend along at least two opposing sides of the square of the wiring board, a pair of opposing edges of the opening along the longitudinal direction define zig-zag edges in which the widths of the opening seem to be longer and shorter in a repeating sequence, and recessed edge portions which recess toward the outside of the opening formed by the zig-zag edges in the width direction correspond to the wires, and protruded edge portions which protrude toward the inside of the opening formed by the zig-zag edges in the width direction correspond to the board core between adjoining the wires.
    • 半导体器件至少具有由绝缘材料制成的板芯的正方形布线板,由金属制成的金属线形成在板芯的第一表面上,阻焊膜形成在第一表面上以覆盖电线, 以及通过部分地打开阻焊膜形成的开口,其中多个细长导线平行地布置在开口的底部上,具有连接到导线的电极倒装芯片的半导体芯片布置在开口的底部上 布线板通过导电接合材料,并且提供绝缘树脂以填充布线板和半导体芯片之间的间隙,其中电线沿着与开口的纵向正交的宽度方向延伸,开口包括细长槽 沿着布线板的正方形的至少两个相对侧延伸,沿着纵向方向的一对相对的开口的边缘 在其中开口的宽度以重复顺序看起来更长和更短的定义的Z字形边缘,并且朝向宽度方向上由之字形边缘形成的开口的外侧凹陷的凹入边缘部分对应于 电线和在宽度方向上由锯齿形边缘形成的开口的内侧突出的突出部分对应于相邻电线之间的板芯。