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1. 发明授权

US5210449A Edge triggered tri-state output buffer 失效
标题翻译：边缘触发TRI状态输出缓冲器
公开(公告)号：US5210449A
公开(公告)日：1993-05-11
申请号：US760622
申请日：1991-09-16
申请人： Kiyoshi Nishino , Yasumasa Tomonaga
发明人： Kiyoshi Nishino , Yasumasa Tomonaga
IPC分类号： H03K17/687 , H03K19/00 , H03K19/0175 , H03K19/094
CPC分类号： H03K19/09429 , H03K19/0013
摘要： A tri-state circuit is provided having first and second input lines for each receiving an input signal thereon. A circuit output line is connected to and controlled by an output switching circuit. A control circuit is responsive to both input signals to cause the switching circuit to adopt one of three states wherein the switching circuit delivers a high logic signal to the output line in a first state, a low logic signal in a second state, and no output signal in a third state. The circuit includes circuitry connected to the switching circuit and the output line for reducing the current in the output line to substantially zero over a transient period when the switching circuit is in the third state. The control circuit further includes a delay circuit for substantially reducing the transient period thereby minimizing the amount of current flowing in the output line when the circuit is in the third state.

2. 发明授权

US08806292B2 Method of hybrid compression acceleration utilizing special and general purpose processors 有权
标题翻译：使用特殊和通用处理器的混合压缩加速方法
公开(公告)号：US08806292B2
公开(公告)日：2014-08-12
申请号：US13327111
申请日：2011-12-15
申请人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
发明人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
IPC分类号： H03M13/00
CPC分类号： H03M7/30 , H03M7/3086 , H03M13/09 , H03M13/6312
摘要： A hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
摘要翻译：一种混合机制，其硬件加速度与软件组合，使得实现的压缩率显着增加，同时保持原始压缩比（例如，使用完全DHT而不是SHT或近似）。压缩加速机制适用于与通用处理器紧密耦合的硬件加速器。压缩任务在硬件和软件之间进行分割和并行化，其中每个压缩任务分为两个加速请求：使用硬件加速执行SHT编码并提供后LZ频率统计的第一请求; 以及使用在软件中生成的DHT来执行SHT解码和DHT编码的第二请求。

3. 发明授权

US08677079B2 Selecting a position where data is stored 失效
标题翻译：选择存储数据的位置
公开(公告)号：US08677079B2
公开(公告)日：2014-03-18
申请号：US12775113
申请日：2010-05-06
申请人： Kiyoshi Nishino , Kiyoshi Takemura , Nobuyoshi Tanaka
发明人： Kiyoshi Nishino , Kiyoshi Takemura , Nobuyoshi Tanaka
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G11C15/00 , H03M7/3084
摘要： An apparatus and method are provided for selecting a specific position from a plurality of positions in a memory to which data elements are cyclically written. A specific data element is stored in the plurality of positions. The apparatus comprises a determination unit for determining whether the plurality of positions include any position in a specific area of the memory to which data elements are written in a current cycle. The apparatus further comprises a selection unit for selecting at least one position in the specific area out of the plurality of positions as the specific position if the determination unit determines that the plurality of positions include any position in the specific area, and for selecting at least one position out of the plurality of positions as the specific position if the determination unit determines that the plurality of positions do not include any position in the specific area.
摘要翻译：提供了一种用于从循环写入数据元素的存储器中的多个位置中选择特定位置的装置和方法。特定数据元素存储在多个位置。该装置包括确定单元，用于确定多个位置是否包括在当前周期中以数据元素写入的存储器的特定区域中的任何位置。所述装置还包括选择单元，用于如果所述确定单元确定所述多个位置包括所述特定区域中的任何位置，并且至少选择至少选择所述多个位置中的所述特定区域中的至少一个位置作为所述特定位置如果确定单元确定多个位置不包括特定区域中的任何位置，则在多个位置中的一个位置作为特定位置。

4. 发明授权

US06233452B1 Wireless information processing terminal and controlling method thereof 失效
标题翻译：无线信息处理终端及其控制方法
公开(公告)号：US06233452B1
公开(公告)日：2001-05-15
申请号：US09109568
申请日：1998-07-02
申请人： Kiyoshi Nishino
发明人： Kiyoshi Nishino
IPC分类号： H04Q720
CPC分类号： H04W8/245 , H04W8/183
摘要： An improved wireless information processing apparatus that is connectable to an appropriate one of the access points prepared by an internet provider even under a mobile environment. A terminal and method of operation whereby a user of the terminal requests connection to the Internet, the terminal extracts a CS-ID from notification information transmitted from a wireless base station and, then, retrieves its own association table to acquire a telephone number of an access point nearest to the current location. Then, the terminal dials-up to the acquired access point to establish an internet connection. As a result, the terminal is allowed to download an electronic mail destined therefor, a Web page (HTML file or the like) stored in a disk of a given Web server and the like. Alternatively, the terminal is allowed to transmit data contained therein (or a file and/or an electronic mail edited on this terminal) to another computer system connected to the Internet, or to upload such data to a disk of a given Web server.
摘要翻译：一种改进的无线信息处理设备，即使在移动环境下，也可以由互联网提供商准备的接入点中的适当一个接入点连接。一种终端和终端的用户请求连接到因特网的终端和方法，终端从无线基站发送的通知信息中提取CS-ID，然后检索其自己的关联表以获取电话号码最接近当前位置的接入点。然后，终端拨号到获取的接入点建立互联网连接。结果，允许终端下载指定的电子邮件，存储在给定Web服务器的盘中的网页（HTML文件等）等。或者，允许终端将其中包含的数据（或在该终端上编辑的文件和/或电子邮件）传送到连接到因特网的另一计算机系统，或者将该数据上传到给定Web服务器的盘。

5. 发明申请

US20100293344A1 APPARATUS AND METHOD FOR SELECTING A POSITION WHERE DATA IS STORED 失效
标题翻译：选择数据存储位置的装置和方法
公开(公告)号：US20100293344A1
公开(公告)日：2010-11-18
申请号：US12775113
申请日：2010-05-06
申请人： Kiyoshi Nishino , Kiyoshi Takemura , Nobuyoshi Tanaka
发明人： Kiyoshi Nishino , Kiyoshi Takemura , Nobuyoshi Tanaka
IPC分类号： G06F12/00 , G11C7/10
CPC分类号： G11C15/00 , H03M7/3084
摘要： An apparatus and method are provided for selecting a specific position from a plurality of positions in a memory to which data elements are cyclically written. A specific data element is stored in the plurality of positions. The apparatus comprises a determination unit for determining whether the plurality of positions include any position in a specific area of the memory to which data elements are written in a current cycle. The apparatus further comprises a selection unit for selecting at least one position in the specific area out of the plurality of positions as the specific position if the determination unit determines that the plurality of positions include any position in the specific area, and for selecting at least one position out of the plurality of positions as the specific position if the determination unit determines that the plurality of positions do not include any position in the specific area.
摘要翻译：提供了一种用于从循环写入数据元素的存储器中的多个位置中选择特定位置的装置和方法。特定数据元素存储在多个位置。该装置包括确定单元，用于确定多个位置是否包括在当前周期中以数据元素写入的存储器的特定区域中的任何位置。所述装置还包括选择单元，用于如果所述确定单元确定所述多个位置包括所述特定区域中的任何位置，并且至少选择至少选择所述多个位置中的所述特定区域中的至少一个位置作为所述特定位置如果确定单元确定多个位置不包括特定区域中的任何位置，则在多个位置中的一个位置作为特定位置。

6. 发明授权

US5857024A IC card and authentication method for information processing apparatus 失效
标题翻译： IC卡和信息处理设备的认证方法
公开(公告)号：US5857024A
公开(公告)日：1999-01-05
申请号：US726304
申请日：1996-10-02
申请人： Kiyoshi Nishino , Takashi Oshiyama
发明人： Kiyoshi Nishino , Takashi Oshiyama
IPC分类号： G06F12/14 , G06F21/00 , G06F21/20 , G06F21/24 , G06K17/00 , G06K19/07 , G07F7/10 , G09C1/00 , H04L9/32 , H04L9/00
CPC分类号： G07F7/1008 , G06F21/34 , G06F21/445 , G06Q20/341 , G06Q20/4097
摘要： An IC card 30, which is employed to permit the exchange of secret information while ensuring that security is maintained, includes: a ROM 38 in which an ID is held; a clock 42; a RAM 40 in which a password is stored; a RAM 36 in which a ciphering program is stored; and a CPU 34 that executes a process. The ciphering program is loaded, the stored ID, password and the time t measured by the clock 42 are read and encoded in accordance with the ciphering program, and the results are outputted to a computer system 10. The computer system 10 decodes the output from the IC card 30 and extracts a password, and compares the decoded password with a registered password. When the passwords match, access is enabled; but when they do not match, access is disabled.
摘要翻译：用于允许在保证安全性的同时交换秘密信息的IC卡30包括：保持ID的ROM38; 时钟42; 存储密码的RAM40; 存储加密程序的RAM36; 以及执行处理的CPU 34。加密加密程序，根据加密程序对由时钟42测量的存储的ID，密码和时间t进行读取和编码，并将结果输出到计算机系统10.计算机系统10对 IC卡30并提取密码，并将解码的密码与注册密码进行比较。当密码匹配时，访问被启用; 但是当它们不匹配时，访问被禁用。

7. 发明申请

US20130159811A1 Method of Hybrid Compression Acceleration Utilizing Special and General Purpose Processors 有权
标题翻译：利用特殊通用处理器的混合压缩加速方法
公开(公告)号：US20130159811A1
公开(公告)日：2013-06-20
申请号：US13327111
申请日：2011-12-15
申请人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
发明人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
IPC分类号： H03M13/09
CPC分类号： H03M7/30 , H03M7/3086 , H03M13/09 , H03M13/6312
摘要： A novel and useful hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
摘要翻译：一种新颖有用的混合机制，其硬件加速与软件相结合，使得实现的压缩率显着增加，同时保持原始压缩比（例如，使用完全DHT而不是SHT或近似）。压缩加速机制适用于与通用处理器紧密耦合的硬件加速器。压缩任务在硬件和软件之间进行分割和并行化，其中每个压缩任务分为两个加速请求：使用硬件加速执行SHT编码并提供后LZ频率统计的第一请求; 以及使用在软件中生成的DHT来执行SHT解码和DHT编码的第二请求。

8. 发明授权

US07035994B2 Storage device, information processing system having storage device, format method for storage device, data recording method, and program for implementing formatting and data recording 失效
标题翻译：存储装置，具有存储装置的信息处理系统，存储装置的格式化方法，数据记录方法以及用于实现格式化和数据记录的程序
公开(公告)号：US07035994B2
公开(公告)日：2006-04-25
申请号：US10454141
申请日：2003-06-03
申请人： Nobuyoshi Tanaka , Kiyoshi Nishino , Akihiro Ogura
发明人： Nobuyoshi Tanaka , Kiyoshi Nishino , Akihiro Ogura
IPC分类号： G06F12/00
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0689 , G06F12/0866 , G11B20/1217
摘要： To provide a storage device capable of shortening a formatting time and a data recording time, and an information processing system, method and program. The storage device of the invention has at least one storage medium 40, storing means 32 for storing plural patterns of format data for each pattern, receiving means 34 for receiving a sector address specifying a sector of the storage medium 40 to be written and a pattern identifier specifying a pattern of the format data to be written, and writing means 36 for reading the format data having the pattern corresponding to the pattern identifier from the storing means 32 and writing the read format data into the sector of the storage medium 40 corresponding to the received sector address.
摘要翻译：提供能够缩短格式化时间和数据记录时间的存储装置，以及信息处理系统，方法和程序。本发明的存储装置具有至少一个存储介质40，存储装置32，用于存储每种模式的格式数据的多种格式;接收装置34，用于接收指定要写入的存储介质40的扇区的扇区地址和模式指定要写入的格式数据的模式的标识符;以及写入装置36，用于从存储装置32读取具有对应于模式标识符的模式的格式数据，并将读取的格式数据写入对应于接收的扇区地址。

9. 发明授权

US4890804A Turnout unit for railway track 失效
标题翻译：轨道道岔单位
公开(公告)号：US4890804A
公开(公告)日：1990-01-02
申请号：US146676
申请日：1988-01-21
申请人： Tomihiko Teramoto , Hidehiko Ono , Sadanobu Ito , Kiyoshi Nishino
发明人： Tomihiko Teramoto , Hidehiko Ono , Sadanobu Ito , Kiyoshi Nishino
IPC分类号： E01B7/22 , E01B7/00 , E01B7/02 , E01B9/68
CPC分类号： E01B7/02 , E01B2202/042 , E01B2202/06
摘要： Disclosed is an improved turnout unit to be employed in turnout point of railway tracks, which does not necessitate maintenance of the sliding surface of the base plate. In the turnout unit of the present invention, a spray-coated ceramic layer is formed on the base plate and the tongue rail slides on the ceramic layer.
摘要翻译：公开了一种改进的道岔单元，其不需要维护基板的滑动表面，而在轨道的道岔点处采用。在本发明的投票单元中，在基板上形成喷涂陶瓷层，并且在轨道上在陶瓷层上滑动。

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