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    • 1. 发明授权
    • Nonvolatile ferroelectric-semiconductor memory
    • 非易失性铁电半导体存储器
    • US5541871A
    • 1996-07-30
    • US374246
    • 1995-01-18
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • G11C14/00G11C11/22G11C16/04G11C17/00H01L21/8246H01L21/8247H01L27/10H01L27/105H01L29/788H01L29/792G11C7/00
    • G11C11/22
    • Nonvolatile memory with simple structure where recorded information can be read without destroy: Voltage is impressed to control gate CG and channel is grounded at writing operation. Ferroelectric layer 32 is polarized in accordance with whether the applied voltage is larger than threshold voltage of the memory device. Control gate voltage V.sub.CC to make channel is little when the ferro-electric layer 32 is polarized with control gate side being positive (polarized with second status). Control gate voltage V.sub.CG to make channel is large when the ferroelectric layer 32 is polarized with control gate side being negative (polarized with first status). The reference voltage V.sub.ref is impressed to the control gate CG at reading operation. Large drain current flows when the ferroelectric layer is polarized with second status and little drain current flows when the ferroelectric layer is polarized with first status. Recorded information can be read by detecting the drain current. By this reading operation, polarization status is not destroyed.
    • 具有简单结构的非易失性存储器,其中记录的信息可以被读取而不破坏:电压被施加到控制栅极CG,并且通道在写入操作时接地。 铁电层32根据所施加的电压是否大于存储器件的阈值电压而极化。 当铁电层32在控制栅极侧为正极化(极化具有第二状态)时,控制栅极电压VCC使沟道很小。 当铁电层32被极化,控制栅极侧为负极化(第一状态极化)时,控制栅极电压VCG使沟道大。 参考电压Vref在读取操作时被施加到控制栅极CG。 当铁电层以第二状态极化时,大的漏极电流流动,当铁电层以第一状态极化时,漏极电流很小。 通过检测漏极电流可以读取记录的信息。 通过这种阅读操作,极化状态不会被破坏。
    • 2. 发明授权
    • Nonvolatile memory
    • 非易失性存储器
    • US5541873A
    • 1996-07-30
    • US490816
    • 1995-06-15
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • G11C14/00G11C11/22G11C16/04G11C17/00H01L21/8246H01L21/8247H01L27/10H01L27/105H01L29/788H01L29/792
    • G11C11/22
    • A nonvolatile memory having a simple structure where recorded information can be read nondestructively. A voltage is applied between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the polarization of the applied voltage. A control gate voltage, necessary to form a channel, is small when the ferroelectric layer is polarized with the control gate side negative (polarized with second polarization). The control gate voltage V.sub.cg necessary to form a channel is large when the ferroelectric layer is polarized with the control gate side positive (polarized with first polarization). The reference voltage is applied to the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with the second polarization and a small drain current flows when the ferroelectric layer is polarized with the first polarization. Recorded information can be read by detecting the drain current. The polzarization state of the ferroelectric layer is not affected by the reading operation.
    • 具有简单结构的非易失性存储器,其中记录信息可被非破坏性地读取。 在控制栅极和写入存储器栅之间施加电压。 铁电层根据施加的电压的极化而极化。 当铁电层以控制栅极侧为负极化(以第二极化为极化)极化时,形成通道所需的控制栅极电压很小。 当铁电层以控制栅极正极化(以第一极化为极化)极化时,形成沟道所需的控制栅极电压Vcg大。 参考电压施加到控制门进行读取。 当铁电层与第二极化极化时,大的漏极电流流动,而当铁电层以第一极化极化时,漏极电流流过较小。 通过检测漏极电流可以读取记录的信息。 铁电层的极化状态不受读取操作的影响。
    • 4. 发明授权
    • Nonvolatile memory
    • 非易失性存储器
    • US5592409A
    • 1997-01-07
    • US374216
    • 1995-01-18
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • Kiyoshi NishimuraHideki HayashiJun MuramotoTakaaki FuchikamiHiromi Uenoyama
    • G11C14/00G11C11/22G11C16/04G11C17/00H01L21/8246H01L21/8247H01L27/10H01L27/105H01L29/788H01L29/792
    • G11C11/22G11C11/223
    • Nonvolatile memory with a simple structure where recorded information can be read without destruction: Voltage is impressed between control gate CG and memory gate MG at a writing operation. A ferroelectric layer 32 is polarized in accordance with the direction of the impressed voltage. The control gate voltage V.sub.CG to make a channel is low when the ferroelectric layer 32 is polarized with the control gate side being positive (polarized with second status). The control gate voltage V.sub.CG to make a channel is high when the ferroelectric layer 32 is polarized with the control gate side being negative (polarized with the first status). The reference voltage V.sub.ref is impressed to the control gate CG at the reading operation. A high drain current flows when the ferroelectric layer is polarized with the second status and low drain current flows when the ferroelectric layer is polarized with the first status. Recorded information can be read by detecting the drain current. With this reading operation, the polarization status is not destroyed.
    • 具有简单结构的非易失性存储器,其中记录的信息可以被读取而不会被破坏:在写入操作时在控制栅极CG和存储器门MG之间施加电压。 铁电层32根据外加电压的方向极化。 当铁电层32被极化而控制栅极侧为正极化(第二状态极化)时,使沟道的控制栅极电压VCG较低。 当铁电层32在控制栅极侧为负极化(以第一状态极化)为极化时,使沟道的控制栅极电压VCG较高。 参考电压Vref在读取操作时被施加到控制栅极CG。 当铁电层以第二状态极化并且当铁电层以第一状态极化时,低漏极电流流动时,高漏极电流流动。 通过检测漏极电流可以读取记录的信息。 通过这种阅读操作,极化状态不会被破坏。
    • 7. 发明授权
    • Silicon carbide semiconductor device
    • 碳化硅半导体器件
    • US08766278B2
    • 2014-07-01
    • US13565388
    • 2012-08-02
    • Hideki Hayashi
    • Hideki Hayashi
    • H01L29/15H01L21/8238
    • H01L27/088H01L21/8213
    • First, second, fourth, and fifth impurity regions have a first conductivity type, and a third impurity region has a second conductivity type. The first to third impurity regions reach a first layer having the first conductivity type. The fourth and fifth impurity regions are provided on a second layer. First to fifth electrodes are provided on the first to fifth impurity regions, respectively. Electrical connection is established between the first and fifth electrodes, and between the third and fourth electrodes. A sixth electrode is provided on a gate insulating film covering a portion between the fourth and fifth impurity regions.
    • 第一,第二,第四和第五杂质区具有第一导电类型,第三杂质区具有第二导电类型。 第一至第三杂质区域到达具有第一导电类型的第一层。 第四和第五杂质区设置在第二层上。 第一至第五电极分别设置在第一至第五杂质区上。 在第一和第五电极之间以及第三和第四电极之间建立电连接。 第六电极设置在覆盖第四和第五杂质区域之间的部分的栅极绝缘膜上。
    • 10. 发明授权
    • Direct-current motor control device and method for detecting state of direct-current motor
    • 直流马达控制装置及直流马达状态检测方法
    • US08424839B2
    • 2013-04-23
    • US13020207
    • 2011-02-03
    • Hideki HayashiSatoru Hiramoto
    • Hideki HayashiSatoru Hiramoto
    • F16K31/02
    • H02K23/66F02D41/005H02P7/03Y02T10/47
    • A current detection unit detects an electric current caused by superimposing a direct current from a direct-current power source on an alternating current from an alternating-current power source and supplied through a brush to a direct-current motor. An extracting unit extracts an alternating-current component of the detected electric current. An angle detection unit detects a rotation angle of the motor according to the extracted alternating-current component. A direction detection unit detects a rotative direction of the motor according to a change pattern of the extracted alternating-current component. A core of the motor has slots each defined between adjacent two of teeth. The slots respectively accommodate phase coils respectively wound around the teeth. Turns of the phase coils are different from each other.
    • 电流检测单元通过将来自直流电源的直流电叠加到来自交流电源的交流电并通过电刷提供给直流电动机而引起的电流。 提取单元提取检测到的电流的交流分量。 角度检测单元根据所提取的交流分量检测电动机的旋转角度。 方向检测单元根据所提取的交流分量的变化模式来检测电动机的旋转方向。 电动机的铁芯在相邻的两个齿之间具有槽。 这些槽分别容纳分别缠绕在齿上的相位线圈。 相位线圈的转数彼此不同。