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1. 发明授权

US07298754B1 Configurable switch fabric interface bandwidth system and method 有权
标题翻译：可配置的交换矩阵接口带宽系统和方法
公开(公告)号：US07298754B1
公开(公告)日：2007-11-20
申请号：US10403964
申请日：2003-03-31
申请人： Kirk Alvin Miller , Prayag Bhanubhai Patel , George Beshara Bendak , Kenneth Yi Yun , Sushil Kumar Singh , Ayoob Eusoof Dooply , Michael John Hellmer
发明人： Kirk Alvin Miller , Prayag Bhanubhai Patel , George Beshara Bendak , Kenneth Yi Yun , Sushil Kumar Singh , Ayoob Eusoof Dooply , Michael John Hellmer
IPC分类号： H04L12/56
CPC分类号： H04L49/252 , G06F8/34 , H04L49/205 , H04L49/3018 , H04L49/3027 , H04L49/503
摘要： A system and method are provided for configuring interface bandwidths in a packet communications switch fabric. The method comprises: interfacing data links with a first plurality of traffic managers (TMs); differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs; and, communicating packets information with the TMs at a first plurality of data rates corresponding to the first plurality of subchannels. More specifically, differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs includes: differentiating a second plurality of ingress data links into a third plurality of ingress subchannels associated with a third plurality of ingress traffic managers (iTMs); and, differentiating a fourth plurality of egress data links into a fifth plurality of egress subchannels associated with a fifth plurality of egress TMs (eTMs).
摘要翻译：提供了一种用于在分组通信交换结构中配置接口带宽的系统和方法。该方法包括：将数据链路与第一多个业务管理器（TM）进行接口; 将端口卡接口端口区分成与第一多个TM相关联的第一多个子信道; 以及以与所述第一多个子信道对应的第一多个数据速率与所述TM通信分组信息。更具体地，将端口卡接口端口区分为与第一多个TM相关联的第一多个子信道包括：将第二多个入口数据链路区分为与第三多个入口业务管理器（iTM）相关联的第三多个入口子信道， ; 以及将第四多个出口数据链路区分为与第五多个出口TM（eTM）相关联的第五多个出口子信道。

2. 发明授权

US07221652B1 System and method for tolerating data link faults in communications with a switch fabric 有权
标题翻译：用于容忍与交换结构通信中的数据链路故障的系统和方法
公开(公告)号：US07221652B1
公开(公告)日：2007-05-22
申请号：US10378480
申请日：2003-03-03
申请人： Sushil Kumar Singh , Kenneth Yi Yun , Jianfeng Shi , Eli James Aubrey Fernald , Kirk Alvin Miller , Prayag Bhanubhai Patel , Ayoob Eusoof Dooply , George Beshara Bendak
发明人： Sushil Kumar Singh , Kenneth Yi Yun , Jianfeng Shi , Eli James Aubrey Fernald , Kirk Alvin Miller , Prayag Bhanubhai Patel , Ayoob Eusoof Dooply , George Beshara Bendak
IPC分类号： G01R31/08
CPC分类号： H04L12/5601 , H04L49/106 , H04L2012/5665 , H04L2012/5675
摘要： A system and method are provided for tolerating data line faults in a packet communications network. The method comprises: serially transmitting information packets from at least one traffic manager (TM); at a switch fabric, accepting information packets at a plurality of ingress ports, the information packets addressing destination port card egress ports; selectively connecting port card ingress ports to port card egress ports; serially supplying information packets from a plurality of port card egress ports; sensing a connection fault between the switch fabric and the TM; and, in response to sensing the fault, reselecting connections between the switch fabric port card ports and the TM. Some aspects comprise: an ingress memory subsystem (iMS) receiving cells on an ingress port exceeding an error threshold. Then, reselecting connections between the port card ports and the TM includes the iMS sending a message to the iTM identifying the faulty ingress connection.
摘要翻译：提供了一种用于容忍分组通信网络中的数据线路故障的系统和方法。该方法包括：从至少一个业务管理器（TM）串行发送信息分组; 在交换结构中，接收多个入口端口的信息分组，所述信息分组寻址目的地端口卡出口; 将端口卡入口端口选择性连接到端口卡出口端口; 从多个端口卡出口端口串行提供信息包; 感测交换结构与TM之间的连接故障; 并且响应于感测到故障，重新选择交换结构端口卡端口和TM之间的连接。一些方面包括：入口存储器子系统（iMS）在入口端口上接收超过错误阈值的小区。然后，重新选择端口卡端口和TM之间的连接包括iMS向iTM发送消息，以识别错误的入口连接。

3. 发明授权

US07352694B1 System and method for tolerating data link faults in a packet communications switch fabric 有权
标题翻译：用于容忍数据包通信交换结构中的数据链路故障的系统和方法
公开(公告)号：US07352694B1
公开(公告)日：2008-04-01
申请号：US10373139
申请日：2003-02-24
申请人： Philip Michael Clovis , Eli James Aubrey Fernald , John David Huber , Kirk Alvin Miller , Sushil Kumar Singh , Prayag Bhanubhai Patel , Kenneth Yi Yun , George Beshara Bendak
发明人： Philip Michael Clovis , Eli James Aubrey Fernald , John David Huber , Kirk Alvin Miller , Sushil Kumar Singh , Prayag Bhanubhai Patel , Kenneth Yi Yun , George Beshara Bendak
IPC分类号： G01R31/08 , G06F11/00
CPC分类号： H04L49/252 , G06F8/34 , H04L49/205 , H04L49/3018 , H04L49/3027 , H04L49/503
摘要： A system and method are provided for tolerating data line faults in a packet communications switch fabric. The method comprises: accepting information packets including a plurality of cells, at a plurality of ingress port card ports, the plurality of information packets addressing a plurality of egress port card ports; selectively connecting port card ports to port card backplane data links; selectively connecting port card backplane data links and crossbars; sensing a connection fault in a backplane data link; in response to sensing the fault, reselecting connections between the port card ports and the port card backplane data links; in response to reselecting connections between the port card ports and the port card backplane data links, serially transferring packets through the port cards; serially transferring packets through the crossbars to the egress port cards; and, suspending use of the faulty connection.
摘要翻译：提供了一种用于容忍分组通信交换结构中的数据线路故障的系统和方法。所述方法包括：在多个入口端口卡端口处接收包括多个小区的信息分组，所述多个信息分组寻址多个出口端口卡端口; 选择性地将端口卡端口连接到端口卡背板数据链路; 有选择地连接端口卡背板数据链接和交叉栏; 感测背板数据链路中的连接故障; 响应感测故障，重新选择端口卡端口和端口卡背板数据链路之间的连接; 响应重新选择端口卡端口和端口卡背板数据链路之间的连接，通过端口卡串行传输数据包; 将数据包通过十字准线串行传输到出口端口卡; 并暂停使用故障连接。

4. 发明授权

US07304987B1 System and method for synchronizing switch fabric backplane link management credit counters 有权
标题翻译：交换机背板链路管理信用计数器同步的系统和方法
公开(公告)号：US07304987B1
公开(公告)日：2007-12-04
申请号：US10395367
申请日：2003-03-24
申请人： Kevin Warren James , Kenneth Yi Yun , Sushil Kumar Singh , Viet Linh Do , Michael John Hellmer , Kirk Alvin Miller , Jianfeng Shi , George Beshara Bendak
发明人： Kevin Warren James , Kenneth Yi Yun , Sushil Kumar Singh , Viet Linh Do , Michael John Hellmer , Kirk Alvin Miller , Jianfeng Shi , George Beshara Bendak
IPC分类号： H04L12/50
CPC分类号： H04L49/252 , G06F8/34 , H04L49/205 , H04L49/3018 , H04L49/3027 , H04L49/503
摘要： A system and method are provided for resynchronizing backplane link management credit counters in a packet communications switch fabric. The method comprises: at an input port card ingress port, accepting information packets including cells and cell headers with destination information; modifying the destination information in the received cell headers; routing information packets between the input port card and output port cards on backplane data links through an intervening crossbar; at the input port card, maintaining a credit counter for each output port card channel; decrementing the counter in response to transmitting cells from the input port card; generating credits in response to transmitting cells from an output port card channel; sending the generated credits to increment the counter, using the modified destination information; and, using the generated credit flow to resynchronize the credit counter.
摘要翻译：提供了用于在分组通信交换结构中重新同步背板链路管理信用计数器的系统和方法。该方法包括：在输入端口卡入口端口，接收包括具有目的地信息的小区和小区标题的信息分组; 修改所接收的信元头部中的目的地信息; 在输入端口卡和输出端口卡之间通过插入式交叉开关将信息包路由在背板数据链路上; 在输入端口卡处，保持每个输出端口卡通道的信用计数器; 响应于从输入端口卡传输单元而递减计数器; 响应于从输出端口卡信道发送信元而产生信用; 使用修改的目的地信息发送生成的信用以增加计数器; 并使用生成的信用流来重新同步信用计数器。

5. 发明授权

US07230947B1 Minimum latency cut-through switch fabric 有权
标题翻译：最小延迟直通交换矩阵
公开(公告)号：US07230947B1
公开(公告)日：2007-06-12
申请号：US10378502
申请日：2003-03-03
申请人： John David Huber , Kirk Alvin Miller , Michael John Hellmer , Kenneth Yi Yun , Kevin Warren James , George Beshara Bendak
发明人： John David Huber , Kirk Alvin Miller , Michael John Hellmer , Kenneth Yi Yun , Kevin Warren James , George Beshara Bendak
IPC分类号： H04Q11/00
CPC分类号： H04L12/5601 , H04L49/106 , H04L2012/5665 , H04L2012/5675
摘要： A system and method are provided for cut-through packet routing in a packet communications switch fabric. The method comprises: accepting information packets addressed to a plurality of output port card egress ports at an input port card ingress port; routing information packets between port cards on backplane data links through an intervening crossbar; maintaining a credit counter for each port card egress destination, at the input port card; decrementing the counter in response to transmitting cells in a packet from the input port card; and, incrementing the counter in response to transmitting cells from the packet at the output port card. In some aspects of the method, accepting information includes buffering the packets in an ingress memory subsystem (iMS). Routing information includes the iMS transmitting buffered packets on a selected backplane data link. Decrementing the counter includes the iMS communicating with the iPQ in response to transmitting a cell.
摘要翻译：提供了一种用于分组通信交换结构中的直通分组路由的系统和方法。该方法包括：接收寻址到输入端口卡入口的多个输出端口卡出口端口的信息包; 在背板数据链路上的端口卡之间通过插入的交叉开关路由信息包; 在输入端口卡上维护每个端口卡出口目的地的信用计数器; 响应于来自输入端口卡的分组中的传输小区而递减计数器; 并且响应于从输出端口卡处的分组发送小区而递增计数器。在该方法的某些方面，接收信息包括缓冲入口存储器子系统（iMS）中的分组。路由信息包括在选定的背板数据链路上发送缓冲的分组的iMS。减少计数器包括响应于传输单元而与iPQ通信的iMS。

6. 发明授权

US07298756B1 System and method for programming cell packet headers 有权
标题翻译：用于编程单元包头的系统和方法
公开(公告)号：US07298756B1
公开(公告)日：2007-11-20
申请号：US10403979
申请日：2003-03-31
申请人： Kirk Alvin Miller , Prayag Bhanubhai Patel , Peter John Holzer , John Calvin Leung , George Beshara Bendak , Jim Lew
发明人： Kirk Alvin Miller , Prayag Bhanubhai Patel , Peter John Holzer , John Calvin Leung , George Beshara Bendak , Jim Lew
IPC分类号： H04B7/212
CPC分类号： H04L49/252 , G06F8/34 , H04L49/205 , H04L49/3018 , H04L49/3027 , H04L49/503
摘要： A system and method are provided for controlling packet header information in a packet communications switch fabric. The method comprises: programming the cell header overhead (OH) field definitions; accepting a packet including a plurality of cells and corresponding cell headers, each cell header including a plurality of overhead fields; defining the cell header OH fields; and, transmitting the packet. Defining the cell header OH fields includes defining cell header OH field location, position, meaning, structure, and length. In other aspects, the method comprises redefining the cell header overhead fields, once they are accepted. For example, the OH field information can be modified, relocated, or an OH field can be added to the cell header. In yet other aspects, the OH field information can be extracted and/or reformatted.
摘要翻译：提供了一种用于控制分组通信交换结构中的分组报头信息的系统和方法。该方法包括：对单元头开销（OH）字段定义进行编程; 接收包括多个小区和对应的小区标题的分组，每个小区头包括多个开销字段; 定义单元格头部OH字段; 并且发送分组。定义单元格标题OH字段包括定义单元格头部OH字段位置，位置，意义，结构和长度。在其他方面，该方法包括重新定义单元头开销字段，一旦被接受。例如，可以修改，重定位OH字段信息，或者可以将OH字段添加到单元头。在其他方面，可以提取和/或重新格式化OH场信息。

7. 发明授权

US07242686B1 System and method for communicating TDM traffic through a packet switch fabric 有权
标题翻译：通过分组交换结构传送TDM业务的系统和方法
公开(公告)号：US07242686B1
公开(公告)日：2007-07-10
申请号：US10403566
申请日：2003-03-31
申请人： David Thomas Dougherty , Michael Alec Sluyski , Kenneth Yi Yun , George Beshara Bendak , John David Huber , Kirk Alvin Miller , Peter John Holzer
发明人： David Thomas Dougherty , Michael Alec Sluyski , Kenneth Yi Yun , George Beshara Bendak , John David Huber , Kirk Alvin Miller , Peter John Holzer
IPC分类号： H04L12/56
CPC分类号： H04L12/5601 , H04L49/106 , H04L2012/5665 , H04L2012/5675
摘要： A system and method are provided for communicating TDM communications through a packet switch fabric. The method comprises: accepting native TDM frames; converting the native TDM frames to fabric-cellified TDM frames; differentiating the cells of each frame into time slots; interleaving the frame time slots; TDM scheduling the interleaved frame time slots; and, routing the interleaved frame time slots between input port cards and output port cards on backplane data links through an intervening crossbar. TDM scheduling the interleaved frame time slots includes: an input port card ingress memory subsystem (iMS) receiving a first TDM configuration schedule including interleaved frame time slots cross-referenced to backplane transmission times; and, an output port card egress MS (eMS) receiving a second TDM configuration schedule including interleaved frame time slots cross-referenced to egress channel transmission times. Then, the routing is performed in response to the TDM schedules.
摘要翻译：提供了一种用于通过分组交换结构传送TDM通信的系统和方法。该方法包括：接收本机TDM帧; 将本机TDM帧转换成结构化的TDM帧; 将每个帧的单元区分成时隙; 交织帧时隙; TDM调度交错帧时隙; 并且通过插入的交叉开关将输入端口卡和输出端口卡之间的交错帧时隙路由在背板数据链路上。 TDM调度交错帧时隙包括：接收第一TDM配置调度的输入端口卡入口存储器子系统（iMS），其包括交叉参考背板传输时间的交织帧时隙; 以及输出端口卡出口MS（eMS），其接收第二TDM配置调度，所述第二TDM配置调度包括交叉参考出口信道传输时间的交织帧时隙。然后，响应于TDM时间表执行路由。

8. 发明授权

US07158535B1 System and method for translating overhead bytes in a multidimensional digital frame structure 有权
标题翻译：用于在多维数字帧结构中翻译开销字节的系统和方法
公开(公告)号：US07158535B1
公开(公告)日：2007-01-02
申请号：US09746159
申请日：2000-12-22
申请人： George Beshara Bendak , Alan Michael Sorgi
发明人： George Beshara Bendak , Alan Michael Sorgi
IPC分类号： H04J3/06 , H04L12/56
CPC分类号： H04J3/1617 , H04L69/08 , H04L69/12 , H04L69/18
摘要： A system and method have been provided for translating digitally wrapped communications between networks using different protocols. This invention makes use of an integrated circuit (IC) relay with programmable features to modify the locations and functions of overhead bytes between the receive and transmit sides of the device, permitting two dissimilar networks to be bridged. That is, the IC relay converts frame formatting from one frame structure to another, so that incompatible networks can communicate.
摘要翻译：已经提供了一种用于在使用不同协议的网络之间翻译数字封装通信的系统和方法。本发明利用具有可编程特征的集成电路（IC）继电器来修改设备的接收侧和发送侧之间的开销字节的位置和功能，从而允许桥接两个不同的网络。也就是说，IC中继将帧格式从一帧结构转换到另一帧结构，使得不兼容的网络可以通信。

9. 发明授权

US06993700B1 System and method for generating forward error correction based alarms 失效
标题翻译：用于产生基于前向纠错的报警的系统和方法
公开(公告)号：US06993700B1
公开(公告)日：2006-01-31
申请号：US10037959
申请日：2001-12-21
申请人： Andrew Mark Player , George Beshara Bendak
发明人： Andrew Mark Player , George Beshara Bendak
IPC分类号： H03M13/00 , G06F11/00
CPC分类号： H04L1/0045
摘要： A system and method are provided for generating alarms from forward error correction (FEC) data in a G.709 network-connected integrated circuit. The method includes: receiving messages including forward error correction bytes; using the forward error correction bytes to detect errors in the messages; and, generating alarm signals in response to the detected errors. Generating alarm signals in response to the detected errors includes generating a signal degrade (SD) signal in response to detecting a first number of errors (error density) within a predetermined time period. Likewise, generating alarm signals in response to the detected errors includes generating a signal fail (SF) signal in response to detecting a second number of errors (second error density), greater than the first number, within the predetermined time period. The method further includes: selecting an error type. Then, alarm signals are generated in response to the selected error type. The error types include a “1s” density alarm, a “0s” density alarm, a bytes density alarm, and a sub-row density alarm.
摘要翻译：提供了一种用于从G.709网络连接集成电路中的前向纠错（FEC）数据产生报警的系统和方法。该方法包括：接收包括前向纠错字节的消息; 使用前向纠错字节来检测消息中的错误; 并响应于检测到的错误产生报警信号。响应于检测到的错误产生报警信号包括响应于在预定时间段内检测到第一数量的错误（误差密度）产生信号降级（SD）信号。类似地，响应于检测到的错误产生报警信号包括响应于在预定时间段内检测大于第一数量的第二数量的误差（第二误差密度）来产生信号故障（SF）信号。该方法还包括：选择错误类型。然后，响应所选择的错误类型产生报警信号。错误类型包括“1s”密度报警，“0s”浓度报警，字节密度报警和子行密度报警。

10. 发明授权

US07058090B1 System and method for paralleling digital wrapper data streams 有权
标题翻译：用于并行数字包装数据流的系统和方法
公开(公告)号：US07058090B1
公开(公告)日：2006-06-06
申请号：US10023675
申请日：2001-12-18
申请人： Andrew Mark Player , Alan Michael Sorgi , George Beshara Bendak
发明人： Andrew Mark Player , Alan Michael Sorgi , George Beshara Bendak
IPC分类号： H04J3/04
CPC分类号： H04J3/062 , H04J3/1611
摘要： A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.
摘要翻译：提供了一种用于在连接的集成电路的G.709网络中并行数据流的系统和方法。该系统包括用于接收具有第一数据速率的第一数字包装数据流的解复用器。解复用器将第一数据流解复用为具有小于第一数据速率的第二数据速率的第二多个数字封装数据流。第二多个处理器各自接受第二多个数据流中的对应的一个，并以第二数据速率提供经处理的数据流。解复用器在每个第一数据流帧的开销中接收帧对准信号字节，并将第二多个数据流中的每一个中的帧对准信号字节同步到第一数据流中的帧对准信号字节。

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