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    • 3. 发明授权
    • Minimum latency cut-through switch fabric
    • 最小延迟直通交换矩阵
    • US07230947B1
    • 2007-06-12
    • US10378502
    • 2003-03-03
    • John David HuberKirk Alvin MillerMichael John HellmerKenneth Yi YunKevin Warren JamesGeorge Beshara Bendak
    • John David HuberKirk Alvin MillerMichael John HellmerKenneth Yi YunKevin Warren JamesGeorge Beshara Bendak
    • H04Q11/00
    • H04L12/5601H04L49/106H04L2012/5665H04L2012/5675
    • A system and method are provided for cut-through packet routing in a packet communications switch fabric. The method comprises: accepting information packets addressed to a plurality of output port card egress ports at an input port card ingress port; routing information packets between port cards on backplane data links through an intervening crossbar; maintaining a credit counter for each port card egress destination, at the input port card; decrementing the counter in response to transmitting cells in a packet from the input port card; and, incrementing the counter in response to transmitting cells from the packet at the output port card. In some aspects of the method, accepting information includes buffering the packets in an ingress memory subsystem (iMS). Routing information includes the iMS transmitting buffered packets on a selected backplane data link. Decrementing the counter includes the iMS communicating with the iPQ in response to transmitting a cell.
    • 提供了一种用于分组通信交换结构中的直通分组路由的系统和方法。 该方法包括:接收寻址到输入端口卡入口的多个输出端口卡出口端口的信息包; 在背板数据链路上的端口卡之间通过插入的交叉开关路由信息包; 在输入端口卡上维护每个端口卡出口目的地的信用计数器; 响应于来自输入端口卡的分组中的传输小区而递减计数器; 并且响应于从输出端口卡处的分组发送小区而递增计数器。 在该方法的某些方面,接收信息包括缓冲入口存储器子系统(iMS)中的分组。 路由信息包括在选定的背板数据链路上发送缓冲的分组的iMS。 减少计数器包括响应于传输单元而与iPQ通信的iMS。
    • 9. 发明授权
    • System and method for generating forward error correction based alarms
    • 用于产生基于前向纠错的报警的系统和方法
    • US06993700B1
    • 2006-01-31
    • US10037959
    • 2001-12-21
    • Andrew Mark PlayerGeorge Beshara Bendak
    • Andrew Mark PlayerGeorge Beshara Bendak
    • H03M13/00G06F11/00
    • H04L1/0045
    • A system and method are provided for generating alarms from forward error correction (FEC) data in a G.709 network-connected integrated circuit. The method includes: receiving messages including forward error correction bytes; using the forward error correction bytes to detect errors in the messages; and, generating alarm signals in response to the detected errors. Generating alarm signals in response to the detected errors includes generating a signal degrade (SD) signal in response to detecting a first number of errors (error density) within a predetermined time period. Likewise, generating alarm signals in response to the detected errors includes generating a signal fail (SF) signal in response to detecting a second number of errors (second error density), greater than the first number, within the predetermined time period. The method further includes: selecting an error type. Then, alarm signals are generated in response to the selected error type. The error types include a “1s” density alarm, a “0s” density alarm, a bytes density alarm, and a sub-row density alarm.
    • 提供了一种用于从G.709网络连接集成电路中的前向纠错(FEC)数据产生报警的系统和方法。 该方法包括:接收包括前向纠错字节的消息; 使用前向纠错字节来检测消息中的错误; 并响应于检测到的错误产生报警信号。 响应于检测到的错误产生报警信号包括响应于在预定时间段内检测到第一数量的错误(误差密度)产生信号降级(SD)信号。 类似地,响应于检测到的错误产生报警信号包括响应于在预定时间段内检测大于第一数量的第二数量的误差(第二误差密度)来产生信号故障(SF)信号。 该方法还包括:选择错误类型。 然后,响应所选择的错误类型产生报警信号。 错误类型包括“1s”密度报警,“0s”浓度报警,字节密度报警和子行密度报警。
    • 10. 发明授权
    • System and method for paralleling digital wrapper data streams
    • 用于并行数字包装数据流的系统和方法
    • US07058090B1
    • 2006-06-06
    • US10023675
    • 2001-12-18
    • Andrew Mark PlayerAlan Michael SorgiGeorge Beshara Bendak
    • Andrew Mark PlayerAlan Michael SorgiGeorge Beshara Bendak
    • H04J3/04
    • H04J3/062H04J3/1611
    • A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.
    • 提供了一种用于在连接的集成电路的G.709网络中并行数据流的系统和方法。 该系统包括用于接收具有第一数据速率的第一数字包装数据流的解复用器。 解复用器将第一数据流解复用为具有小于第一数据速率的第二数据速率的第二多个数字封装数据流。 第二多个处理器各自接受第二多个数据流中的对应的一个,并以第二数据速率提供经处理的数据流。 解复用器在每个第一数据流帧的开销中接收帧对准信号字节,并将第二多个数据流中的每一个中的帧对准信号字节同步到第一数据流中的帧对准信号字节。