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1. 发明授权

US07298754B1 Configurable switch fabric interface bandwidth system and method 有权
标题翻译：可配置的交换矩阵接口带宽系统和方法
公开(公告)号：US07298754B1
公开(公告)日：2007-11-20
申请号：US10403964
申请日：2003-03-31
申请人： Kirk Alvin Miller , Prayag Bhanubhai Patel , George Beshara Bendak , Kenneth Yi Yun , Sushil Kumar Singh , Ayoob Eusoof Dooply , Michael John Hellmer
发明人： Kirk Alvin Miller , Prayag Bhanubhai Patel , George Beshara Bendak , Kenneth Yi Yun , Sushil Kumar Singh , Ayoob Eusoof Dooply , Michael John Hellmer
IPC分类号： H04L12/56
CPC分类号： H04L49/252 , G06F8/34 , H04L49/205 , H04L49/3018 , H04L49/3027 , H04L49/503
摘要： A system and method are provided for configuring interface bandwidths in a packet communications switch fabric. The method comprises: interfacing data links with a first plurality of traffic managers (TMs); differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs; and, communicating packets information with the TMs at a first plurality of data rates corresponding to the first plurality of subchannels. More specifically, differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs includes: differentiating a second plurality of ingress data links into a third plurality of ingress subchannels associated with a third plurality of ingress traffic managers (iTMs); and, differentiating a fourth plurality of egress data links into a fifth plurality of egress subchannels associated with a fifth plurality of egress TMs (eTMs).
摘要翻译：提供了一种用于在分组通信交换结构中配置接口带宽的系统和方法。该方法包括：将数据链路与第一多个业务管理器（TM）进行接口; 将端口卡接口端口区分成与第一多个TM相关联的第一多个子信道; 以及以与所述第一多个子信道对应的第一多个数据速率与所述TM通信分组信息。更具体地，将端口卡接口端口区分为与第一多个TM相关联的第一多个子信道包括：将第二多个入口数据链路区分为与第三多个入口业务管理器（iTM）相关联的第三多个入口子信道， ; 以及将第四多个出口数据链路区分为与第五多个出口TM（eTM）相关联的第五多个出口子信道。

2. 发明授权

US07221652B1 System and method for tolerating data link faults in communications with a switch fabric 有权
标题翻译：用于容忍与交换结构通信中的数据链路故障的系统和方法
公开(公告)号：US07221652B1
公开(公告)日：2007-05-22
申请号：US10378480
申请日：2003-03-03
申请人： Sushil Kumar Singh , Kenneth Yi Yun , Jianfeng Shi , Eli James Aubrey Fernald , Kirk Alvin Miller , Prayag Bhanubhai Patel , Ayoob Eusoof Dooply , George Beshara Bendak
发明人： Sushil Kumar Singh , Kenneth Yi Yun , Jianfeng Shi , Eli James Aubrey Fernald , Kirk Alvin Miller , Prayag Bhanubhai Patel , Ayoob Eusoof Dooply , George Beshara Bendak
IPC分类号： G01R31/08
CPC分类号： H04L12/5601 , H04L49/106 , H04L2012/5665 , H04L2012/5675
摘要： A system and method are provided for tolerating data line faults in a packet communications network. The method comprises: serially transmitting information packets from at least one traffic manager (TM); at a switch fabric, accepting information packets at a plurality of ingress ports, the information packets addressing destination port card egress ports; selectively connecting port card ingress ports to port card egress ports; serially supplying information packets from a plurality of port card egress ports; sensing a connection fault between the switch fabric and the TM; and, in response to sensing the fault, reselecting connections between the switch fabric port card ports and the TM. Some aspects comprise: an ingress memory subsystem (iMS) receiving cells on an ingress port exceeding an error threshold. Then, reselecting connections between the port card ports and the TM includes the iMS sending a message to the iTM identifying the faulty ingress connection.
摘要翻译：提供了一种用于容忍分组通信网络中的数据线路故障的系统和方法。该方法包括：从至少一个业务管理器（TM）串行发送信息分组; 在交换结构中，接收多个入口端口的信息分组，所述信息分组寻址目的地端口卡出口; 将端口卡入口端口选择性连接到端口卡出口端口; 从多个端口卡出口端口串行提供信息包; 感测交换结构与TM之间的连接故障; 并且响应于感测到故障，重新选择交换结构端口卡端口和TM之间的连接。一些方面包括：入口存储器子系统（iMS）在入口端口上接收超过错误阈值的小区。然后，重新选择端口卡端口和TM之间的连接包括iMS向iTM发送消息，以识别错误的入口连接。

3. 发明授权

US06879596B1 System and method for systolic array sorting of information segments 失效
标题翻译：信息段收缩阵列排序的系统和方法
公开(公告)号：US06879596B1
公开(公告)日：2005-04-12
申请号：US09832784
申请日：2001-04-11
申请人： Ayoob Eusoof Dooply
发明人： Ayoob Eusoof Dooply
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L47/564 , H04L47/50 , H04L49/90 , H04L49/9047
摘要： A system and method have been provided for sorting information segments in a packet/cell earliest deadline first queue circuit. The invention permits information segments to be inserted at a rate that is twice as fast as the maximum extraction rate. Pairs of permanent and temporary registers are organized into a hierarchical sequence of stages. Generally, information segments with lower field ranks move systolically through the stages to temporary registers in higher sequence stages. Information segments with higher field ranks move systolically through the stages to permanent registers lower in the sequence of stages. The invention permits the highest rank information segments to be sorted and extracted with great efficiency.
摘要翻译：已经提供了一种系统和方法，用于对分组/小区中最早期限的第一队列电路中的信息段进行排序。本发明允许以比最大提取速率快两倍的速率插入信息段。一对永久性和临时性的登记册被组织成一个阶段级别的阶段。一般来说，具有较低字段级别的信息段在更高的序列阶段中通过阶段逐步移动到临时寄存器。具有较高场地等级的信息段在各阶段逐步移动到阶段级别的永久性寄存器。本发明允许以高效率对最高等级的信息段进行分类和提取。

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