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1. 发明授权

US4908333A Process for manufacturing a semiconductor device having a contact window defined by an inclined surface of a composite film 失效
标题翻译：具有由复合膜的倾斜面限定的接触窗的半导体器件的制造方法
公开(公告)号：US4908333A
公开(公告)日：1990-03-13
申请号：US168315
申请日：1988-03-17
申请人： Kimiaki Shimokawa , Hiroshi Hoga
发明人： Kimiaki Shimokawa , Hiroshi Hoga
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/3205 , H01L21/768
CPC分类号： H01L21/76804 , Y10S438/952 , Y10S438/978
摘要： An insulating film formed under a conductive film has a side wall defining a contact window and having the shape of a gently inclined curvilinear surface, so that the insulating film is able to provide a sufficient step coverage in the contact window. The insulating film is formed over the surface of a semiconductor substrate or a first conductive film. The insulating film has an increasing or decreasing refractive index over the depth thereof. A contact window is formed by selectively removing a portion of the insulating film using a photoresist pattern formed over the surface of the insulating film. A structure thus formed is subjected to an etching process capable of etching the upper layer of the insulating film at an etching rate higher than that for the lower layer of the same to etch the side wall of the insulating film defining the contact window into a gently inclined curvilinear surface, and then the photoresist pattern is removed. A second conductive film is formed over the surface of a structure formed in the preceding step.
摘要翻译：形成在导电膜下面的绝缘膜具有限定接触窗的侧壁，并且具有缓慢倾斜的曲线表面的形状，使得绝缘膜能够在接触窗口中提供足够的台阶覆盖。绝缘膜形成在半导体衬底或第一导电膜的表面上。绝缘膜在其深度上具有增加或减小的折射率。通过使用形成在绝缘膜的表面上的光致抗蚀剂图案选择性地去除绝缘膜的一部分来形成接触窗口。对如此形成的结构进行蚀刻处理，其能够以比其下层的蚀刻速率更高的蚀刻速率蚀刻绝缘膜的上层，以将限定接触窗口的绝缘膜的侧壁轻轻地蚀刻倾斜的曲线表面，然后去除光刻胶图案。在前一步骤中形成的结构的表面上形成第二导电膜。

2. 发明授权

US07989324B2 Method for manufacturing silicon on sapphire wafer 有权
标题翻译：在蓝宝石晶片上制造硅的方法
公开(公告)号：US07989324B2
公开(公告)日：2011-08-02
申请号：US12458321
申请日：2009-07-08
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/76251 , H01L21/86
摘要： The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
摘要翻译：本发明提供了一种SOS晶片，其包括设置在蓝宝石衬底的背面上的不透明多晶硅层，保护多晶硅层的氮化硅层和抵消在氮化硅层中产生的应力的应力缓和膜，其中氮化硅层和应力缓和膜设置在背面侧。

3. 发明申请

US20090275189A1 Method for manufacturing silicon on sapphire wafer 有权
标题翻译：在蓝宝石晶片上制造硅的方法
公开(公告)号：US20090275189A1
公开(公告)日：2009-11-05
申请号：US12458321
申请日：2009-07-08
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： H01L21/784
CPC分类号： H01L21/76251 , H01L21/86
摘要： The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
摘要翻译：本发明提供了一种SOS晶片，其包括设置在蓝宝石衬底的背面上的不透明多晶硅层，保护多晶硅层的氮化硅层和抵消在氮化硅层中产生的应力的应力缓和膜，其中氮化硅层和应力缓和膜设置在背面侧。

4. 发明申请

US20090085174A1 STRUCTURAL BODY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：结构体及其制造方法
公开(公告)号：US20090085174A1
公开(公告)日：2009-04-02
申请号：US12210259
申请日：2008-09-15
申请人： Shuichi Noda , Kimiaki Shimokawa
发明人： Shuichi Noda , Kimiaki Shimokawa
IPC分类号： H01L23/58 , H01L21/36
CPC分类号： H01L21/31612 , C23C16/24 , C23C16/4581 , H01L21/02164 , H01L21/02274 , H01L21/02532 , H01L21/02595 , H01L21/0262
摘要： The present invention includes a substrate structural body having a high electrostatic chuck force at a low voltage even when an insulated board is used, and a method for manufacturing the substrate structural body. As the substrate structural body, there is provided a substrate structural body for attaining its fixing by an electrostatic chuck mechanism, comprising at least a first polycrystalline silicon film formed on the back surface of a substrate comprised of an insulating material or its back and side surfaces, wherein a top layer of part of the back surface or the back and side surfaces is of a first silicon insulating film.
摘要翻译：本发明包括即使使用绝缘板也具有低电压下的高静电卡盘力的基板结构体及其制造方法。作为基板结构体，提供了一种用于通过静电卡盘机构实现其固定的基板结构体，该基板结构体至少包括形成在由绝缘材料或其背面和侧表面构成的基板的背面上的第一多晶硅膜其特征在于，所述后表面或所述背面和侧面的一部分的顶层为第一硅绝缘膜。

5. 发明授权

US07564100B2 Silicon on sapphire wafer 失效
标题翻译：蓝宝石晶圆上的硅
公开(公告)号：US07564100B2
公开(公告)日：2009-07-21
申请号：US11377394
申请日：2006-03-17
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： H01L21/86
CPC分类号： H01L21/76251 , H01L21/86
摘要： The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
摘要翻译：本发明提供了一种SOS晶片，其包括设置在蓝宝石衬底的背面上的不透明多晶硅层，保护多晶硅层的氮化硅层和抵消在氮化硅层中产生的应力的应力缓和膜，其中氮化硅层和应力缓和膜设置在背面侧。

6. 发明授权

US07893522B2 Structural body and manufacturing method thereof 有权
标题翻译：结构体及其制造方法
公开(公告)号：US07893522B2
公开(公告)日：2011-02-22
申请号：US12210259
申请日：2008-09-15
申请人： Shuichi Noda , Kimiaki Shimokawa
发明人： Shuichi Noda , Kimiaki Shimokawa
IPC分类号： H01L23/58
CPC分类号： H01L21/31612 , C23C16/24 , C23C16/4581 , H01L21/02164 , H01L21/02274 , H01L21/02532 , H01L21/02595 , H01L21/0262
摘要： The present invention includes a substrate structural body having a high electrostatic chuck force at a low voltage even when an insulated board is used, and a method for manufacturing the substrate structural body. As the substrate structural body, there is provided a substrate structural body for attaining its fixing by an electrostatic chuck mechanism, comprising at least a first polycrystalline silicon film formed on the back surface of a substrate comprised of an insulating material or its back and side surfaces, wherein a top layer of part of the back surface or the back and side surfaces is of a first silicon insulating film.
摘要翻译：本发明包括即使使用绝缘板也具有低电压下的高静电卡盘力的基板结构体及其制造方法。作为基板结构体，提供了一种用于通过静电卡盘机构实现其固定的基板结构体，该基板结构体至少包括形成在由绝缘材料或其背面和侧表面构成的基板的背面上的第一多晶硅膜其特征在于，所述后表面或所述背面和侧面的一部分的顶层为第一硅绝缘膜。

7. 发明申请

US20060214230A1 SOS wafer and manufacturing method thereof 失效
标题翻译： SOS晶片及其制造方法
公开(公告)号：US20060214230A1
公开(公告)日：2006-09-28
申请号：US11377394
申请日：2006-03-17
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L21/76251 , H01L21/86
摘要： The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
摘要翻译：本发明提供了一种SOS晶片，其包括设置在蓝宝石衬底的背面上的不透明多晶硅层，保护多晶硅层的氮化硅层和抵消在氮化硅层中产生的应力的应力缓和膜，其中氮化硅层和应力缓和膜设置在背面侧。

8. 发明授权

US06682405B2 Polishing apparatus having a dresser and dresser adjusting method 失效
标题翻译：抛光装置具有梳妆台和梳妆台调整方法
公开(公告)号：US06682405B2
公开(公告)日：2004-01-27
申请号：US09906799
申请日：2001-07-18
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： B24B100
CPC分类号： B24B53/017 , B24B53/12
摘要： The polishing particle surface of the dresser of a chemical mechanical polishing apparatus used for a planarization process in manufacturing semiconductor devices is inclined. Moreover, the pressure to be applied onto the polishing surface of the dresser is linearly varied with a nonzero slope.
摘要翻译：用于制造半导体器件的平坦化处理的化学机械抛光装置的修整器的抛光颗粒表面是倾斜的。此外，施加到修整器的抛光表面上的压力以非零斜率线性地变化。

9. 发明授权

US5749772A Method and apparatus for polishing wafer 失效
标题翻译：抛光晶圆的方法和装置
公开(公告)号：US5749772A
公开(公告)日：1998-05-12
申请号：US756902
申请日：1996-12-02
申请人： Kimiaki Shimokawa
发明人： Kimiaki Shimokawa
IPC分类号： B24B1/00 , B24B53/007 , B24B53/017 , H01L21/304 , B24B53/00
CPC分类号： B24B53/017 , B24B37/04
摘要： A polishing pad is conditioned using a conditioning disc whose temperature is controlled upon Chemical Mechanical Polish. The temperature of the polishing pad remains unchanged upon conditioning and uniform CMP can be carried out.
摘要翻译：抛光垫使用温度受化学机械抛光控制的调节盘进行调理。抛光垫的温度在调节时保持不变，可以进行均匀的CMP。

10. 发明授权

US5424253A Method for manufacturing an inter-layer insulating film 失效
标题翻译：制造层间绝缘膜的方法
公开(公告)号：US5424253A
公开(公告)日：1995-06-13
申请号：US26291
申请日：1993-03-04
申请人： Takashi Usami , Masaki Yoshimaru , Kimiaki Shimokawa
发明人： Takashi Usami , Masaki Yoshimaru , Kimiaki Shimokawa
IPC分类号： H01L21/31 , H01L21/316 , H01L21/318 , H01L21/321 , H01L21/768 , H01L23/522
CPC分类号： H01L21/02164 , H01L21/02271 , H01L21/02304 , H01L21/31608 , H01L21/3185 , H01L21/3211
摘要： A method for manufacturing an inter-layer insulating film (ex. O.sub.3, TEOS or NSG) with a superior surface flatness is disclosed to solve the problem that the surface of the inter-layer film formed on a certain under-layer substrate reveals roughness due to the influence of the substrate. It is provided a method for manufacturing O.sub.3 TEOS NSG film after doping nitrogen (N) atoms into the under-layer films, or after forming the under-layer films which contain nitrogen (N) atoms therein.
摘要翻译：公开了一种具有优异表面平坦度的层间绝缘膜（例如O3，TEOS或NSG）的制造方法，以解决在某一底层基板上形成的层间膜的表面显示粗糙度的问题对基板的影响。提供了在将氮（N）原子掺杂到下层膜中之后或在其中形成含有氮（N））的底层膜之后，制造O 3 TEOS NSG膜的方法。

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