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    • 1. 发明申请
    • Array substrate for fringe field switching mode liquid crystal display device and fringe field switching mode liquid crystal display device including the same
    • 用于条纹场开关模式液晶显示装置和边缘场开关模式液晶显示装置的阵列基板
    • US20090322975A1
    • 2009-12-31
    • US12318271
    • 2008-12-23
    • Sang-Moo SongIn-Ho HwangDae-Lim ParkKi-Hyun Lyu
    • Sang-Moo SongIn-Ho HwangDae-Lim ParkKi-Hyun Lyu
    • G02F1/1368
    • G02F1/133707G02F2001/134372
    • An array substrate for a fringe field switching mode liquid crystal display device includes a plurality of gate lines on a substrate; a gate insulating layer on the plurality of gate lines; a plurality of data lines on the gate insulating layer and crossing the plurality of gate lines to define a plurality of pixel regions; a thin film transistor electrically connected to the gate and data lines and in each pixel region; a pixel electrode having a plate shape and in the each pixel region, the pixel electrode connected to a portion of the thin film transistor; a first passivation layer on the pixel electrode and over the thin film transistor; and a common electrode on the first passivation layer and having a plurality of openings of a bar shape in the each pixel region, each of the openings having a major axis along the data line and a minor axis along the gate line, wherein a center portion of each opening overlaps the pixel electrode, and both ends along the major axis of each opening protrude beyond the pixel electrode.
    • 用于边缘场开关模式液晶显示装置的阵列基板包括在基板上的多条栅极线; 多个栅极线上的栅极绝缘层; 在所述栅极绝缘层上的多条数据线,并与所述多条栅极线交叉以限定多个像素区域; 电连接到栅极和数据线以及每个像素区域中的薄膜晶体管; 具有板状的像素电极,并且在每个像素区域中,所述像素电极连接到所述薄膜晶体管的一部分; 在所述像素电极上并在所述薄膜晶体管上方的第一钝化层; 以及在所述第一钝化层上的公共电极,并且在所述每个像素区域中具有棒状形状的多个开口,每个所述开口具有沿所述数据线的长轴和沿着所述栅极线的短轴,其中,中心部分 的每个开口与像素电极重叠,并且沿着每个开口的长轴的两端突出超过像素电极。
    • 2. 发明授权
    • Array substrate for fringe field switching mode liquid crystal display device and fringe field switching mode liquid crystal display device including the same
    • 用于条纹场开关模式液晶显示装置和边缘场开关模式液晶显示装置的阵列基板
    • US08154696B2
    • 2012-04-10
    • US12318271
    • 2008-12-23
    • Sang-Moo SongIn-Ho HwangDae-Lim ParkKi-Hyun Lyu
    • Sang-Moo SongIn-Ho HwangDae-Lim ParkKi-Hyun Lyu
    • G02F1/1343G02F1/136
    • G02F1/133707G02F2001/134372
    • An array substrate for a fringe field switching mode liquid crystal display device includes a plurality of gate lines on a substrate; a gate insulating layer on the plurality of gate lines; a plurality of data lines on the gate insulating layer and crossing the plurality of gate lines to define a plurality of pixel regions; a thin film transistor electrically connected to the gate and data lines and in each pixel region; a pixel electrode having a plate shape and in the each pixel region, the pixel electrode connected to a portion of the thin film transistor; a first passivation layer on the pixel electrode and over the thin film transistor; and a common electrode on the first passivation layer and having a plurality of openings of a bar shape in the each pixel region, each of the openings having a major axis along the data line and a minor axis along the gate line, wherein a center portion of each opening overlaps the pixel electrode, and both ends along the major axis of each opening protrude beyond the pixel electrode.
    • 用于边缘场开关模式液晶显示装置的阵列基板包括在基板上的多条栅极线; 多个栅极线上的栅极绝缘层; 在所述栅极绝缘层上的多条数据线,并与所述多条栅极线交叉以限定多个像素区域; 电连接到栅极和数据线以及每个像素区域中的薄膜晶体管; 具有板状的像素电极,并且在每个像素区域中,所述像素电极连接到所述薄膜晶体管的一部分; 在所述像素电极上并在所述薄膜晶体管上方的第一钝化层; 以及在所述第一钝化层上的公共电极,并且在所述每个像素区域中具有棒状形状的多个开口,每个所述开口具有沿所述数据线的长轴和沿着所述栅极线的短轴,其中,中心部分 的每个开口与像素电极重叠,并且沿着每个开口的长轴的两端突出超过像素电极。
    • 3. 发明授权
    • Thin film transistor having a second gate metal layer preventing formation of hillocks
    • 具有防止形成小丘的第二栅极金属层的薄膜晶体管
    • US06329672B1
    • 2001-12-11
    • US08979843
    • 1997-11-26
    • Ki-Hyun LyuKwang-Jo Hwang
    • Ki-Hyun LyuKwang-Jo Hwang
    • H01L2904
    • H01L27/12H01L29/4908
    • A thin film transistor is disclosed, including an insulating substrate, a semiconductor layer formed on the insulating substrate, the semiconductor layer having an active region and an impurity region, a gate insulating layer formed on the active region of the semiconductor layer, a first gate metal layer formed on a predetermined portion of the active region of the semiconductor layer to define a channel region, and a second gate metal layer formed on the first gate metal layer. The first and second gate metal layers have different compositions, such that the second gate metal layer etches faster than the first gate metal layer, thereby preventing formation of a hillock. A first protective layer is formed over the structure, then a light shielding layer, and then a second protective layer is formed over the light shielding layer.
    • 公开了一种薄膜晶体管,其包括绝缘基板,形成在绝缘基板上的半导体层,具有有源区和杂质区的半导体层,形成在半导体层的有源区上的栅极绝缘层,第一栅极 金属层形成在半导体层的有源区的预定部分上以限定沟道区,以及形成在第一栅极金属层上的第二栅极金属层。 第一和第二栅极金属层具有不同的组成,使得第二栅极金属层比第一栅极金属层蚀刻更快,从而防止形成小丘。 在结构上形成第一保护层,然后在遮光层上形成遮光层,然后形成第二保护层。