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    • 1. 发明授权
    • Structure and method for failure analysis in a semiconductor device
    • 半导体器件故障分析的结构和方法
    • US07468530B2
    • 2008-12-23
    • US11291242
    • 2005-11-30
    • Ki-Am LeeSang-Deok KwonJong-Hyun Lee
    • Ki-Am LeeSang-Deok KwonJong-Hyun Lee
    • H01L29/74
    • G01R31/2884
    • In a method and structure for semiconductor failure analysis, the structure comprises: a plurality of analytic fields disposed on a predetermined area of a semiconductor device; semiconductor transistors arranged in each of the analytic fields, the semiconductor transistors arranged in an array; wordlines arranged on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a first direction; and bitline structures on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a second direction, wherein the bitline structures are configured in different patterns in each of the plurality of analytic fields.
    • 在半导体故障分析的方法和结构中,该结构包括:设置在半导体器件的预定区域上的多个分析场; 布置在每个分析场中的半导体晶体管,排列成阵列的半导体晶体管; 布置在多个分析场中的每一个上的字线,在第一方向上将半导体晶体管彼此连接; 以及在所述多个分析场中的每一个上的位线结构,在第二方向上将所述半导体晶体管彼此连接,其中所述位线结构在所述多个分析场中的每一个中被配置为不同的图案。
    • 2. 发明申请
    • Structure and method for failure analysis in a semiconductor device
    • 半导体器件故障分析的结构和方法
    • US20060118784A1
    • 2006-06-08
    • US11291242
    • 2005-11-30
    • Ki-Am LeeSang-Deok KwonJong-Hyun Lee
    • Ki-Am LeeSang-Deok KwonJong-Hyun Lee
    • H01L23/58
    • G01R31/2884
    • In a method and structure for semiconductor failure analysis, the structure comprises: a plurality of analytic fields disposed on a predetermined area of a semiconductor device; semiconductor transistors arranged in each of the analytic fields, the semiconductor transistors arranged in an array; wordlines arranged on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a first direction; and bitline structures on each of the plurality of the analytic fields, connecting the semiconductor transistors with each other in a second direction, wherein the bitline structures are configured in different patterns in each of the plurality of analytic fields.
    • 在半导体故障分析的方法和结构中,该结构包括:设置在半导体器件的预定区域上的多个分析场; 布置在每个分析场中的半导体晶体管,排列成阵列的半导体晶体管; 布置在多个分析场中的每一个上的字线,在第一方向上将半导体晶体管彼此连接; 以及在所述多个分析场中的每一个上的位线结构,在第二方向上将所述半导体晶体管彼此连接,其中所述位线结构在所述多个分析场中的每一个中被配置为不同的图案。
    • 3. 发明授权
    • Analytic structure for failure analysis of semiconductor device having a multi-stacked interconnection structure
    • 具有多堆叠互连结构的半导体器件的故障分析的分析结构
    • US07598615B2
    • 2009-10-06
    • US11346678
    • 2006-02-03
    • Ki-Am LeeJong-Hyun Lee
    • Ki-Am LeeJong-Hyun Lee
    • H01L23/485H01L23/528
    • H01L27/1104H01L27/11
    • In an analytic structure for failure analysis of a semiconductor device, a plurality of analytic regions are arranged in regions of a semiconductor substrate. A plurality of semiconductor transistors having an array structure are arranged in each of the analytic regions. A plurality of interconnection structures connect the semiconductor transistors, each comprising multiple layered metal patterns and multiple layered plugs interposed between the multiple layered metal patterns. A first number of layers of the multiple layered metal patterns and multiple layered plugs is different in one of the analytic regions than a second number of layers of the multiple layered metal patterns and multiple layered plugs in another one of the analytic regions.
    • 在用于半导体器件的故障分析的分析结构中,多个分析区域布置在半导体衬底的区域中。 在每个分析区域中布置有具有阵列结构的多个半导体晶体管。 多个互连结构连接半导体晶体管,每个半导体晶体管包括多层金属图案和插入在多层金属图案之间的多个分层插塞。 在多个分层金属图案和多个分层塞子的第一层中,一个分析区域中的多层金属图案的第二数量层和另一个分析区域中的多个分层塞子是不同的。
    • 4. 发明申请
    • Analytic structure for failure analysis of semiconductor device
    • 半导体器件故障分析分析结构
    • US20060175668A1
    • 2006-08-10
    • US11346678
    • 2006-02-03
    • Ki-Am LeeJong-Hyun Lee
    • Ki-Am LeeJong-Hyun Lee
    • H01L29/76
    • H01L27/1104H01L27/11
    • In an analytic structure for failure analysis of a semiconductor device, a plurality of analytic regions are arranged in regions of a semiconductor substrate. A plurality of semiconductor transistors having an array structure are arranged in each of the analytic regions. A plurality of interconnection structures connect the semiconductor transistors, each comprising multiple layered metal patterns and multiple layered plugs interposed between the multiple layered metal patterns. A first number of layers of the multiple layered metal patterns and multiple layered plugs is different in one of the analytic regions than a second number of layers of the multiple layered metal patterns and multiple layered plugs in another one of the analytic regions.
    • 在用于半导体器件的故障分析的分析结构中,多个分析区域布置在半导体衬底的区域中。 在每个分析区域中布置有具有阵列结构的多个半导体晶体管。 多个互连结构连接半导体晶体管,每个半导体晶体管包括多层金属图案和插入在多层金属图案之间的多个分层插塞。 在多个分层金属图案和多个分层塞子的第一层中,一个分析区域中的多层金属图案的第二数量层和另一个分析区域中的多个分层塞子是不同的。
    • 5. 发明授权
    • Charging device for portable terminal
    • 便携式终端充电装置
    • US08558503B2
    • 2013-10-15
    • US13099706
    • 2011-05-03
    • Chang-Hoon JeongJong-Hyun LeeChul-Kwi Kim
    • Chang-Hoon JeongJong-Hyun LeeChul-Kwi Kim
    • H02J7/00H01R13/44H01R13/66
    • H02J7/0044H01R13/6278H01R31/06H01R2103/00
    • A charging cradle for mounting a portable terminal or a battery pack for the portable terminal, a multi-plug adapted to be mounted by being inserted into the charging cradle, hook holes formed in the charging cradle, and hooks adapted to be engaged with the hook holes, wherein the direction for inserting the multi-plug into the charging cradle and the direction for connecting the multi-plug to an external receptacle are perpendicular to each other, is provided, so that charging cradles adapted to be commonly used worldwide, and by localizing multi-plugs by countries or cities, i.e., by providing each country or city with multi-plugs adapted to be suitably used in such a country or a city, enable a user to use his or her charging device by only buying a multi-plug available in a country or a city where the user stays if it is desired.
    • 一种用于安装用于便携式终端的便携式终端或电池组的充电座,适于通过插入充电座中而安装的多插头,形成在充电座中的钩孔以及适于与钩接合的钩 孔,其中将多插头插入充电座的方向和将多插头连接到外部插座的方向彼此垂直,使得充电托架适合于全世界普遍使用,并且由 按国家或城市进行本地化多插头,即通过为每个国家或城市提供适合在这样的国家或城市中适当使用的多插头,使得用户仅通过购买多插头来使用他/她的充电装置, 如果需要,可以在用户停留的国家或城市中使用插头。
    • 6. 发明授权
    • Method of preparing a microcapsule containing unsaturated fatty acids, the microcapsule prepared by the method, and articles containing the microcapsule
    • 制备含有不饱和脂肪酸的微胶囊的方法,通过该方法制备的微胶囊和含有微胶囊的制品
    • US08282961B2
    • 2012-10-09
    • US12377506
    • 2007-07-27
    • Hong-Sig SinSi-Ho ParkSoo-Jong UmJong-Hyun LeeHee-Jeong KimHa-Lyong JinHyoung-Su Kim
    • Hong-Sig SinSi-Ho ParkSoo-Jong UmJong-Hyun LeeHee-Jeong KimHa-Lyong JinHyoung-Su Kim
    • A61K9/14
    • B01J13/02
    • The present invention provides a preparing method of microcapsule containing unsaturated fatty acid comprising the steps of (a) preparing a first coating material by mixing and gelatinating one or more gums selected from the group consisting of xanthan gum, guar gum, and locusbean gum, with poly glycerin esters of fatty acid in sterilized water, adding unsaturated fatty acid to the solution, and homogenizing the solution; (b) preparing a second coating material by mixing and gelatinating starch or modified starch, gelatin or casein, and poly glycerin esters of fatty acid in sterilized water, adding the first coating material prepared in (a) to the solution, and homogenizing the solution; and (c) spraying the second coating material prepared in (b) in cold sterilized water; a microcapsule prepared by the method; and articles containing the microcapsule.The present microcapsule has effects of preventing the oxidation of unsaturated fatty acid and inhibiting offensive smell.
    • 本发明提供含有不饱和脂肪酸的微胶囊的制备方法,其包括以下步骤:(a)通过将选自由黄原胶,瓜尔胶和路基胶豆胶组成的组中的一种或多种树胶混合并凝胶化而制备第一涂料, 在无菌水中的脂肪酸的聚甘油酯,向溶液中加入不饱和脂肪酸,并均化溶液; (b)通过将灭菌水中的淀粉或改性淀粉,明胶或酪蛋白和脂肪酸的聚甘油酯混合并凝胶化制备第二涂料,将(a)中制备的第一涂料添加到溶液中,并使溶液均化 ; 和(c)将(b)中制备的第二涂层材料喷射到冷无菌水中; 通过该方法制备的微胶囊; 和含有微胶囊的物品。 本发明的微胶囊具有防止不饱和脂肪酸氧化并抑制异味的作用。
    • 9. 发明申请
    • APPARATUS AND METHOD FOR MANAGING INTEGRATED AUTHENTICATION FOR PERSONAL MOBILITY IN WIRED/WIRELESS INTEGRATED SERVICE NETWORK
    • 用于管理有线/无线综合业务网络中个人移动的集成认证的装置和方法
    • US20070224970A1
    • 2007-09-27
    • US11694740
    • 2007-03-30
    • Jung-Hee BangHan-Wook JungDo-Jin ParkJong-Hyun Lee
    • Jung-Hee BangHan-Wook JungDo-Jin ParkJong-Hyun Lee
    • H04M1/66
    • H04L63/08H04L63/0815
    • Provided are an integrated authentication processing apparatus for personal mobility in a wired/wireless integrated service network, a method thereof, and a computer-readable recording medium for recording a program that implements the method. The integrated authentication processing method includes the steps of: a) receiving a network service subscription request from a user through the Internet, registering the user as a service subscriber, and storing/managing subscription information of the subscriber; b) receiving the network access request from a user terminal through a network control platform, processing an integrated authentication for network access and additional services, and transmitting the result to the user terminal through the network control platform; and c) processing a charge information process request from the user terminal whose access is allowed according to the authentication result of the step b) by using charge information and session information of the subscriber without additional authentication process.
    • 提供了一种用于有线/无线综合业务网络中的个人移动性的集成认证处理装置,其方法和用于记录实现该方法的程序的计算机可读记录介质。 集成认证处理方法包括以下步骤:a)通过因特网从用户接收网络服务订阅请求,将用户注册为服务订户,以及存储/管理订户的订阅信息; b)通过网络控制平台从用户终端接收网络接入请求,处理网络接入和附加业务的集成认证,并通过网络控制平台将结果发送给用户终端; 以及c)通过使用所述用户的费用信息和会话信息来处理来自其允许访问的用户终端的费用信息处理请求,所述用户终端根据步骤b)的认证结果,而没有附加认证处理。
    • 10. 发明授权
    • ATM-PON ONU controlling apparatus
    • ATM-PON ONU控制装置
    • US07142544B2
    • 2006-11-28
    • US09852304
    • 2001-05-10
    • Chan KimSeung-Hwan KimTae-Whan YooJong-Hyun Lee
    • Chan KimSeung-Hwan KimTae-Whan YooJong-Hyun Lee
    • H04L12/56
    • H04L12/5601H04L2012/5605H04L2012/561H04L2012/5615
    • A PON slave controller for use in a PON ONU system capable of processing in unit of byte outputs an enable signal to external for a mini-slot payload and receives a byte input signal for enabling usage of an arbitrary MAC (Medium Access Control) technique loading arbitrary data in a mini-slot. An ATM-PON ONU controlling apparatus of the present invention includes a cell receiving unit for transferring an ATM cell through a receiving UTOPIA interfacing unit to external and transferring a message in a PLOAM cell, a cell transmitting unit for loading the ATM cell received through a transmitting UTOPIA interfacing unit in a granted slot and transferring in upstream and downstream by loading the message being on standby in payload of the PLOAM cell when the PLAOM cell is transmitted, and a message processing unit for setting internal signals by processing the received message or instructing operation of a plurality of functional blocks, and transferring the message requested by the plurality of functional blocks through the cell transmitting unit.
    • 用于能够以字节为单位处理的PON ONU系统中的PON从属控制器向微时隙有效负载输出使能信号到外部,并且接收字节输入信号,以使得能够使用任意MAC(媒体访问控制)技术加载 迷你插槽中的任意数据。 本发明的ATM-PON ONU控制装置包括:小区接收单元,用于通过接收UTOPIA接口单元将ATM信元传送到外部并在PLOAM小区中传送消息;小区发送单元,用于加载通过 在授予的时隙中发送UTOPIA接口单元,并且在发送所述PLAOM小区时,通过加载在所述PLOAM小区的有效负载中正在待机的消息,在上游和下游进行传输;以及消息处理单元,用于通过处理所接收的消息或指示 多个功能块的操作,以及通过所述小区发送单元传送由所述多个功能块请求的消息。