专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5172014A Programmable interconnect architecture 失效
标题翻译：可编程互连体系结构
公开(公告)号：US5172014A
公开(公告)日：1992-12-15
申请号：US621452
申请日：1991-01-15
申请人： Khaled El Ayat , Abbas A. El Gamal , Amr M. Mohsen
发明人： Khaled El Ayat , Abbas A. El Gamal , Amr M. Mohsen
IPC分类号： G01R31/3185 , H03K19/177
CPC分类号： H03K19/17736 , G01R31/318516 , H03K19/17704
摘要： A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open programmable elements situated at the intersection of any two segments to be connected.
摘要翻译：公开了可用于数字和模拟系统设计的逻辑阵列的用户可编程互连体系结构。在一个实施例中，矩阵中的多个逻辑单元或模块通过垂直和水平布线通道连接。接线通道可以由用户编程，以互连各种逻辑单元以实现所需的逻辑功能。布线通道包括通过常开的可编程元件连接的布线段，所述可编程元件位于要连接的任何两个段的交点处。

2. 发明授权

US5973340A Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits 失效
标题翻译：可编程互连结构，测试芯片，测试结构和测试方法
公开(公告)号：US5973340A
公开(公告)日：1999-10-26
申请号：US895718
申请日：1997-07-17
申请人： Amr M. Mohsen
发明人： Amr M. Mohsen
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3185 , G11C29/30 , H01L21/66 , H01L23/525 , H01L23/528 , H01L23/538 , H05K1/00 , H05K1/02 , H05K1/18 , H01L27/10 , H01L23/48
CPC分类号： H01L22/22 , G01R31/2853 , G01R31/2884 , G01R31/318505 , G01R31/318538 , G11C29/30 , H01L23/5252 , H01L23/528 , H01L23/5382 , H01L2924/0002 , H05K1/0286
摘要： An interconnect structure is centered around a substrate having multiple component contacts for receiving electronic components. Multiple conductive traces are provided over the substrate or in multiple layers of the substrate. Each conductive trace is connected to one of the component contacts. A programmable IC having a group of separate conductive leads is connected to the substrate. Two or more of the conductive leads are connected to corresponding ones of the conductive traces. The IC has programmable elements, such as electrically programmable elements, for selectively connecting the conductive leads, thereby enabling selected conductive traces to be interconnected so as to achieve a desired electrical function from the electronic components connected to the substrate. A test chip, an interconnect structure that contains the test chip, and a related test method are also provided.
摘要翻译：互连结构围绕具有用于接收电子部件的多个部件触头的基板居中。多个导电迹线设置在衬底上或衬底的多层中。每个导电迹线连接到组件触点之一。具有一组单独导电引线的可编程IC连接到基板。两个或多个导电引线连接到相应的导电迹线。 IC具有诸如电可编程元件的可编程元件，用于选择性地连接导电引线，从而使所选择的导电迹线互连，以便从连接到基板的电子部件获得期望的电功能。还提供了测试芯片，包含测试芯片的互连结构以及相关的测试方法。

3. 发明授权

US4899205A Electrically-programmable low-impedance anti-fuse element 失效
标题翻译：电子可编程低阻抗保险丝元件
公开(公告)号：US4899205A
公开(公告)日：1990-02-06
申请号：US137935
申请日：1987-12-28
申请人： Esmat Z. Hamdy , Amr M. Mohsen , John L. McCullum
发明人： Esmat Z. Hamdy , Amr M. Mohsen , John L. McCullum
IPC分类号： G11C17/14 , G11C16/04 , G11C17/00 , H01L21/82 , H01L21/822 , H01L21/8247 , H01L23/525 , H01L27/04 , H01L27/10 , H01L27/112 , H01L27/115
CPC分类号： H01L27/112 , H01L23/5252 , H01L2924/0002 , H01L2924/3011
摘要： Electrically-programmable low-impedance anti-fuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The electrically-programmable low-impedance anti-fuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer, which, in a preferred embodiment includes a first layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide, is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or a metal having a barrier metal underneath. At least one of the two electrodes of each anti-fuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer. This arsenic will combine with other material and flow into the anti-fuse filament after programmed to form a low resistance controllable anti-fuse link. Circuitry is provided which allows the anti-fuse of the present invention to be programmed by application of a suitable programming voltage to input-output pins of the integrated circuit containing the anti-fuse. Where more than one anti-fuse is to be programmed using the programming voltage applied at the input-output terminals, other additional input-output terminals may serve as address inputs to specify the anti-fuse to be programmed.In another embodiment of the present invention a programmable read-only memory array comprised of memory cells including an anti-fuse in combination with a single transistor. X-address and Y-address decoder circuits are provided to both program and read the contents of any selected memory cell in the array.
摘要翻译：公开了电可编程的低阻抗抗熔丝，其具有电容器状结构，在编程之前具有非常低的泄漏并且在编程之后具有低电阻。本发明的电气可编程低阻抗熔断器包括第一导电电极，其可以形成为半导体衬底中的扩散区域，或者可以由诸如多晶硅的半导体材料形成，位于上部并与之绝缘的半导体材料基质。在优选实施例中，介电层包括第一层二氧化硅，第二层氮化硅和第三层二氧化硅，设置在第一电极上。第二电极由诸如多晶硅的半导体材料或在其下方具有阻挡金属的金属在电介质层上形成。每个反熔丝的两个电极中的至少一个被高度掺杂或注入砷，使得高浓度的砷存在于电极和电介质层之间的界面处。这种砷将与其他材料结合并经编程后流入反熔丝，以形成低电阻可控的反熔丝链。提供电路，其允许通过向包含反熔丝的集成电路的输入输出引脚施加合适的编程电压来编程本发明的反熔丝。在使用输入 - 输出端子上施加的编程电压对多个反熔丝进行编程的情况下，其他附加输入 - 输出端可用作地址输入，以指定要编程的反熔丝。在本发明的另一个实施例中，可编程只读存储器阵列由包括与单个晶体管组合的反熔丝的存储单元组成。提供X地址和Y地址解码器电路来编程和读取阵列中任何选定存储单元的内容。

4. 发明授权

US4876220A Method of making programmable low impedance interconnect diode element 失效
标题翻译：制造可编程低阻抗互连二极管元件的方法
公开(公告)号：US4876220A
公开(公告)日：1989-10-24
申请号：US104404
申请日：1987-11-13
申请人： Amr M. Mohsen , Esmat Z. Hamdy , John L. McCollum
发明人： Amr M. Mohsen , Esmat Z. Hamdy , John L. McCollum
IPC分类号： H01L21/768 , H01L23/525
CPC分类号： H01L23/5252 , H01L21/76886 , H01L2924/0002 , H01L2924/3011
摘要： A programmable low impedance interconnect diode element is disclosed having a lower electrode formed of a semiconductor material of a first conductivity type covered by an insulating dielectric layer which may be in a preferred embodiment comprised of an initial layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide, covered by a layer of semiconductor material of a second conductivity type.A programmable read only memory array and a programmable logic array comprising a plurality of the above-described cells are also disclosed.
摘要翻译：公开了一种可编程的低阻抗互连二极管元件，其具有由绝缘介电层覆盖的第一导电类型的半导体材料形成的下电极，该绝缘介电层可以在优选实施例中包括二氧化硅的初始层，第二层硅氮化物和由第二导电类型的半导体材料层覆盖的第三层二氧化硅。还公开了一种可编程只读存储器阵列和包括多个上述单元的可编程逻辑阵列。

5. 发明授权

US5661409A Field programmable printed circuit board 失效
标题翻译：互连结构包含用于测试结构的集成电路
公开(公告)号：US5661409A
公开(公告)日：1997-08-26
申请号：US520326
申请日：1995-08-28
申请人： Amr M. Mohsen
发明人： Amr M. Mohsen
IPC分类号： H01R11/01 , G01R31/28 , G06F17/50 , H01L23/525 , H05K1/00 , H05K1/14 , H05K3/22 , H05K3/42
CPC分类号： G06F17/5027 , G01R31/2818 , G06F17/5068 , H01L23/525 , H05K1/029 , H01L2924/0002 , H05K1/0298 , H05K2201/10212 , H05K2201/10689 , H05K3/222 , H05K3/429
摘要： A field programmable printed circuit board is provided which includes a multiplicity of component contacts for making electrical contact to the leads of electronic components to be mounted on the printed circuit board, a corresponding multiplicity of interconnect contacts for receipt of the leads on the package or packages of a programmable integrated circuit-or circuits for interconnecting as desired the electronic components, and one or more layers of conductive traces formed on the printed circuit board, each conductive trace uniquely connecting electrically one component contact to one interconnect contact.
摘要翻译：提供了现场可编程印刷电路板，其包括多个组件触点，用于与要安装在印刷电路板上的电子部件的引线电接触;相应的多个互连触点，用于接收封装或封装上的引线用于根据需要互连电子部件的可编程集成电路或电路以及形成在印刷电路板上的一层或多层导电迹线，每个导电迹线将电气单一元件触点唯一地连接到一个互连触点。

6. 发明授权

US5412244A Electrically-programmable low-impedance anti-fuse element 失效
标题翻译：电子可编程低阻抗保险丝元件
公开(公告)号：US5412244A
公开(公告)日：1995-05-02
申请号：US54612
申请日：1993-04-29
申请人： Esmat Z. Hamdy , Amr M. Mohsen , John L. McCollum , Shih-Ou Chen , Steve S. Chiang
发明人： Esmat Z. Hamdy , Amr M. Mohsen , John L. McCollum , Shih-Ou Chen , Steve S. Chiang
IPC分类号： H01L23/525 , H01L29/46 , H01L29/86 , H01L29/92
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011
摘要： Electrically-programmable low-impedance antifuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or metal having a barrier metal underneath. At least one of the two electrodes of each antifuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer.
摘要翻译：公开了电可编程低阻抗反熔丝，其具有在编程之前具有非常低的泄漏并且在编程之后具有低电阻的电容器状结构。本发明的反熔丝包括可以在半导体衬底中形成为扩散区域的第一导电电极，或者可以由位于衬底上方并与衬底绝缘的半导体材料（例如多晶硅）形成。电介质层设置在第一电极上。第二电极由诸如多晶硅的半导体材料或在其下方具有阻挡金属的金属在电介质层上形成。每个反熔丝的两个电极中的至少一个被高掺杂或注入砷，使得高浓度的砷存在于电极和电介质层之间的界面处。

7. 发明授权

US4943538A Programmable low impedance anti-fuse element 失效
标题翻译：可编程低阻抗熔丝元件
公开(公告)号：US4943538A
公开(公告)日：1990-07-24
申请号：US166324
申请日：1988-03-10
申请人： Amr M. Mohsen , Esmat Z. Hamdy , John L. McCullum
发明人： Amr M. Mohsen , Esmat Z. Hamdy , John L. McCullum
IPC分类号： H01L23/525
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011
摘要： An electrically programmable low impedance circuit element is disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The electrically programmable low impedance circuit element of the present invention includes a lower conductive electrode which may be formed of a metal or semiconductor material, an insulating layer, which, in a preferred embodiment includes a first layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide. An upper electrode formed of a metal or of a semiconductor material of the same conductivity type of the lower electrode or a sandwich of both completes the structure.
摘要翻译：公开了一种电可编程低阻抗电路元件，其具有在编程之前具有非常低的泄漏并且在编程之后具有低电阻的电容器状结构。本发明的电可编程低阻抗电路元件包括可由金属或半导体材料形成的下导电电极，绝缘层，其在优选实施例中包括第一层二氧化硅，第二层硅氮化物和第三层二氧化硅。由具有相同导电类型的下部电极的金属或半导体材料形成的上部电极或两者的三明治完成了该结构。

8. 发明授权

US4471368A Dynamic RAM memory and vertical charge coupled dynamic storage cell therefor 失效
标题翻译：动态RAM存储器和垂直电荷耦合动态存储单元
公开(公告)号：US4471368A
公开(公告)日：1984-09-11
申请号：US152092
申请日：1980-05-21
申请人： Amr M. Mohsen
发明人： Amr M. Mohsen
IPC分类号： G11C11/35 , G11C11/403 , G11C11/404 , H01L27/108 , H01L29/78 , G11C11/34 , H01L27/10
CPC分类号： G11C11/403 , G11C11/35 , G11C11/404 , H01L27/108
摘要： A dynamic RAM memory comprised of a plurality of storage cells, each cell having its elements vertically stacked and using vertical charge coupling for charging and discharging the cell capacitor. The preferred embodiment of the cell comprises a semiconductive substrate having diffused into its upper surface a channel of opposite impurity concentration to that of the substrate for forming the bit line of the memory. An epitaxial layer is grown on the substrate surface to bury the bit line, a channel stop is diffused into the upper surface of the epitaxial layer to circumscribe the active cell area, and a thin insulator is disposed on the surface of the epitaxial layer with a conductive strip deposited thereon which form the word line of the memory. The thickness of the epitaxial layer, the impurity concentration of the buried channel and the epitaxial layer, together with the applied voltages, are selected for charge coupling operations.
摘要翻译：一种由多个存储单元组成的动态RAM存储器，每个单元具有垂直堆叠的元件，并且使用用于对单元电容器进行充电和放电的垂直电荷耦合。电池的优选实施例包括半导体衬底，其在其上表面扩散了与衬底相反的杂质浓度的沟道，用于形成存储器的位线。在衬底表面上生长外延层以埋置位线，通道阻挡层扩散到外延层的上表面以包围有源电池区域，并且在外延层的表面上设置薄绝缘体沉积在其上的导电条形成存储器的字线。选择外延层的厚度，掩埋沟道和外延层的杂质浓度以及施加的电压用于电荷耦合操作。

9. 发明授权

US5654564A Interconnect structure with programmable IC for interconnecting electronic components, including circuitry for controlling programmable IC 失效
标题翻译：互连结构与用于互连电子元件的可编程IC，包括用于控制可编程IC的电路
公开(公告)号：US5654564A
公开(公告)日：1997-08-05
申请号：US594929
申请日：1996-01-31
申请人： Amr M. Mohsen
发明人： Amr M. Mohsen
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3185 , G11C29/30 , H01L21/66 , H01L23/525 , H01L23/528 , H01L23/538 , H05K1/00 , H05K1/02 , H05K1/18 , H01L27/10 , H01L23/48
CPC分类号： H01L22/22 , G01R31/2853 , G01R31/2884 , G01R31/318505 , G01R31/318538 , G11C29/30 , H01L23/5252 , H01L23/528 , H01L23/5382 , H01L2924/0002 , H05K1/0286
摘要： An interconnect structure is centered around a substrate having multiple component contacts for receiving electronic components. Multiple conductive traces are provided on the substrate. Each conductive trace is electrically connected to one of the component contacts. A programmable IC having a group of separate conductive leads is connected to the substrate. Two or more of the conductive leads are connected to corresponding conductive traces on the substrate. The IC has programmable elements for selectively connecting the conductive leads, thereby enabling a user to interconnect selected conductive traces on the substrate to achieve a desired electrical function from the electronic components connected to the substrate. The interconnect structure also contains circuitry for transmitting control signals to the programmable IC to control its configuration so as to control the interconnection of the conductive traces.
摘要翻译：互连结构围绕具有用于接收电子部件的多个部件触头的基板居中。多个导电迹线设置在基板上。每个导电迹线电连接到组件触点中的一个。具有一组单独导电引线的可编程IC连接到基板。两个或多个导电引线连接到衬底上相应的导电迹线。 IC具有用于选择性地连接导电引线的可编程元件，从而使得用户能够将衬底上所选择的导电迹线互连，以从连接到衬底的电子部件实现期望的电功能。互连结构还包括用于将控制信号发送到可编程IC以控制其配置以控制导电迹线的互连的电路。

10. 发明授权

US5640308A Field programmable circuit module 失效
标题翻译：现场可编程电路模块
公开(公告)号：US5640308A
公开(公告)日：1997-06-17
申请号：US560154
申请日：1995-11-17
申请人： Robert Osann, Jr. , George A. Shaw, Jr. , Amr M. Mohsen
发明人： Robert Osann, Jr. , George A. Shaw, Jr. , Amr M. Mohsen
IPC分类号： H01L23/538 , H05K1/00 , H05K1/11 , H05K7/02 , H01L29/00
CPC分类号： H01L23/5382 , H05K1/0289 , H01L2224/49171 , H01L2924/10253 , H05K1/112 , H05K2201/09945 , H05K2201/10689 , H05K2203/175
摘要： The invention uses a programmable interconnect substrate having a plurality of conductive and interconnectable vias located on one or both surfaces thereof. A customized pattern of bonding pads is then formed over the one or both surfaces of the substrate which correspond to the terminal footprints of specific surface mounted packages intended to be mounted on the substrate. A generalized pattern of bonding pads may also be formed on the surfaces of the substrate for electrically connecting terminals of bare dice thereto by means of thin wire. All bonding pads are electrically connected to one or more vias by direct electrical contact or by a conductive trace extending from the bonding pad to a nearby via.
摘要翻译：本发明使用具有位于其一个或两个表面上的多个导电和互连通孔的可编程互连基板。然后在衬底的一个或两个表面上形成定制的接合焊盘图案，其对应于期望安装在衬底上的特定表面安装封装的端子脚印。也可以在基板的表面上形成接合焊盘的一般化图案，用于通过细线电连接裸裸片的端子。所有接合焊盘通过直接电接触或通过从接合焊盘延伸到附近的通孔的导电迹线电连接到一个或多个通孔。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式