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1. 发明授权

US07858449B2 Thyristor device with carbon lifetime adjustment implant and its method of fabrication 失效
标题翻译：具有碳寿命调整植入物的晶闸管器件及其制造方法
公开(公告)号：US07858449B2
公开(公告)日：2010-12-28
申请号：US12367891
申请日：2009-02-09
申请人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
发明人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
IPC分类号： H01L29/72
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
摘要翻译：在制造半导体存储器件的方法中，晶闸管可以形成在半导体材料层中。可以在用于晶闸管的基极 - 发射极结区域中注入和退火碳以影响泄漏特性。因此可以选择碳的密度和/或轰击能量和/或退火，以建立连接的低电压，泄漏特性，基本上大于其没有碳的泄漏。在一个实施例中，注入碳的退火可以与半导体器件的其它注入区域的激活共同进行。

2. 发明授权

US07488626B1 Thyristor device with carbon lifetime adjustment implant and its method of fabrication 失效
标题翻译：具有碳寿命调整植入物的晶闸管器件及其制造方法
公开(公告)号：US07488626B1
公开(公告)日：2009-02-10
申请号：US11483859
申请日：2006-07-10
申请人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
发明人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
IPC分类号： H01L29/72
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
摘要翻译：在制造半导体存储器件的方法中，晶闸管可以形成在半导体材料层中。可以在用于晶闸管的基极 - 发射极结区域中注入和退火碳以影响泄漏特性。因此可以选择碳的密度和/或轰击能量和/或退火，以建立连接的低电压，泄漏特性，基本上大于其没有碳的泄漏。在一个实施例中，注入碳的退火可以与半导体器件的其它注入区域的激活共同进行。

3. 发明申请

US20090162979A1 THYRISTOR DEVICE WITH CARBON LIFETIME ADJUSTMENT IMPLANT AND ITS METHOD OF FABRICATION 失效
标题翻译：具有碳生物调节植入物的制造装置及其制造方法
公开(公告)号：US20090162979A1
公开(公告)日：2009-06-25
申请号：US12367891
申请日：2009-02-09
申请人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
发明人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
IPC分类号： H01L21/266
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
摘要翻译：在制造半导体存储器件的方法中，晶闸管可以形成在半导体材料层中。可以在用于晶闸管的基极 - 发射极结区域中注入和退火碳以影响泄漏特性。因此可以选择碳的密度和/或轰击能量和/或退火，以建立连接的低电压，泄漏特性，基本上大于其没有碳的泄漏。在一个实施例中，注入碳的退火可以与半导体器件的其它注入区域的激活共同进行。

4. 发明授权

US07075122B1 Thyristor device with carbon lifetime adjustment implant and its method of fabrication 失效
公开(公告)号：US07075122B1
公开(公告)日：2006-07-11
申请号：US10670881
申请日：2003-09-25
申请人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
发明人： Kevin J. Yang , Farid Nemati , Scott Robins , James D. Plummer , Hyun-Jin Cho
IPC分类号： H01L29/72
CPC分类号： H01L27/0817 , H01L29/7436 , H01L29/7455
摘要： In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.

5. 发明授权

US07491586B2 Semiconductor device with leakage implant and method of fabrication 失效
标题翻译：具有漏电注入的半导体器件及其制造方法
公开(公告)号：US07491586B2
公开(公告)日：2009-02-17
申请号：US11159514
申请日：2005-06-22
申请人： Andrew E Horch , Hyun-Jin Cho , Farid Nemati , Scott Robins , Rajesh N. Gupta , Kevin J. Yang
发明人： Andrew E Horch , Hyun-Jin Cho , Farid Nemati , Scott Robins , Rajesh N. Gupta , Kevin J. Yang
IPC分类号： H01L21/332 , H01L21/04 , H01L21/425
CPC分类号： G11C11/39 , H01L27/0817 , H01L29/7436 , H01L29/7455 , H01L29/749
摘要： A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.
摘要翻译：制造基于晶闸管的存储器的方法可以包括在硅中形成用于限定可控硅和串联连接的存取装置的不同的相反导电型区域。激活退火可以激活先前为不同区域植入的掺杂剂。可以将锗或氙或氩的有害植入物引导到硅的选择区域中，包括用于进入装置和晶闸管的至少一个p-n结区域。然后可以进行重结晶退火，以重新结晶由损伤性植入物引起的至少一些损伤的晶格结构。再结晶退火可以使用比先前激活退火的温度低的温度。

6. 发明授权

US06727528B1 Thyristor-based device including trench dielectric isolation for thyristor-body regions 失效
标题翻译：基于晶闸管的器件包括可晶体管体区域的沟槽介质隔离
公开(公告)号：US06727528B1
公开(公告)日：2004-04-27
申请号：US09815213
申请日：2001-03-22
申请人： Scott Robins , Andrew Horch , Farid Nemati , Hyun-Jin Cho
发明人： Scott Robins , Andrew Horch , Farid Nemati , Hyun-Jin Cho
IPC分类号： H01L2974
CPC分类号： H01L29/66363 , H01L21/76229 , H01L21/76237 , H01L21/763 , H01L27/0617 , H01L27/0817
摘要： A semiconductor device includes a thyristor designed to reduce or eliminate manufacturing and operational difficulties commonly experienced in the formation and operation of NDR devices. According to one example embodiment of the present invention, the semiconductor substrate is trenched adjacent a doped or dopable substrate region, which is formed to include at least two vertically-adjacent thyristor regions of different polarity. A capacitively-coupled control port for the thyristor is coupled to at least one of the thyristor regions. The trench also includes a dielectric material for electrically insulating the vertically-adjacent thyristor regions. The thyristor is electrically connected to other circuitry in the device, such as a transistor, and used to form a device, such as a memory cell.
摘要翻译：半导体器件包括设计用于减少或消除在NDR器件的形成和操作中通常经历的制造和操作困难的晶闸管。根据本发明的一个示例性实施例，半导体衬底在掺杂或可掺杂的衬底区域附近被沟槽，该衬底区域被形成为包括具有不同极性的至少两个垂直相邻的晶闸管区域。用于晶闸管的电容耦合控制端口耦合到至少一个晶闸管区域。沟槽还包括用于使垂直相邻的晶闸管区域电绝缘的电介质材料。晶闸管电连接到器件中的其它电路，例如晶体管，并用于形成诸如存储器单元的器件。

7. 发明授权

US06462359B1 Stability in thyristor-based memory device 失效
标题翻译：基于晶闸管的存储器件的稳定性
公开(公告)号：US06462359B1
公开(公告)日：2002-10-08
申请号：US09814980
申请日：2001-03-22
申请人： Farid Nemati , Hyun-Jin Cho , Scott Robins
发明人： Farid Nemati , Hyun-Jin Cho , Scott Robins
IPC分类号： H01L2974
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt between a base and emitter region in a thyristor that effects a leakage current in the thyristor. The thyristor includes a capacitively coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region, and the current shunt is located between the emitter and base region of one of the end portions of the thyristor. The current shunt is configured and arranged to shunt low-level current between the emitter region and the adjacent base region, and in doing so improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
摘要翻译：具有基于晶闸管的存储器件的半导体器件在与温度，噪声，电扰动和光线相关的不利操作条件下表现出改进的稳定性。在本发明的一个具体示例性实施例中，半导体器件包括基于晶闸管的存储器件，其使用晶闸管中的基极和发射极区之间的分流器，其实现晶闸管中的漏电流。晶闸管包括电容耦合的控制端口和阳极和阴极端部分。每个端部具有发射极区域和相邻的基极区域，并且电流分流器位于晶闸管的一个端部的发射极和基极区域之间。电流分流器被配置和布置成在发射极区域和相邻基极区域之间分流低电平电流，并且在这样做时改善了器件在不利条件下操作的能力，这在不存在分流的情况下导致无意中导通同时将存储器件的待机电流保持在可接受的低电平。

8. 发明授权

US06891205B1 Stability in thyristor-based memory device 失效
标题翻译：基于晶闸管的存储器件的稳定性
公开(公告)号：US06891205B1
公开(公告)日：2005-05-10
申请号：US10666220
申请日：2003-09-19
申请人： Hyun-Jin Cho , Farid Nemati , Scott Robins
发明人： Hyun-Jin Cho , Farid Nemati , Scott Robins
IPC分类号： G11C11/39 , H01L29/74 , H01L29/749
CPC分类号： H01L29/749 , G11C11/39 , H01L29/7436
摘要： A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
摘要翻译：具有基于晶闸管的存储器件的半导体器件在与温度，噪声，电扰动和光线相关的不利操作条件下表现出改进的稳定性。在本发明的一个具体示例实施例中，半导体器件包括基于晶闸管的存储器件，其使用在晶闸管中产生漏电流的分流器。晶闸管包括电容耦合控制端口和阳极和阴极端部分。每个端部具有发射极区域和相邻的基极区域。在一个实施方案中，电流分流器位于晶闸管的一个端部的发射极和基极区域之间，并且被配置和布置成在它们之间分流低电平电流。结合示例性实施例，已经发现，以这种方式分流电流提高了器件在不利条件下操作的能力，这种不利条件将在不存在分流的情况下导致无意中导通，同时保持存储器件的待机电流达到可接受的低水平。

9. 发明授权

US06777271B1 Thyristor-based device including trench isolation 失效
标题翻译：基于晶闸管的器件包括沟槽隔离
公开(公告)号：US06777271B1
公开(公告)日：2004-08-17
申请号：US10201654
申请日：2002-07-23
申请人： Scott Robins , Andrew Horch , Farid Nemati , Hyun-Jin Cho
发明人： Scott Robins , Andrew Horch , Farid Nemati , Hyun-Jin Cho
IPC分类号： H01L21332
CPC分类号： H01L29/66363 , H01L21/76229 , H01L21/76237 , H01L21/763 , H01L27/0617 , H01L27/0817
摘要： A semiconductor device includes a thyristor designed to reduce or eliminate manufacturing and operational difficulties commonly experienced in the formation and operation of NDR devices. According to one example embodiment of the present invention, the semiconductor substrate is trenched adjacent a doped or dopable substrate region, which is formed to included at least two vertically-adjacent thyristor regions of different polarity. A capacitively-coupled control port for the thyristor is coupled to at least one of the thyristor regions. The trench also includes a dielectric material for electrically insulating the vertically-adjacent thyristor regions. The thyristor is electrically connected to other circuitry in the device, such as a transistor, and used to form a device, such as a memory cell.
摘要翻译：半导体器件包括设计用于减少或消除在NDR器件的形成和操作中通常经历的制造和操作困难的晶闸管。根据本发明的一个示例实施例，半导体衬底在掺杂或可掺杂的衬底区域附近被沟槽，该衬底区域形成为包括不同极性的至少两个垂直相邻的晶闸管区域。用于晶闸管的电容耦合控制端口耦合到至少一个晶闸管区域。沟槽还包括用于使垂直相邻的晶闸管区域电绝缘的电介质材料。晶闸管电连接到器件中的其它电路，例如晶体管，并用于形成诸如存储器单元的器件。

10. 发明授权

US06653175B1 Stability in thyristor-based memory device 失效
标题翻译：基于晶闸管的存储器件的稳定性
公开(公告)号：US06653175B1
公开(公告)日：2003-11-25
申请号：US10231805
申请日：2002-08-28
申请人： Farid Nemati , Hyun-Jin Cho , Scott Robins
发明人： Farid Nemati , Hyun-Jin Cho , Scott Robins
IPC分类号： H01L21332
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
摘要翻译：具有基于晶闸管的存储器件的半导体器件在与温度，噪声，电扰动和光线相关的不利操作条件下表现出改进的稳定性。在本发明的一个具体示例实施例中，半导体器件包括基于晶闸管的存储器件，其使用在晶闸管中产生漏电流的分流器。晶闸管包括电容耦合控制端口和阳极和阴极端部分。每个端部具有发射极区域和相邻的基极区域。在一个实施方案中，电流分流器位于晶闸管的一个端部的发射极和基极区域之间，并且被配置和布置成在它们之间分流低电平电流。结合示例性实施例，已经发现，以这种方式分流电流提高了器件在不利条件下操作的能力，这种不利条件将在不存在分流的情况下导致无意中导通，同时保持存储器件的待机电流达到可接受的低水平。

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